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[mips][mips64r6] Add bc[12](eq|ne)z
Summary: Depends on D3691 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3760 llvm-svn: 209292
This commit is contained in:
Daniel Sanders
parent
b0569f0a49
commit
cd6e4307af
@ -195,6 +195,11 @@ static DecodeStatus DecodeMSACtrlRegisterClass(MCInst &Inst,
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uint64_t Address,
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const void *Decoder);
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static DecodeStatus DecodeCOP2RegisterClass(MCInst &Inst,
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unsigned RegNo,
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uint64_t Address,
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const void *Decoder);
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static DecodeStatus DecodeBranchTarget(MCInst &Inst,
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unsigned Offset,
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uint64_t Address,
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@ -846,6 +851,18 @@ static DecodeStatus DecodeMSACtrlRegisterClass(MCInst &Inst,
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeCOP2RegisterClass(MCInst &Inst,
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unsigned RegNo,
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uint64_t Address,
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const void *Decoder) {
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if (RegNo > 31)
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return MCDisassembler::Fail;
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unsigned Reg = getReg(Decoder, Mips::COP2RegClassID, RegNo);
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Inst.addOperand(MCOperand::CreateReg(Reg));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeBranchTarget(MCInst &Inst,
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unsigned Offset,
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uint64_t Address,
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@ -24,6 +24,7 @@ class MipsR6Inst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther>,
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//===----------------------------------------------------------------------===//
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def OPGROUP_COP1 { bits<6> Value = 0b010001; }
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def OPGROUP_COP2 { bits<6> Value = 0b010010; }
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def OPGROUP_AUI { bits<6> Value = 0b001111; }
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def OPGROUP_DAUI { bits<6> Value = 0b011101; }
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def OPGROUP_PCREL { bits<6> Value = 0b111011; }
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@ -45,6 +46,10 @@ def OPCODE5_ALUIPC : OPCODE5<0b11111>;
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def OPCODE5_AUIPC : OPCODE5<0b11110>;
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def OPCODE5_DAHI : OPCODE5<0b00110>;
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def OPCODE5_DATI : OPCODE5<0b11110>;
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def OPCODE5_BC1EQZ : OPCODE5<0b01001>;
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def OPCODE5_BC1NEZ : OPCODE5<0b01101>;
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def OPCODE5_BC2EQZ : OPCODE5<0b01001>;
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def OPCODE5_BC2NEZ : OPCODE5<0b01101>;
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class OPCODE6<bits<6> Val> {
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bits<6> Value = Val;
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@ -138,6 +143,30 @@ class COP1_3R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
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let Inst{5-0} = funct;
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}
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class COP1_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
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bits<5> ft;
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bits<16> offset;
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bits<32> Inst;
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let Inst{31-26} = OPGROUP_COP1.Value;
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let Inst{25-21} = Operation.Value;
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let Inst{20-16} = ft;
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let Inst{15-0} = offset;
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}
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class COP2_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
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bits<5> ct;
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bits<16> offset;
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bits<32> Inst;
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let Inst{31-26} = OPGROUP_COP2.Value;
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let Inst{25-21} = Operation.Value;
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let Inst{20-16} = ct;
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let Inst{15-0} = offset;
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}
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class PCREL16_FM<OPCODE5 Operation> : MipsR6Inst {
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bits<5> rs;
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bits<16> imm;
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@ -107,6 +107,11 @@ class BEQZC_ENC : CMP_BRANCH_OFF21_FM<0b110110>;
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class BGEZALC_ENC : CMP_BRANCH_OFF16_FM<0b000110>;
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class BNEZC_ENC : CMP_BRANCH_OFF21_FM<0b111110>;
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class BC1EQZ_ENC : COP1_BCCZ_FM<OPCODE5_BC1EQZ>;
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class BC1NEZ_ENC : COP1_BCCZ_FM<OPCODE5_BC1NEZ>;
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class BC2EQZ_ENC : COP2_BCCZ_FM<OPCODE5_BC2EQZ>;
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class BC2NEZ_ENC : COP2_BCCZ_FM<OPCODE5_BC2NEZ>;
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class JIALC_ENC : JMP_IDX_COMPACT_FM<0b111110>;
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class JIC_ENC : JMP_IDX_COMPACT_FM<0b110110>;
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@ -326,6 +331,26 @@ class BGTZC_DESC : CMP_CBR_RT_Z_DESC_BASE<"bgtzc", brtarget, GPR32Opnd>;
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class BEQZC_DESC : CMP_CBR_EQNE_Z_DESC_BASE<"beqzc", brtarget21, GPR32Opnd>;
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class BNEZC_DESC : CMP_CBR_EQNE_Z_DESC_BASE<"bnezc", brtarget21, GPR32Opnd>;
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class COP1_BCCZ_DESC_BASE<string instr_asm> : BRANCH_DESC_BASE {
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dag InOperandList = (ins FGR64Opnd:$ft, brtarget:$offset);
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dag OutOperandList = (outs);
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string AsmString = instr_asm;
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bit hasDelaySlot = 1;
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}
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class BC1EQZ_DESC : COP1_BCCZ_DESC_BASE<"bc1eqz $ft, $offset">;
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class BC1NEZ_DESC : COP1_BCCZ_DESC_BASE<"bc1nez $ft, $offset">;
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class COP2_BCCZ_DESC_BASE<string instr_asm> : BRANCH_DESC_BASE {
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dag InOperandList = (ins COP2Opnd:$ct, brtarget:$offset);
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dag OutOperandList = (outs);
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string AsmString = instr_asm;
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bit hasDelaySlot = 1;
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}
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class BC2EQZ_DESC : COP2_BCCZ_DESC_BASE<"bc2eqz $ct, $offset">;
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class BC2NEZ_DESC : COP2_BCCZ_DESC_BASE<"bc2nez $ct, $offset">;
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class JMP_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
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RegisterOperand GPROpnd> {
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dag InOperandList = (ins GPROpnd:$rt, opnd:$offset);
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@ -484,10 +509,10 @@ def ALUIPC : ALUIPC_ENC, ALUIPC_DESC, ISA_MIPS32R6;
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def AUI : AUI_ENC, AUI_DESC, ISA_MIPS32R6;
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def AUIPC : AUIPC_ENC, AUIPC_DESC, ISA_MIPS32R6;
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def BALC : BALC_ENC, BALC_DESC, ISA_MIPS32R6;
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def BC1EQZ;
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def BC1NEZ;
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def BC2EQZ;
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def BC2NEZ;
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def BC1EQZ : BC1EQZ_ENC, BC1EQZ_DESC, ISA_MIPS32R6;
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def BC1NEZ : BC1NEZ_ENC, BC1NEZ_DESC, ISA_MIPS32R6;
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def BC2EQZ : BC2EQZ_ENC, BC2EQZ_DESC, ISA_MIPS32R6;
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def BC2NEZ : BC2NEZ_ENC, BC2NEZ_DESC, ISA_MIPS32R6;
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def BC : BC_ENC, BC_DESC, ISA_MIPS32R6;
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def BEQC : BEQC_ENC, BEQC_DESC, ISA_MIPS32R6;
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def BEQZALC : BEQZALC_ENC, BEQZALC_DESC, ISA_MIPS32R6;
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@ -11,6 +11,14 @@
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auipc $3, -1 # CHECK: auipc $3, -1 # encoding: [0xec,0x7e,0xff,0xff]
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balc 14572256 # CHECK: balc 14572256 # encoding: [0xe8,0x37,0x96,0xb8]
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bc 14572256 # CHECK: bc 14572256 # encoding: [0xc8,0x37,0x96,0xb8]
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bc1eqz $f0,4 # CHECK: bc1eqz $f0, 4 # encoding: [0x45,0x20,0x00,0x01]
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bc1eqz $f31,4 # CHECK: bc1eqz $f31, 4 # encoding: [0x45,0x3f,0x00,0x01]
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bc1nez $f0,4 # CHECK: bc1nez $f0, 4 # encoding: [0x45,0xa0,0x00,0x01]
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bc1nez $f31,4 # CHECK: bc1nez $f31, 4 # encoding: [0x45,0xbf,0x00,0x01]
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bc2eqz $0,8 # CHECK: bc2eqz $0, 8 # encoding: [0x49,0x20,0x00,0x02]
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bc2eqz $31,8 # CHECK: bc2eqz $31, 8 # encoding: [0x49,0x3f,0x00,0x02]
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bc2nez $0,8 # CHECK: bc2nez $0, 8 # encoding: [0x49,0xa0,0x00,0x02]
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bc2nez $31,8 # CHECK: bc2nez $31, 8 # encoding: [0x49,0xbf,0x00,0x02]
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beqc $5, $6, 256 # CHECK: beqc $5, $6, 256 # encoding: [0x20,0xa6,0x00,0x40]
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beqzalc $2, 1332 # CHECK: beqzalc $2, 1332 # encoding: [0x20,0x02,0x01,0x4d]
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bnec $5, $6, 256 # CHECK: bnec $5, $6, 256 # encoding: [0x60,0xa6,0x00,0x40]
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@ -11,6 +11,14 @@
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auipc $3, -1 # CHECK: auipc $3, -1 # encoding: [0xec,0x7e,0xff,0xff]
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balc 14572256 # CHECK: balc 14572256 # encoding: [0xe8,0x37,0x96,0xb8]
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bc 14572256 # CHECK: bc 14572256 # encoding: [0xc8,0x37,0x96,0xb8]
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bc1eqz $f0,4 # CHECK: bc1eqz $f0, 4 # encoding: [0x45,0x20,0x00,0x01]
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bc1eqz $f31,4 # CHECK: bc1eqz $f31, 4 # encoding: [0x45,0x3f,0x00,0x01]
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bc1nez $f0,4 # CHECK: bc1nez $f0, 4 # encoding: [0x45,0xa0,0x00,0x01]
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bc1nez $f31,4 # CHECK: bc1nez $f31, 4 # encoding: [0x45,0xbf,0x00,0x01]
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bc2eqz $0,8 # CHECK: bc2eqz $0, 8 # encoding: [0x49,0x20,0x00,0x02]
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bc2eqz $31,8 # CHECK: bc2eqz $31, 8 # encoding: [0x49,0x3f,0x00,0x02]
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bc2nez $0,8 # CHECK: bc2nez $0, 8 # encoding: [0x49,0xa0,0x00,0x02]
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bc2nez $31,8 # CHECK: bc2nez $31, 8 # encoding: [0x49,0xbf,0x00,0x02]
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beqc $5, $6, 256 # CHECK: beqc $5, $6, 256 # encoding: [0x20,0xa6,0x00,0x40]
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beqzalc $2, 1332 # CHECK: beqzalc $2, 1332 # encoding: [0x20,0x02,0x01,0x4d]
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bnec $5, $6, 256 # CHECK: bnec $5, $6, 256 # encoding: [0x60,0xa6,0x00,0x40]
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