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[GlobalISel] Add IRTranslator support for G_FFLOOR

Follow-up to https://reviews.llvm.org/D57484

Adds G_FFLOOR to translateKnownIntrinsic and update arm64-irtranslator.ll.

Differential Revision: https://reviews.llvm.org/D57485

llvm-svn: 353058
This commit is contained in:
Jessica Paquette 2019-02-04 17:15:34 +00:00
parent b34b9ca867
commit cd735a0458
2 changed files with 13 additions and 0 deletions

View File

@ -1077,6 +1077,11 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
.addDef(getOrCreateVReg(CI)) .addDef(getOrCreateVReg(CI))
.addUse(getOrCreateVReg(*CI.getArgOperand(0))); .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
return true; return true;
case Intrinsic::floor:
MIRBuilder.buildInstr(TargetOpcode::G_FFLOOR)
.addDef(getOrCreateVReg(CI))
.addUse(getOrCreateVReg(*CI.getArgOperand(0)));
return true;
case Intrinsic::cos: case Intrinsic::cos:
MIRBuilder.buildInstr(TargetOpcode::G_FCOS) MIRBuilder.buildInstr(TargetOpcode::G_FCOS)
.addDef(getOrCreateVReg(CI)) .addDef(getOrCreateVReg(CI))

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@ -2324,6 +2324,14 @@ define float @test_sqrt_f32(float %x) {
ret float %y ret float %y
} }
declare float @llvm.floor.f32(float)
define float @test_floor_f32(float %x) {
; CHECK-LABEL: name: test_floor_f32
; CHECK: %{{[0-9]+}}:_(s32) = G_FFLOOR %{{[0-9]+}}
%y = call float @llvm.floor.f32(float %x)
ret float %y
}
; CHECK-LABEL: name: test_llvm.aarch64.neon.ld3.v4i32.p0i32 ; CHECK-LABEL: name: test_llvm.aarch64.neon.ld3.v4i32.p0i32
; CHECK: %1:_(s384) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.neon.ld3), %0(p0) :: (load 48 from %ir.ptr, align 64) ; CHECK: %1:_(s384) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.neon.ld3), %0(p0) :: (load 48 from %ir.ptr, align 64)
define void @test_llvm.aarch64.neon.ld3.v4i32.p0i32(i32* %ptr) { define void @test_llvm.aarch64.neon.ld3.v4i32.p0i32(i32* %ptr) {