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InstCombe: Infer nsw for multiplies
We already utilize this logic for reducing overflow intrinsics, it makes sense to reuse it for normal multiplies as well. llvm-svn: 224847
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@ -382,6 +382,11 @@ public:
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Instruction *CxtI = nullptr) const {
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return llvm::ComputeNumSignBits(Op, DL, Depth, AT, CxtI, DT);
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}
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void ComputeSignBit(Value *V, bool &KnownZero, bool &KnownOne,
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unsigned Depth = 0, Instruction *CxtI = nullptr) const {
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return llvm::ComputeSignBit(V, KnownZero, KnownOne, DL, Depth, AT, CxtI,
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DT);
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}
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private:
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/// SimplifyAssociativeOrCommutative - This performs a few simplifications for
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@ -890,7 +890,6 @@ static bool checkRippleForAdd(const APInt &Op0KnownZero,
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/// (sext (add LHS, RHS)) === (add (sext LHS), (sext RHS))
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/// This basically requires proving that the add in the original type would not
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/// overflow to change the sign bit or have a carry out.
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/// TODO: Handle this for Vectors.
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bool InstCombiner::WillNotOverflowSignedAdd(Value *LHS, Value *RHS,
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Instruction *CxtI) {
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// There are different heuristics we can use for this. Here are some simple
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@ -914,28 +913,27 @@ bool InstCombiner::WillNotOverflowSignedAdd(Value *LHS, Value *RHS,
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ComputeNumSignBits(RHS, 0, CxtI) > 1)
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return true;
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if (IntegerType *IT = dyn_cast<IntegerType>(LHS->getType())) {
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int BitWidth = IT->getBitWidth();
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APInt LHSKnownZero(BitWidth, 0);
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APInt LHSKnownOne(BitWidth, 0);
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computeKnownBits(LHS, LHSKnownZero, LHSKnownOne, 0, CxtI);
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unsigned BitWidth = LHS->getType()->getScalarSizeInBits();
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APInt LHSKnownZero(BitWidth, 0);
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APInt LHSKnownOne(BitWidth, 0);
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computeKnownBits(LHS, LHSKnownZero, LHSKnownOne, 0, CxtI);
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APInt RHSKnownZero(BitWidth, 0);
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APInt RHSKnownOne(BitWidth, 0);
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computeKnownBits(RHS, RHSKnownZero, RHSKnownOne, 0, CxtI);
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APInt RHSKnownZero(BitWidth, 0);
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APInt RHSKnownOne(BitWidth, 0);
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computeKnownBits(RHS, RHSKnownZero, RHSKnownOne, 0, CxtI);
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// Addition of two 2's compliment numbers having opposite signs will never
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// overflow.
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if ((LHSKnownOne[BitWidth - 1] && RHSKnownZero[BitWidth - 1]) ||
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(LHSKnownZero[BitWidth - 1] && RHSKnownOne[BitWidth - 1]))
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return true;
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// Addition of two 2's compliment numbers having opposite signs will never
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// overflow.
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if ((LHSKnownOne[BitWidth - 1] && RHSKnownZero[BitWidth - 1]) ||
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(LHSKnownZero[BitWidth - 1] && RHSKnownOne[BitWidth - 1]))
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return true;
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// Check if carry bit of addition will not cause overflow.
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if (checkRippleForAdd(LHSKnownZero, RHSKnownZero))
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return true;
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if (checkRippleForAdd(RHSKnownZero, LHSKnownZero))
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return true;
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// Check if carry bit of addition will not cause overflow.
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if (checkRippleForAdd(LHSKnownZero, RHSKnownZero))
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return true;
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if (checkRippleForAdd(RHSKnownZero, LHSKnownZero))
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return true;
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}
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return false;
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}
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@ -947,8 +945,8 @@ bool InstCombiner::WillNotOverflowUnsignedAdd(Value *LHS, Value *RHS,
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// If the sign bit of LHS and that of RHS are both zero, no unsigned wrap.
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bool LHSKnownNonNegative, LHSKnownNegative;
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bool RHSKnownNonNegative, RHSKnownNegative;
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ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, DL, 0, AT, CxtI, DT);
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ComputeSignBit(RHS, RHSKnownNonNegative, RHSKnownNegative, DL, 0, AT, CxtI, DT);
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ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, /*Depth=*/0, CxtI);
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ComputeSignBit(RHS, RHSKnownNonNegative, RHSKnownNegative, /*Depth=*/0, CxtI);
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if (LHSKnownNonNegative && RHSKnownNonNegative)
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return true;
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@ -968,24 +966,22 @@ bool InstCombiner::WillNotOverflowSignedSub(Value *LHS, Value *RHS,
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ComputeNumSignBits(RHS, 0, CxtI) > 1)
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return true;
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if (IntegerType *IT = dyn_cast<IntegerType>(LHS->getType())) {
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unsigned BitWidth = IT->getBitWidth();
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APInt LHSKnownZero(BitWidth, 0);
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APInt LHSKnownOne(BitWidth, 0);
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computeKnownBits(LHS, LHSKnownZero, LHSKnownOne, 0, CxtI);
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unsigned BitWidth = LHS->getType()->getScalarSizeInBits();
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APInt LHSKnownZero(BitWidth, 0);
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APInt LHSKnownOne(BitWidth, 0);
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computeKnownBits(LHS, LHSKnownZero, LHSKnownOne, 0, CxtI);
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APInt RHSKnownZero(BitWidth, 0);
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APInt RHSKnownOne(BitWidth, 0);
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computeKnownBits(RHS, RHSKnownZero, RHSKnownOne, 0, CxtI);
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APInt RHSKnownZero(BitWidth, 0);
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APInt RHSKnownOne(BitWidth, 0);
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computeKnownBits(RHS, RHSKnownZero, RHSKnownOne, 0, CxtI);
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// Subtraction of two 2's compliment numbers having identical signs will
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// never overflow.
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if ((LHSKnownOne[BitWidth - 1] && RHSKnownOne[BitWidth - 1]) ||
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(LHSKnownZero[BitWidth - 1] && RHSKnownZero[BitWidth - 1]))
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return true;
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// Subtraction of two 2's compliment numbers having identical signs will
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// never overflow.
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if ((LHSKnownOne[BitWidth - 1] && RHSKnownOne[BitWidth - 1]) ||
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(LHSKnownZero[BitWidth - 1] && RHSKnownZero[BitWidth - 1]))
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return true;
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// TODO: implement logic similar to checkRippleForAdd
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}
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// TODO: implement logic similar to checkRippleForAdd
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return false;
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}
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@ -996,59 +992,14 @@ bool InstCombiner::WillNotOverflowUnsignedSub(Value *LHS, Value *RHS,
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// If the LHS is negative and the RHS is non-negative, no unsigned wrap.
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bool LHSKnownNonNegative, LHSKnownNegative;
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bool RHSKnownNonNegative, RHSKnownNegative;
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ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, DL, 0, AT, CxtI, DT);
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ComputeSignBit(RHS, RHSKnownNonNegative, RHSKnownNegative, DL, 0, AT, CxtI, DT);
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ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, /*Depth=*/0, CxtI);
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ComputeSignBit(RHS, RHSKnownNonNegative, RHSKnownNegative, /*Depth=*/0, CxtI);
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if (LHSKnownNegative && RHSKnownNonNegative)
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return true;
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return false;
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}
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/// \brief Return true if we can prove that:
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/// (mul LHS, RHS) === (mul nsw LHS, RHS)
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bool InstCombiner::WillNotOverflowSignedMul(Value *LHS, Value *RHS,
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Instruction *CxtI) {
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if (IntegerType *IT = dyn_cast<IntegerType>(LHS->getType())) {
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// Multiplying n * m significant bits yields a result of n + m significant
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// bits. If the total number of significant bits does not exceed the
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// result bit width (minus 1), there is no overflow.
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// This means if we have enough leading sign bits in the operands
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// we can guarantee that the result does not overflow.
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// Ref: "Hacker's Delight" by Henry Warren
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unsigned BitWidth = IT->getBitWidth();
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// Note that underestimating the number of sign bits gives a more
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// conservative answer.
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unsigned SignBits = ComputeNumSignBits(LHS, 0, CxtI) +
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ComputeNumSignBits(RHS, 0, CxtI);
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// First handle the easy case: if we have enough sign bits there's
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// definitely no overflow.
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if (SignBits > BitWidth + 1)
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return true;
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// There are two ambiguous cases where there can be no overflow:
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// SignBits == BitWidth + 1 and
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// SignBits == BitWidth
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// The second case is difficult to check, therefore we only handle the
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// first case.
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if (SignBits == BitWidth + 1) {
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// It overflows only when both arguments are negative and the true
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// product is exactly the minimum negative number.
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// E.g. mul i16 with 17 sign bits: 0xff00 * 0xff80 = 0x8000
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// For simplicity we just check if at least one side is not negative.
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bool LHSNonNegative, LHSNegative;
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bool RHSNonNegative, RHSNegative;
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ComputeSignBit(LHS, LHSNonNegative, LHSNegative, DL, 0, AT, CxtI, DT);
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ComputeSignBit(RHS, RHSNonNegative, RHSNegative, DL, 0, AT, CxtI, DT);
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if (LHSNonNegative || RHSNonNegative)
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return true;
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}
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}
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return false;
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}
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// Checks if any operand is negative and we can convert add to sub.
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// This function checks for following negative patterns
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// ADD(XOR(OR(Z, NOT(C)), C)), 1) == NEG(AND(Z, C))
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@ -886,8 +886,7 @@ Value *InstCombiner::simplifyRangeCheck(ICmpInst *Cmp0, ICmpInst *Cmp1,
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// This simplification is only valid if the upper range is not negative.
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bool IsNegative, IsNotNegative;
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ComputeSignBit(RangeEnd, IsNotNegative, IsNegative, DL, 0, AT,
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Cmp1, DT);
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ComputeSignBit(RangeEnd, IsNotNegative, IsNegative, /*Depth=*/0, Cmp1);
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if (!IsNotNegative)
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return nullptr;
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@ -123,6 +123,48 @@ static Constant *getLogBase2Vector(ConstantDataVector *CV) {
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return ConstantVector::get(Elts);
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}
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/// \brief Return true if we can prove that:
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/// (mul LHS, RHS) === (mul nsw LHS, RHS)
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bool InstCombiner::WillNotOverflowSignedMul(Value *LHS, Value *RHS,
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Instruction *CxtI) {
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// Multiplying n * m significant bits yields a result of n + m significant
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// bits. If the total number of significant bits does not exceed the
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// result bit width (minus 1), there is no overflow.
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// This means if we have enough leading sign bits in the operands
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// we can guarantee that the result does not overflow.
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// Ref: "Hacker's Delight" by Henry Warren
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unsigned BitWidth = LHS->getType()->getScalarSizeInBits();
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// Note that underestimating the number of sign bits gives a more
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// conservative answer.
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unsigned SignBits = ComputeNumSignBits(LHS, 0, CxtI) +
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ComputeNumSignBits(RHS, 0, CxtI);
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// First handle the easy case: if we have enough sign bits there's
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// definitely no overflow.
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if (SignBits > BitWidth + 1)
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return true;
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// There are two ambiguous cases where there can be no overflow:
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// SignBits == BitWidth + 1 and
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// SignBits == BitWidth
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// The second case is difficult to check, therefore we only handle the
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// first case.
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if (SignBits == BitWidth + 1) {
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// It overflows only when both arguments are negative and the true
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// product is exactly the minimum negative number.
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// E.g. mul i16 with 17 sign bits: 0xff00 * 0xff80 = 0x8000
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// For simplicity we just check if at least one side is not negative.
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bool LHSNonNegative, LHSNegative;
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bool RHSNonNegative, RHSNegative;
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ComputeSignBit(LHS, LHSNonNegative, LHSNegative, /*Depth=*/0, CxtI);
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ComputeSignBit(RHS, RHSNonNegative, RHSNegative, /*Depth=*/0, CxtI);
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if (LHSNonNegative || RHSNonNegative)
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return true;
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}
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return false;
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}
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Instruction *InstCombiner::visitMul(BinaryOperator &I) {
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bool Changed = SimplifyAssociativeOrCommutative(I);
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Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
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@ -333,6 +375,11 @@ Instruction *InstCombiner::visitMul(BinaryOperator &I) {
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}
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}
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if (!I.hasNoSignedWrap() && WillNotOverflowSignedMul(Op0, Op1, &I)) {
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Changed = true;
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I.setHasNoSignedWrap(true);
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}
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return Changed ? &I : nullptr;
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}
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@ -255,3 +255,15 @@ define i32 @test28(i32 %A) {
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; CHECK-NEXT: %[[shl2:.*]] = shl i32 %[[shl1]], %A
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; CHECK-NEXT: ret i32 %[[shl2]]
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}
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define i64 @test29(i31 %A, i31 %B) {
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; CHECK-LABEL: @test29(
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%C = zext i31 %A to i64
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%D = zext i31 %B to i64
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%E = mul i64 %C, %D
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ret i64 %E
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; CHECK: %[[zext1:.*]] = zext i31 %A to i64
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; CHECK-NEXT: %[[zext2:.*]] = zext i31 %B to i64
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; CHECK-NEXT: %[[mul:.*]] = mul nsw i64 %[[zext1]], %[[zext2]]
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; CHECK-NEXT: ret i64 %[[mul]]
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}
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