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[Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCREL

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Patch by Sid Manning.

llvm-svn: 301955
This commit is contained in:
Krzysztof Parzyszek 2017-05-02 18:15:33 +00:00
parent 7b590043fd
commit ce5fa3511c
9 changed files with 103 additions and 5 deletions
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4
include/llvm/Support/ELFRelocs/Hexagon.def
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@ -99,3 +99,7 @@ ELF_RELOC(R_HEX_LD_GOT_32_6_X, 91)
ELF_RELOC(R_HEX_LD_GOT_16_X, 92)
ELF_RELOC(R_HEX_LD_GOT_11_X, 93)
ELF_RELOC(R_HEX_23_REG, 94)
ELF_RELOC(R_HEX_GD_PLT_B22_PCREL_X, 95)
ELF_RELOC(R_HEX_GD_PLT_B32_PCREL_X, 96)
ELF_RELOC(R_HEX_LD_PLT_B22_PCREL_X, 97)
ELF_RELOC(R_HEX_LD_PLT_B32_PCREL_X, 98)

7
lib/Target/Hexagon/HexagonISelLowering.cpp
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@ -1720,8 +1720,13 @@ HexagonTargetLowering::LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA,
Chain = DAG.getCopyToReg(DAG.getEntryNode(), dl, Hexagon::R0, Chain, InFlag);
InFlag = Chain.getValue(1);
unsigned Flags =
static_cast<const HexagonSubtarget &>(DAG.getSubtarget()).useLongCalls()
? HexagonII::MO_GDPLT | HexagonII::HMOTF_ConstExtended
: HexagonII::MO_GDPLT;
return GetDynamicTLSAddr(DAG, Chain, GA, InFlag, PtrVT,
Hexagon::R0, HexagonII::MO_GDPLT);
Hexagon::R0, Flags);
}
//

2
lib/Target/Hexagon/HexagonMCInstLower.cpp
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@ -39,7 +39,7 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
// Populate the relocation type based on Hexagon target flags
// set on an operand
MCSymbolRefExpr::VariantKind RelocationType;
switch (MO.getTargetFlags()) {
switch (MO.getTargetFlags() & ~HexagonII::HMOTF_ConstExtended) {
default:
RelocationType = MCSymbolRefExpr::VK_None;
break;

14
lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
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@ -184,7 +184,11 @@ public:
{ "fixup_Hexagon_IE_GOT_11_X", 0, 32, 0 },
{ "fixup_Hexagon_TPREL_32_6_X", 0, 32, 0 },
{ "fixup_Hexagon_TPREL_16_X", 0, 32, 0 },
{ "fixup_Hexagon_TPREL_11_X", 0, 32, 0 }
{ "fixup_Hexagon_TPREL_11_X", 0, 32, 0 },
{ "fixup_Hexagon_GD_PLT_B22_PCREL_X",0, 32, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_Hexagon_GD_PLT_B32_PCREL_X",0, 32, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_Hexagon_LD_PLT_B22_PCREL_X",0, 32, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_Hexagon_LD_PLT_B32_PCREL_X",0, 32, MCFixupKindInfo::FKF_IsPCRel }
};
if (Kind < FirstTargetFixupKind)
@ -291,6 +295,10 @@ public:
case fixup_Hexagon_32_PCREL:
case fixup_Hexagon_6_PCREL_X:
case fixup_Hexagon_23_REG:
case fixup_Hexagon_GD_PLT_B22_PCREL_X:
case fixup_Hexagon_GD_PLT_B32_PCREL_X:
case fixup_Hexagon_LD_PLT_B22_PCREL_X:
case fixup_Hexagon_LD_PLT_B32_PCREL_X:
// These relocations should always have a relocation recorded
IsResolved = false;
return;
@ -347,6 +355,8 @@ public:
case fixup_Hexagon_B9_PCREL_X:
case fixup_Hexagon_B7_PCREL:
case fixup_Hexagon_B7_PCREL_X:
case fixup_Hexagon_GD_PLT_B32_PCREL_X:
case fixup_Hexagon_LD_PLT_B32_PCREL_X:
return 4;
}
}
@ -374,6 +384,8 @@ public:
break;
case fixup_Hexagon_B32_PCREL_X:
case fixup_Hexagon_GD_PLT_B32_PCREL_X:
case fixup_Hexagon_LD_PLT_B32_PCREL_X:
Value >>= 6;
break;
}

8
lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
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@ -284,6 +284,14 @@ unsigned HexagonELFObjectWriter::getRelocType(MCContext &Ctx,
return ELF::R_HEX_TPREL_11_X;
case fixup_Hexagon_23_REG:
return ELF::R_HEX_23_REG;
case fixup_Hexagon_GD_PLT_B22_PCREL_X:
return ELF::R_HEX_GD_PLT_B22_PCREL_X;
case fixup_Hexagon_GD_PLT_B32_PCREL_X:
return ELF::R_HEX_GD_PLT_B32_PCREL_X;
case fixup_Hexagon_LD_PLT_B22_PCREL_X:
return ELF::R_HEX_LD_PLT_B22_PCREL_X;
case fixup_Hexagon_LD_PLT_B32_PCREL_X:
return ELF::R_HEX_LD_PLT_B32_PCREL_X;
}
}

4
lib/Target/Hexagon/MCTargetDesc/HexagonFixupKinds.h
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@ -111,6 +111,10 @@ enum Fixups {
fixup_Hexagon_TPREL_16_X,
fixup_Hexagon_TPREL_11_X,
fixup_Hexagon_23_REG,
fixup_Hexagon_GD_PLT_B22_PCREL_X,
fixup_Hexagon_GD_PLT_B32_PCREL_X,
fixup_Hexagon_LD_PLT_B22_PCREL_X,
fixup_Hexagon_LD_PLT_B32_PCREL_X,
LastTargetFixupKind,
NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind

19
lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
View File

@ -199,6 +199,11 @@ Hexagon::Fixups HexagonMCCodeEmitter::getFixupNoBits(
return Hexagon::fixup_Hexagon_IE_GOT_32_6_X;
case MCSymbolRefExpr::VK_Hexagon_PCREL:
return Hexagon::fixup_Hexagon_B32_PCREL_X;
case MCSymbolRefExpr::VK_Hexagon_GD_PLT:
return Hexagon::fixup_Hexagon_GD_PLT_B32_PCREL_X;
case MCSymbolRefExpr::VK_Hexagon_LD_PLT:
return Hexagon::fixup_Hexagon_LD_PLT_B32_PCREL_X;
case MCSymbolRefExpr::VK_None: {
auto Insts = HexagonMCInstrInfo::bundleInstructions(**CurrentBundle);
for (auto I = Insts.begin(), N = Insts.end(); I != N; ++I) {
@ -318,6 +323,8 @@ namespace {
case fixup_Hexagon_PLT_B22_PCREL:
case fixup_Hexagon_GD_PLT_B22_PCREL:
case fixup_Hexagon_LD_PLT_B22_PCREL:
case fixup_Hexagon_GD_PLT_B22_PCREL_X:
case fixup_Hexagon_LD_PLT_B22_PCREL_X:
case fixup_Hexagon_6_PCREL_X:
return true;
default:
@ -414,10 +421,12 @@ unsigned HexagonMCCodeEmitter::getExprOpValue(const MCInst &MI,
case 22:
switch (kind) {
case MCSymbolRefExpr::VK_Hexagon_GD_PLT:
FixupKind = Hexagon::fixup_Hexagon_GD_PLT_B22_PCREL;
FixupKind = *Extended ? Hexagon::fixup_Hexagon_GD_PLT_B22_PCREL_X
: Hexagon::fixup_Hexagon_GD_PLT_B22_PCREL;
break;
case MCSymbolRefExpr::VK_Hexagon_LD_PLT:
FixupKind = Hexagon::fixup_Hexagon_LD_PLT_B22_PCREL;
FixupKind = *Extended ? Hexagon::fixup_Hexagon_LD_PLT_B22_PCREL_X
: Hexagon::fixup_Hexagon_LD_PLT_B22_PCREL;
break;
case MCSymbolRefExpr::VK_None:
FixupKind = *Extended ? Hexagon::fixup_Hexagon_B22_PCREL_X
@ -593,6 +602,12 @@ unsigned HexagonMCCodeEmitter::getExprOpValue(const MCInst &MI,
case MCSymbolRefExpr::VK_Hexagon_LD_GOT:
FixupKind = Hexagon::fixup_Hexagon_LD_GOT_11_X;
break;
case MCSymbolRefExpr::VK_Hexagon_GD_PLT:
FixupKind = Hexagon::fixup_Hexagon_GD_PLT_B22_PCREL_X;
break;
case MCSymbolRefExpr::VK_Hexagon_LD_PLT:
FixupKind = Hexagon::fixup_Hexagon_LD_PLT_B22_PCREL_X;
break;
case MCSymbolRefExpr::VK_None:
FixupKind = Hexagon::fixup_Hexagon_11_X;
break;

37
test/CodeGen/Hexagon/plt-rel.ll Normal file
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@ -0,0 +1,37 @@
; RUN: llc -march=hexagon -relocation-model=pic -mattr=+long-calls < %s | FileCheck --check-prefix=CHECK-LONG %s
; RUN: llc -march=hexagon -relocation-model=pic < %s | FileCheck %s
; CHECK-LONG: call ##_ZL13g_usr1_called@GDPLT
; CHECK-LONG-NOT: call _ZL13g_usr1_called@GDPLT
; CHECK: call _ZL13g_usr1_called@GDPLT
; CHECK-NOT: call ##_ZL13g_usr1_called@GDPLT
target triple = "hexagon"
@_ZL13g_usr1_called = internal thread_local global i32 0, align 4
; Function Attrs: norecurse nounwind
define void @_Z14SigUsr1Handleri(i32) local_unnamed_addr #0 {
entry:
store volatile i32 1, i32* @_ZL13g_usr1_called, align 4
ret void
}
; Function Attrs: norecurse nounwind
define zeroext i1 @_Z27CheckForMonitorCancellationv() local_unnamed_addr #0 {
entry:
%0 = load volatile i32, i32* @_ZL13g_usr1_called, align 4
%tobool = icmp eq i32 %0, 0
br i1 %tobool, label %return, label %if.then
if.then: ; preds = %entry
store volatile i32 0, i32* @_ZL13g_usr1_called, align 4
br label %return
return: ; preds = %entry, %if.then
%.sink = phi i1 [ true, %if.then ], [ false, %entry ]
ret i1 %.sink
}
attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx" }

13
test/MC/Hexagon/plt-rel.s Normal file
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@ -0,0 +1,13 @@
# RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -d -r - | FileCheck %s
call foo@GDPLT
# CHECK: R_HEX_GD_PLT_B22_PCREL
call ##foo@GDPLT
# CHECK: R_HEX_GD_PLT_B32_PCREL_X
# CHECK-NEXT: R_HEX_GD_PLT_B22_PCREL_X
call foo@LDPLT
# CHECK: R_HEX_LD_PLT_B22_PCREL
call ##foo@LDPLT
# CHECK: R_HEX_LD_PLT_B32_PCREL_X
# CHECK-NEXT: R_HEX_LD_PLT_B22_PCREL_X