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Fix PR19136: [ARM] Fix Folding SP Update into vpush/vpop
Sicne MBB->computeRegisterLivenes() returns Dead for sub regs like s0, d0 is used in vpop instead of updating sp, which causes s0 dead before its use. This patch checks the liveness of each subreg to make sure the reg is actually dead. llvm-svn: 204411
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@ -1866,6 +1866,15 @@ void llvm::emitARMRegPlusImmediate(MachineBasicBlock &MBB,
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}
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}
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static bool isAnySubRegLive(unsigned Reg, const TargetRegisterInfo *TRI,
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MachineInstr *MI) {
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for (MCSubRegIterator Subreg(Reg, TRI, /* IncludeSelf */ true);
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Subreg.isValid(); ++Subreg)
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if (MI->getParent()->computeRegisterLiveness(TRI, *Subreg, MI) !=
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MachineBasicBlock::LQR_Dead)
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return true;
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return false;
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}
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bool llvm::tryFoldSPUpdateIntoPushPop(const ARMSubtarget &Subtarget,
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MachineFunction &MF, MachineInstr *MI,
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unsigned NumBytes) {
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@ -1920,7 +1929,6 @@ bool llvm::tryFoldSPUpdateIntoPushPop(const ARMSubtarget &Subtarget,
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for (int i = MI->getNumOperands() - 1; i >= RegListIdx; --i)
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RegList.push_back(MI->getOperand(i));
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MachineBasicBlock *MBB = MI->getParent();
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const TargetRegisterInfo *TRI = MF.getRegInfo().getTargetRegisterInfo();
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const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF);
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@ -1941,9 +1949,11 @@ bool llvm::tryFoldSPUpdateIntoPushPop(const ARMSubtarget &Subtarget,
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// registers live within the function we might clobber a return value
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// register; the other way a register can be live here is if it's
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// callee-saved.
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// TODO: Currently, computeRegisterLiveness() does not report "live" if a
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// sub reg is live. When computeRegisterLiveness() works for sub reg, it
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// can replace isAnySubRegLive().
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if (isCalleeSavedRegister(CurReg, CSRegs) ||
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MBB->computeRegisterLiveness(TRI, CurReg, MI) !=
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MachineBasicBlock::LQR_Dead) {
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isAnySubRegLive(CurReg, TRI, MI)) {
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// VFP pops don't allow holes in the register list, so any skip is fatal
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// for our transformation. GPR pops do, so we should just keep looking.
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if (IsVFPPushPop)
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@ -1,6 +1,7 @@
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; RUN: llc -mtriple=thumbv7-apple-none-macho < %s | FileCheck %s
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; RUN: llc -mtriple=thumbv6m-apple-none-macho -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-T1
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; RUN: llc -mtriple=thumbv7-apple-darwin-ios -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-IOS
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; RUN: llc -mtriple=thumbv7--linux-gnueabi -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-LINUX
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declare void @bar(i8*)
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@ -185,3 +186,33 @@ define void @test_varsize(...) minsize {
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call void @bar(i8* %var)
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ret void
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}
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%"MyClass" = type { i8*, i32, i32, float, float, float, [2 x i8], i32, i32* }
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declare float @foo()
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declare void @bar3()
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declare %"MyClass"* @bar2(%"MyClass"* returned, i16*, i32, float, float, i32, i32, i1 zeroext, i1 zeroext, i32)
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define fastcc float @check_vfp_no_return_clobber2(i16* %r, i16* %chars, i32 %length, i1 zeroext %flag) minsize {
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entry:
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; CHECK-LINUX-LABEL: check_vfp_no_return_clobber2
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; CHECK-LINUX: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8}
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; CHECK-NOT: sub sp,
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; ...
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; CHECK-LINUX: add sp
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; CHECK-LINUX: vpop {d8}
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%run = alloca %"MyClass", align 4
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%call = call %"MyClass"* @bar2(%"MyClass"* %run, i16* %chars, i32 %length, float 0.000000e+00, float 0.000000e+00, i32 1, i32 1, i1 zeroext false, i1 zeroext true, i32 3)
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%call1 = call float @foo()
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%cmp = icmp eq %"MyClass"* %run, null
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br i1 %cmp, label %exit, label %if.then
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if.then: ; preds = %entry
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call void @bar3()
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br label %exit
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exit: ; preds = %if.then, %entry
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ret float %call1
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}
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