mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-19 19:12:56 +02:00
Convert DOUT to DEBUG(errs()...).
llvm-svn: 79752
This commit is contained in:
Bill Wendling
parent
295fc15497
commit
cf51caf09d
@ -627,7 +627,10 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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unsigned MIIdx, MachineOperand& MO,
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unsigned MOIdx,
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LiveInterval &interval) {
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DOUT << "\t\tregister: "; DEBUG(printRegName(interval.reg));
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DEBUG({
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errs() << "\t\tregister: ";
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printRegName(interval.reg);
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});
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// Virtual registers may be defined multiple times (due to phi
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// elimination and 2-addr elimination). Much of what we do only has to be
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@ -672,7 +675,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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"Shouldn't be alive across any blocks!");
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LiveRange LR(defIndex, killIdx, ValNo);
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interval.addRange(LR);
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DOUT << " +" << LR << "\n";
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DEBUG(errs() << " +" << LR << "\n");
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interval.addKill(ValNo, killIdx, false);
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return;
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}
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@ -683,7 +686,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// live into some number of blocks, but gets killed. Start by adding a
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// range that goes from this definition to the end of the defining block.
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LiveRange NewLR(defIndex, getMBBEndIdx(mbb)+1, ValNo);
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DOUT << " +" << NewLR;
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DEBUG(errs() << " +" << NewLR);
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interval.addRange(NewLR);
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// Iterate over all of the blocks that the variable is completely
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@ -695,7 +698,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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getMBBEndIdx(*I)+1, // MBB ends at -1.
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ValNo);
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interval.addRange(LR);
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DOUT << " +" << LR;
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DEBUG(errs() << " +" << LR);
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}
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// Finally, this virtual register is live from the start of any killing
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@ -707,7 +710,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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killIdx, ValNo);
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interval.addRange(LR);
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interval.addKill(ValNo, killIdx, false);
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DOUT << " +" << LR;
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DEBUG(errs() << " +" << LR);
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}
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} else {
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@ -753,7 +756,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// Add the new live interval which replaces the range for the input copy.
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LiveRange LR(DefIndex, RedefIndex, ValNo);
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DOUT << " replace range with " << LR;
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DEBUG(errs() << " replace range with " << LR);
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interval.addRange(LR);
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interval.addKill(ValNo, RedefIndex, false);
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@ -762,9 +765,10 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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if (MO.isDead())
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interval.addRange(LiveRange(RedefIndex, RedefIndex+1, OldValNo));
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DOUT << " RESULT: ";
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interval.print(DOUT, tri_);
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DEBUG({
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errs() << " RESULT: ";
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interval.print(errs(), tri_);
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});
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} else {
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// Otherwise, this must be because of phi elimination. If this is the
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// first redefinition of the vreg that we have seen, go back and change
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@ -778,25 +782,34 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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MachineInstr *Killer = vi.Kills[0];
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unsigned Start = getMBBStartIdx(Killer->getParent());
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unsigned End = getUseIndex(getInstructionIndex(Killer))+1;
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DOUT << " Removing [" << Start << "," << End << "] from: ";
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interval.print(DOUT, tri_); DOUT << "\n";
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DEBUG({
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errs() << " Removing [" << Start << "," << End << "] from: ";
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interval.print(errs(), tri_);
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errs() << "\n";
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});
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interval.removeRange(Start, End);
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assert(interval.ranges.size() == 1 &&
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"newly discovered PHI interval has >1 ranges.");
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MachineBasicBlock *killMBB = getMBBFromIndex(interval.endNumber());
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interval.addKill(VNI, terminatorGaps[killMBB], true);
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VNI->setHasPHIKill(true);
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DOUT << " RESULT: "; interval.print(DOUT, tri_);
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DEBUG({
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errs() << " RESULT: ";
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interval.print(errs(), tri_);
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});
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// Replace the interval with one of a NEW value number. Note that this
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// value number isn't actually defined by an instruction, weird huh? :)
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LiveRange LR(Start, End,
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interval.getNextValue(mbb->getNumber(), 0, false, VNInfoAllocator));
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LR.valno->setIsPHIDef(true);
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DOUT << " replace range with " << LR;
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DEBUG(errs() << " replace range with " << LR);
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interval.addRange(LR);
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interval.addKill(LR.valno, End, false);
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DOUT << " RESULT: "; interval.print(DOUT, tri_);
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DEBUG({
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errs() << " RESULT: ";
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interval.print(errs(), tri_);
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});
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}
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// In the case of PHI elimination, each variable definition is only
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@ -821,11 +834,11 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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interval.addRange(LR);
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interval.addKill(ValNo, terminatorGaps[mbb], true);
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ValNo->setHasPHIKill(true);
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DOUT << " +" << LR;
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DEBUG(errs() << " +" << LR);
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}
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}
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DOUT << '\n';
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DEBUG(errs() << '\n');
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}
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void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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@ -836,7 +849,10 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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MachineInstr *CopyMI) {
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// A physical register cannot be live across basic block, so its
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// lifetime must end somewhere in its defining basic block.
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DOUT << "\t\tregister: "; DEBUG(printRegName(interval.reg));
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DEBUG({
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errs() << "\t\tregister: ";
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printRegName(interval.reg);
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});
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unsigned baseIndex = MIIdx;
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unsigned start = getDefIndex(baseIndex);
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@ -849,7 +865,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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// the instruction defining it. Hence its interval is:
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// [defSlot(def), defSlot(def)+1)
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if (MO.isDead()) {
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DOUT << " dead";
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DEBUG(errs() << " dead");
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end = start + 1;
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goto exit;
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}
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@ -863,7 +879,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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getInstructionFromIndex(baseIndex) == 0)
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baseIndex += InstrSlots::NUM;
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if (mi->killsRegister(interval.reg, tri_)) {
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DOUT << " killed";
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DEBUG(errs() << " killed");
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end = getUseIndex(baseIndex) + 1;
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goto exit;
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} else {
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@ -879,7 +895,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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// Then the register is essentially dead at the instruction that defines
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// it. Hence its interval is:
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// [defSlot(def), defSlot(def)+1)
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DOUT << " dead";
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DEBUG(errs() << " dead");
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end = start + 1;
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}
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goto exit;
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@ -908,7 +924,7 @@ exit:
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LiveRange LR(start, end, ValNo);
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interval.addRange(LR);
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interval.addKill(LR.valno, end, false);
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DOUT << " +" << LR << '\n';
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DEBUG(errs() << " +" << LR << '\n');
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}
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void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
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@ -942,7 +958,10 @@ void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
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void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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unsigned MIIdx,
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LiveInterval &interval, bool isAlias) {
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DOUT << "\t\tlivein register: "; DEBUG(printRegName(interval.reg));
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DEBUG({
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errs() << "\t\tlivein register: ";
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printRegName(interval.reg);
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});
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// Look for kills, if it reaches a def before it's killed, then it shouldn't
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// be considered a livein.
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@ -957,7 +976,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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while (mi != MBB->end()) {
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if (mi->killsRegister(interval.reg, tri_)) {
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DOUT << " killed";
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DEBUG(errs() << " killed");
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end = getUseIndex(baseIndex) + 1;
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SeenDefUse = true;
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break;
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@ -966,7 +985,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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// Then the register is essentially dead at the instruction that defines
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// it. Hence its interval is:
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// [defSlot(def), defSlot(def)+1)
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DOUT << " dead";
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DEBUG(errs() << " dead");
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end = getDefIndex(start) + 1;
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SeenDefUse = true;
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break;
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@ -984,10 +1003,10 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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// Live-in register might not be used at all.
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if (!SeenDefUse) {
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if (isAlias) {
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DOUT << " dead";
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DEBUG(errs() << " dead");
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end = getDefIndex(MIIdx) + 1;
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} else {
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DOUT << " live through";
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DEBUG(errs() << " live through");
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end = baseIndex;
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}
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}
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@ -999,7 +1018,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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interval.addRange(LR);
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interval.addKill(LR.valno, end, false);
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DOUT << " +" << LR << '\n';
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DEBUG(errs() << " +" << LR << '\n');
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}
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/// computeIntervals - computes the live intervals for virtual
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@ -1007,10 +1026,9 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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/// live interval is an interval [i, j) where 1 <= i <= j < N for
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/// which a variable is live
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void LiveIntervals::computeIntervals() {
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DEBUG(errs() << "********** COMPUTING LIVE INTERVALS **********\n"
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<< "********** Function: "
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<< ((Value*)mf_->getFunction())->getName() << '\n');
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<< "********** Function: "
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<< ((Value*)mf_->getFunction())->getName() << '\n');
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SmallVector<unsigned, 8> UndefUses;
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for (MachineFunction::iterator MBBI = mf_->begin(), E = mf_->end();
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@ -1039,7 +1057,7 @@ void LiveIntervals::computeIntervals() {
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MIIndex += InstrSlots::NUM;
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for (; MI != miEnd; ++MI) {
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DOUT << MIIndex << "\t" << *MI;
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DEBUG(errs() << MIIndex << "\t" << *MI);
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// Handle defs.
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for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
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@ -1523,8 +1541,8 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI,
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// If this is the rematerializable definition MI itself and
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// all of its uses are rematerialized, simply delete it.
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if (MI == ReMatOrigDefMI && CanDelete) {
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DOUT << "\t\t\t\tErasing re-materlizable def: ";
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DOUT << MI << '\n';
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DEBUG(errs() << "\t\t\t\tErasing re-materlizable def: "
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<< MI << '\n');
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RemoveMachineInstrFromMaps(MI);
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vrm.RemoveMachineInstrFromMaps(MI);
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MI->eraseFromParent();
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@ -1670,27 +1688,29 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI,
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if (CreatedNewVReg) {
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LiveRange LR(getLoadIndex(index), getUseIndex(index)+1,
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nI.getNextValue(0, 0, false, VNInfoAllocator));
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DOUT << " +" << LR;
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DEBUG(errs() << " +" << LR);
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nI.addRange(LR);
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} else {
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// Extend the split live interval to this def / use.
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unsigned End = getUseIndex(index)+1;
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LiveRange LR(nI.ranges[nI.ranges.size()-1].end, End,
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nI.getValNumInfo(nI.getNumValNums()-1));
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DOUT << " +" << LR;
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DEBUG(errs() << " +" << LR);
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nI.addRange(LR);
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}
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}
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if (HasDef) {
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LiveRange LR(getDefIndex(index), getStoreIndex(index),
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nI.getNextValue(0, 0, false, VNInfoAllocator));
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DOUT << " +" << LR;
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DEBUG(errs() << " +" << LR);
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nI.addRange(LR);
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}
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DOUT << "\t\t\t\tAdded new interval: ";
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nI.print(DOUT, tri_);
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DOUT << '\n';
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DEBUG({
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errs() << "\t\t\t\tAdded new interval: ";
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nI.print(errs(), tri_);
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errs() << '\n';
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});
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}
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return CanFold;
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}
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@ -2015,9 +2035,11 @@ addIntervalsForSpillsFast(const LiveInterval &li,
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assert(li.weight != HUGE_VALF &&
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"attempt to spill already spilled interval!");
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DOUT << "\t\t\t\tadding intervals for spills for interval: ";
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DEBUG(li.dump());
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DOUT << '\n';
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DEBUG({
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errs() << "\t\t\t\tadding intervals for spills for interval: ";
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li.dump();
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errs() << '\n';
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});
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const TargetRegisterClass* rc = mri_->getRegClass(li.reg);
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@ -2066,23 +2088,25 @@ addIntervalsForSpillsFast(const LiveInterval &li,
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if (HasUse) {
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LiveRange LR(getLoadIndex(index), getUseIndex(index),
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nI.getNextValue(0, 0, false, getVNInfoAllocator()));
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DOUT << " +" << LR;
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DEBUG(errs() << " +" << LR);
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nI.addRange(LR);
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vrm.addRestorePoint(NewVReg, MI);
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}
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if (HasDef) {
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LiveRange LR(getDefIndex(index), getStoreIndex(index),
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nI.getNextValue(0, 0, false, getVNInfoAllocator()));
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DOUT << " +" << LR;
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DEBUG(errs() << " +" << LR);
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nI.addRange(LR);
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vrm.addSpillPoint(NewVReg, true, MI);
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}
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added.push_back(&nI);
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DOUT << "\t\t\t\tadded new interval: ";
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DEBUG(nI.dump());
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DOUT << '\n';
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DEBUG({
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errs() << "\t\t\t\tadded new interval: ";
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nI.dump();
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errs() << '\n';
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});
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}
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@ -2103,9 +2127,11 @@ addIntervalsForSpills(const LiveInterval &li,
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assert(li.weight != HUGE_VALF &&
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"attempt to spill already spilled interval!");
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DOUT << "\t\t\t\tadding intervals for spills for interval: ";
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li.print(DOUT, tri_);
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DOUT << '\n';
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DEBUG({
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errs() << "\t\t\t\tadding intervals for spills for interval: ";
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li.print(errs(), tri_);
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errs() << '\n';
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});
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// Each bit specify whether a spill is required in the MBB.
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BitVector SpillMBBs(mf_->getNumBlockIDs());
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