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llvm-svn: 238126
This commit is contained in:
NAKAMURA Takumi 2015-05-25 01:43:34 +00:00
parent f5fce1248c
commit cf52b65e57
6 changed files with 88 additions and 92 deletions
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3
lib/CodeGen/CoreCLRGC.cpp
View File

@ -47,8 +47,7 @@ public:
};
}
static GCRegistry::Add<CoreCLRGC> X("coreclr",
"CoreCLR-compatible GC");
static GCRegistry::Add<CoreCLRGC> X("coreclr", "CoreCLR-compatible GC");
namespace llvm {
void linkCoreCLRGC() {}

3
lib/Support/Twine.cpp
View File

@ -119,8 +119,7 @@ void Twine::printOneChildRepr(raw_ostream &OS, Child Ptr,
<< Ptr.stringRef << "\"";
break;
case Twine::SmallStringKind:
OS << "smallstring:\""
<< *Ptr.smallString << "\"";
OS << "smallstring:\"" << *Ptr.smallString << "\"";
break;
case Twine::CharKind:
OS << "char:\"" << Ptr.character << "\"";

129
lib/Target/X86/InstPrinter/X86InstComments.cpp
View File

@ -131,9 +131,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
// FALL THROUGH.
case X86::BLENDPDrmi:
case X86::VBLENDPDrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeBLENDMask(MVT::v2f64,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -142,9 +142,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
case X86::VBLENDPDYrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeBLENDMask(MVT::v4f64,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -156,9 +156,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
// FALL THROUGH.
case X86::BLENDPSrmi:
case X86::VBLENDPSrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeBLENDMask(MVT::v4f32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -167,9 +167,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
case X86::VBLENDPSYrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeBLENDMask(MVT::v8f32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -181,9 +181,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
// FALL THROUGH.
case X86::PBLENDWrmi:
case X86::VPBLENDWrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeBLENDMask(MVT::v8i16,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -192,9 +192,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
case X86::VPBLENDWYrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeBLENDMask(MVT::v16i16,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -204,9 +204,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
case X86::VPBLENDDrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeBLENDMask(MVT::v4i32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -216,9 +216,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
case X86::VPBLENDDYrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeBLENDMask(MVT::v8i32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -232,8 +232,8 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::VINSERTPSrm:
DestName = getRegName(MI->getOperand(0).getReg());
Src1Name = getRegName(MI->getOperand(1).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands()-1).getImm(),
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
@ -311,18 +311,18 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::VPSLLDQri:
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSLLDQMask(MVT::v16i8,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
case X86::VPSLLDQYri:
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSLLDQMask(MVT::v32i8,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
@ -330,18 +330,18 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::VPSRLDQri:
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSRLDQMask(MVT::v16i8,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
case X86::VPSRLDQYri:
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSRLDQMask(MVT::v32i8,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
@ -353,9 +353,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::VPALIGNR128rm:
Src2Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePALIGNRMask(MVT::v16i8,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
case X86::VPALIGNR256rr:
@ -364,9 +364,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::VPALIGNR256rm:
Src2Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePALIGNRMask(MVT::v32i8,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
@ -377,9 +377,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::PSHUFDmi:
case X86::VPSHUFDmi:
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFMask(MVT::v4i32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
case X86::VPSHUFDYri:
@ -387,13 +387,12 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
// FALL THROUGH.
case X86::VPSHUFDYmi:
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFMask(MVT::v8i32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
case X86::PSHUFHWri:
case X86::VPSHUFHWri:
Src1Name = getRegName(MI->getOperand(1).getReg());
@ -401,9 +400,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::PSHUFHWmi:
case X86::VPSHUFHWmi:
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFHWMask(MVT::v8i16,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
case X86::VPSHUFHWYri:
@ -411,9 +410,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
// FALL THROUGH.
case X86::VPSHUFHWYmi:
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFHWMask(MVT::v16i16,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
case X86::PSHUFLWri:
@ -423,9 +422,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::PSHUFLWmi:
case X86::VPSHUFLWmi:
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFLWMask(MVT::v8i16,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
case X86::VPSHUFLWYri:
@ -433,9 +432,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
// FALL THROUGH.
case X86::VPSHUFLWYmi:
DestName = getRegName(MI->getOperand(0).getReg());
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFLWMask(MVT::v16i16,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
break;
@ -623,9 +622,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
// FALL THROUGH.
case X86::SHUFPDrmi:
case X86::VSHUFPDrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeSHUFPMask(MVT::v2f64,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -634,9 +633,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
case X86::VSHUFPDYrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeSHUFPMask(MVT::v4f64,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -648,9 +647,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
// FALL THROUGH.
case X86::SHUFPSrmi:
case X86::VSHUFPSrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeSHUFPMask(MVT::v4f32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -659,9 +658,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH.
case X86::VSHUFPSYrmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeSHUFPMask(MVT::v8f32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -775,9 +774,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src1Name = getRegName(MI->getOperand(1).getReg());
// FALL THROUGH.
case X86::VPERMILPSmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFMask(MVT::v4f32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
@ -785,9 +784,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src1Name = getRegName(MI->getOperand(1).getReg());
// FALL THROUGH.
case X86::VPERMILPSYmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFMask(MVT::v8f32,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
@ -795,9 +794,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src1Name = getRegName(MI->getOperand(1).getReg());
// FALL THROUGH.
case X86::VPERMILPDmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFMask(MVT::v2f64,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
@ -805,9 +804,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src1Name = getRegName(MI->getOperand(1).getReg());
// FALL THROUGH.
case X86::VPERMILPDYmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodePSHUFMask(MVT::v4f64,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
@ -818,9 +817,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::VPERM2F128rm:
case X86::VPERM2I128rm:
// For instruction comments purpose, assume the 256-bit vector is v4i64.
if(MI->getOperand(MI->getNumOperands()-1).isImm())
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeVPERM2X128Mask(MVT::v4i64,
MI->getOperand(MI->getNumOperands()-1).getImm(),
MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg());
@ -831,8 +830,8 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
// FALL THROUGH.
case X86::VPERMQYmi:
case X86::VPERMPDYmi:
if(MI->getOperand(MI->getNumOperands()-1).isImm())
DecodeVPERMMask(MI->getOperand(MI->getNumOperands()-1).getImm(),
if (MI->getOperand(MI->getNumOperands() - 1).isImm())
DecodeVPERMMask(MI->getOperand(MI->getNumOperands() - 1).getImm(),
ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
@ -937,7 +936,7 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
if (Src1Name == Src2Name) {
for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
ShuffleMask[i] >= (int)e) // From second mask.
ShuffleMask[i] >= (int)e) // From second mask.
ShuffleMask[i] -= e;
}
}
@ -972,7 +971,7 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
++i;
}
OS << ']';
--i; // For loop increments element #.
--i; // For loop increments element #.
}
//MI->print(OS, 0);
OS << "\n";

38
lib/Target/X86/Utils/X86ShuffleDecode.cpp
View File

@ -35,7 +35,7 @@ void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
unsigned CountS = (Imm >> 6) & 3;
// CountS selects which input element to use.
unsigned InVal = 4+CountS;
unsigned InVal = 4 + CountS;
// CountD specifies which element of destination to update.
ShuffleMask[CountD] = InVal;
// ZMask zaps values, potentially overriding the CountD elt.
@ -47,20 +47,20 @@ void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
// <3,1> or <6,7,2,3>
void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask) {
for (unsigned i = NElts/2; i != NElts; ++i)
ShuffleMask.push_back(NElts+i);
for (unsigned i = NElts / 2; i != NElts; ++i)
ShuffleMask.push_back(NElts + i);
for (unsigned i = NElts/2; i != NElts; ++i)
for (unsigned i = NElts / 2; i != NElts; ++i)
ShuffleMask.push_back(i);
}
// <0,2> or <0,1,4,5>
void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask) {
for (unsigned i = 0; i != NElts/2; ++i)
for (unsigned i = 0; i != NElts / 2; ++i)
ShuffleMask.push_back(i);
for (unsigned i = 0; i != NElts/2; ++i)
ShuffleMask.push_back(NElts+i);
for (unsigned i = 0; i != NElts / 2; ++i)
ShuffleMask.push_back(NElts + i);
}
void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
@ -203,8 +203,8 @@ void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
unsigned NewImm = Imm;
for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
// each half of a lane comes from different source
for (unsigned s = 0; s != NumElts*2; s += NumElts) {
for (unsigned i = 0; i != NumLaneElts/2; ++i) {
for (unsigned s = 0; s != NumElts * 2; s += NumElts) {
for (unsigned i = 0; i != NumLaneElts / 2; ++i) {
ShuffleMask.push_back(NewImm % NumLaneElts + s + l);
NewImm /= NumLaneElts;
}
@ -226,9 +226,9 @@ void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumLaneElts = NumElts / NumLanes;
for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
for (unsigned i = l + NumLaneElts/2, e = l + NumLaneElts; i != e; ++i) {
ShuffleMask.push_back(i); // Reads from dest/src1
ShuffleMask.push_back(i+NumElts); // Reads from src/src2
for (unsigned i = l + NumLaneElts / 2, e = l + NumLaneElts; i != e; ++i) {
ShuffleMask.push_back(i); // Reads from dest/src1
ShuffleMask.push_back(i + NumElts); // Reads from src/src2
}
}
}
@ -246,9 +246,9 @@ void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) {
unsigned NumLaneElts = NumElts / NumLanes;
for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
for (unsigned i = l, e = l + NumLaneElts/2; i != e; ++i) {
ShuffleMask.push_back(i); // Reads from dest/src1
ShuffleMask.push_back(i+NumElts); // Reads from src/src2
for (unsigned i = l, e = l + NumLaneElts / 2; i != e; ++i) {
ShuffleMask.push_back(i); // Reads from dest/src1
ShuffleMask.push_back(i + NumElts); // Reads from src/src2
}
}
}
@ -258,11 +258,11 @@ void DecodeVPERM2X128Mask(MVT VT, unsigned Imm,
if (Imm & 0x88)
return; // Not a shuffle
unsigned HalfSize = VT.getVectorNumElements()/2;
unsigned HalfSize = VT.getVectorNumElements() / 2;
for (unsigned l = 0; l != 2; ++l) {
unsigned HalfBegin = ((Imm >> (l*4)) & 0x3) * HalfSize;
for (unsigned i = HalfBegin, e = HalfBegin+HalfSize; i != e; ++i)
unsigned HalfBegin = ((Imm >> (l * 4)) & 0x3) * HalfSize;
for (unsigned i = HalfBegin, e = HalfBegin + HalfSize; i != e; ++i)
ShuffleMask.push_back(i);
}
}
@ -355,7 +355,7 @@ void DecodeBLENDMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
/// No VT provided since it only works on 256-bit, 4 element vectors.
void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
for (unsigned i = 0; i != 4; ++i) {
ShuffleMask.push_back((Imm >> (2*i)) & 3);
ShuffleMask.push_back((Imm >> (2 * i)) & 3);
}
}

2
lib/Transforms/Scalar/PlaceSafepoints.cpp
View File

@ -528,7 +528,7 @@ static bool shouldRewriteFunction(Function &F) {
const StringRef StatepointExampleName("statepoint-example");
const StringRef CoreCLRName("coreclr");
return (StatepointExampleName == FunctionGCName) ||
(CoreCLRName == FunctionGCName);
(CoreCLRName == FunctionGCName);
} else
return false;
}

5
lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
View File

@ -2206,9 +2206,8 @@ static bool shouldRewriteStatepointsIn(Function &F) {
const StringRef StatepointExampleName("statepoint-example");
const StringRef CoreCLRName("coreclr");
return (StatepointExampleName == FunctionGCName) ||
(CoreCLRName == FunctionGCName);
}
else
(CoreCLRName == FunctionGCName);
} else
return false;
}