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[Hexagon] Use IMPLICIT_DEF to any-extend 32-bit values to 64 bits

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llvm-svn: 349199
This commit is contained in:
Krzysztof Parzyszek 2018-12-14 22:05:44 +00:00
parent 4721404602
commit cf57538afc
1 changed files with 25 additions and 23 deletions
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48
lib/Target/Hexagon/HexagonPatterns.td
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@ -218,6 +218,8 @@ def I1toI32: OutPatFrag<(ops node:$Rs), (C2_muxii (i1 $Rs), 1, 0)>;
def I32toI1: OutPatFrag<(ops node:$Rs), (i1 (C2_cmpgtui (i32 $Rs), (i32 0)))>;
def ToZext64: OutPatFrag<(ops node:$Rs), (i64 (A4_combineir 0, (i32 $Rs)))>;
def ToSext64: OutPatFrag<(ops node:$Rs), (i64 (A2_sxtw (i32 $Rs)))>;
def ToAext64: OutPatFrag<(ops node:$Rs),
(REG_SEQUENCE DoubleRegs, (i32 (IMPLICIT_DEF)), isub_hi, (i32 $Rs), isub_lo)>;
def Combinew: OutPatFrag<(ops node:$Rs, node:$Rt),
(REG_SEQUENCE DoubleRegs, $Rs, isub_hi, $Rt, isub_lo)>;
@ -811,9 +813,9 @@ def: Pat<(select (not I1:$Pu), F32:$Rt, f32ImmPred:$I),
(C2_muxri I1:$Pu, (ftoi $I), F32:$Rt)>;
def: Pat<(select I1:$Pu, V4I8:$Rs, V4I8:$Rt),
(LoReg (C2_vmux I1:$Pu, (ToZext64 $Rs), (ToZext64 $Rt)))>;
(LoReg (C2_vmux I1:$Pu, (ToAext64 $Rs), (ToAext64 $Rt)))>;
def: Pat<(select I1:$Pu, V2I16:$Rs, V2I16:$Rt),
(LoReg (C2_vmux I1:$Pu, (ToZext64 $Rs), (ToZext64 $Rt)))>;
(LoReg (C2_vmux I1:$Pu, (ToAext64 $Rs), (ToAext64 $Rt)))>;
def: Pat<(select I1:$Pu, V2I32:$Rs, V2I32:$Rt),
(Combinew (C2_mux I1:$Pu, (HiReg $Rs), (HiReg $Rt)),
(C2_mux I1:$Pu, (LoReg $Rs), (LoReg $Rt)))>;
@ -1512,9 +1514,9 @@ def: Pat<(add V2I32:$Rx, (mul V2I32:$Rs, V2I32:$Rt)),
// Add/subtract two v4i8: Hexagon does not have an insn for this one, so
// we use the double add v8i8, and use only the low part of the result.
def: Pat<(add V4I8:$Rs, V4I8:$Rt),
(LoReg (A2_vaddub (ToZext64 $Rs), (ToZext64 $Rt)))>;
(LoReg (A2_vaddub (ToAext64 $Rs), (ToAext64 $Rt)))>;
def: Pat<(sub V4I8:$Rs, V4I8:$Rt),
(LoReg (A2_vsubub (ToZext64 $Rs), (ToZext64 $Rt)))>;
(LoReg (A2_vsubub (ToAext64 $Rs), (ToAext64 $Rt)))>;
// Use M2_vmpy2s_s0 for half-word vector multiply. It multiplies two
// half-words, and saturates the result to a 32-bit value, except the
@ -1863,10 +1865,10 @@ let AddedComplexity = 20 in {
}
let AddedComplexity = 30 in {
defm: Loadxim_pat<extloadi1, i64, ToZext64, anyimm0, L2_loadrub_io>;
defm: Loadxim_pat<extloadi8, i64, ToZext64, anyimm0, L2_loadrub_io>;
defm: Loadxim_pat<extloadi16, i64, ToZext64, anyimm1, L2_loadruh_io>;
defm: Loadxim_pat<extloadi32, i64, ToZext64, anyimm2, L2_loadri_io>;
defm: Loadxim_pat<extloadi1, i64, ToAext64, anyimm0, L2_loadrub_io>;
defm: Loadxim_pat<extloadi8, i64, ToAext64, anyimm0, L2_loadrub_io>;
defm: Loadxim_pat<extloadi16, i64, ToAext64, anyimm1, L2_loadruh_io>;
defm: Loadxim_pat<extloadi32, i64, ToAext64, anyimm2, L2_loadri_io>;
defm: Loadxim_pat<zextloadi1, i64, ToZext64, anyimm0, L2_loadrub_io>;
defm: Loadxim_pat<zextloadi8, i64, ToZext64, anyimm0, L2_loadrub_io>;
defm: Loadxim_pat<zextloadi16, i64, ToZext64, anyimm1, L2_loadruh_io>;
@ -1901,13 +1903,13 @@ let AddedComplexity = 60 in {
def: Loadxum_pat<sextloadi8, i64, anyimm0, ToSext64, L4_loadrb_ur>;
def: Loadxum_pat<zextloadi8, i64, anyimm0, ToZext64, L4_loadrub_ur>;
def: Loadxum_pat<extloadi8, i64, anyimm0, ToZext64, L4_loadrub_ur>;
def: Loadxum_pat<extloadi8, i64, anyimm0, ToAext64, L4_loadrub_ur>;
def: Loadxum_pat<sextloadi16, i64, anyimm1, ToSext64, L4_loadrh_ur>;
def: Loadxum_pat<zextloadi16, i64, anyimm1, ToZext64, L4_loadruh_ur>;
def: Loadxum_pat<extloadi16, i64, anyimm1, ToZext64, L4_loadruh_ur>;
def: Loadxum_pat<extloadi16, i64, anyimm1, ToAext64, L4_loadruh_ur>;
def: Loadxum_pat<sextloadi32, i64, anyimm2, ToSext64, L4_loadri_ur>;
def: Loadxum_pat<zextloadi32, i64, anyimm2, ToZext64, L4_loadri_ur>;
def: Loadxum_pat<extloadi32, i64, anyimm2, ToZext64, L4_loadri_ur>;
def: Loadxum_pat<extloadi32, i64, anyimm2, ToAext64, L4_loadri_ur>;
}
let AddedComplexity = 40 in {
@ -1947,25 +1949,25 @@ let AddedComplexity = 20 in {
}
let AddedComplexity = 40 in {
def: Loadxrm_shl_pat<extloadi8, i64, ToZext64, L4_loadrub_rr>;
def: Loadxrm_shl_pat<extloadi8, i64, ToAext64, L4_loadrub_rr>;
def: Loadxrm_shl_pat<zextloadi8, i64, ToZext64, L4_loadrub_rr>;
def: Loadxrm_shl_pat<sextloadi8, i64, ToSext64, L4_loadrb_rr>;
def: Loadxrm_shl_pat<extloadi16, i64, ToZext64, L4_loadruh_rr>;
def: Loadxrm_shl_pat<extloadi16, i64, ToAext64, L4_loadruh_rr>;
def: Loadxrm_shl_pat<zextloadi16, i64, ToZext64, L4_loadruh_rr>;
def: Loadxrm_shl_pat<sextloadi16, i64, ToSext64, L4_loadrh_rr>;
def: Loadxrm_shl_pat<extloadi32, i64, ToZext64, L4_loadri_rr>;
def: Loadxrm_shl_pat<extloadi32, i64, ToAext64, L4_loadri_rr>;
def: Loadxrm_shl_pat<zextloadi32, i64, ToZext64, L4_loadri_rr>;
def: Loadxrm_shl_pat<sextloadi32, i64, ToSext64, L4_loadri_rr>;
}
let AddedComplexity = 20 in {
def: Loadxrm_add_pat<extloadi8, i64, ToZext64, L4_loadrub_rr>;
def: Loadxrm_add_pat<extloadi8, i64, ToAext64, L4_loadrub_rr>;
def: Loadxrm_add_pat<zextloadi8, i64, ToZext64, L4_loadrub_rr>;
def: Loadxrm_add_pat<sextloadi8, i64, ToSext64, L4_loadrb_rr>;
def: Loadxrm_add_pat<extloadi16, i64, ToZext64, L4_loadruh_rr>;
def: Loadxrm_add_pat<extloadi16, i64, ToAext64, L4_loadruh_rr>;
def: Loadxrm_add_pat<zextloadi16, i64, ToZext64, L4_loadruh_rr>;
def: Loadxrm_add_pat<sextloadi16, i64, ToSext64, L4_loadrh_rr>;
def: Loadxrm_add_pat<extloadi32, i64, ToZext64, L4_loadri_rr>;
def: Loadxrm_add_pat<extloadi32, i64, ToAext64, L4_loadri_rr>;
def: Loadxrm_add_pat<zextloadi32, i64, ToZext64, L4_loadri_rr>;
def: Loadxrm_add_pat<sextloadi32, i64, ToSext64, L4_loadri_rr>;
}
@ -1997,13 +1999,13 @@ let AddedComplexity = 60 in {
}
let AddedComplexity = 30 in {
def: Loadam_pat<extloadi8, i64, anyimm0, ToZext64, PS_loadrubabs>;
def: Loadam_pat<extloadi8, i64, anyimm0, ToAext64, PS_loadrubabs>;
def: Loadam_pat<sextloadi8, i64, anyimm0, ToSext64, PS_loadrbabs>;
def: Loadam_pat<zextloadi8, i64, anyimm0, ToZext64, PS_loadrubabs>;
def: Loadam_pat<extloadi16, i64, anyimm1, ToZext64, PS_loadruhabs>;
def: Loadam_pat<extloadi16, i64, anyimm1, ToAext64, PS_loadruhabs>;
def: Loadam_pat<sextloadi16, i64, anyimm1, ToSext64, PS_loadrhabs>;
def: Loadam_pat<zextloadi16, i64, anyimm1, ToZext64, PS_loadruhabs>;
def: Loadam_pat<extloadi32, i64, anyimm2, ToZext64, PS_loadriabs>;
def: Loadam_pat<extloadi32, i64, anyimm2, ToAext64, PS_loadriabs>;
def: Loadam_pat<sextloadi32, i64, anyimm2, ToSext64, PS_loadriabs>;
def: Loadam_pat<zextloadi32, i64, anyimm2, ToZext64, PS_loadriabs>;
@ -2039,13 +2041,13 @@ let AddedComplexity = 100 in {
}
let AddedComplexity = 70 in {
def: Loadam_pat<extloadi8, i64, addrgp, ToZext64, L2_loadrubgp>;
def: Loadam_pat<extloadi8, i64, addrgp, ToAext64, L2_loadrubgp>;
def: Loadam_pat<sextloadi8, i64, addrgp, ToSext64, L2_loadrbgp>;
def: Loadam_pat<zextloadi8, i64, addrgp, ToZext64, L2_loadrubgp>;
def: Loadam_pat<extloadi16, i64, addrgp, ToZext64, L2_loadruhgp>;
def: Loadam_pat<extloadi16, i64, addrgp, ToAext64, L2_loadruhgp>;
def: Loadam_pat<sextloadi16, i64, addrgp, ToSext64, L2_loadrhgp>;
def: Loadam_pat<zextloadi16, i64, addrgp, ToZext64, L2_loadruhgp>;
def: Loadam_pat<extloadi32, i64, addrgp, ToZext64, L2_loadrigp>;
def: Loadam_pat<extloadi32, i64, addrgp, ToAext64, L2_loadrigp>;
def: Loadam_pat<sextloadi32, i64, addrgp, ToSext64, L2_loadrigp>;
def: Loadam_pat<zextloadi32, i64, addrgp, ToZext64, L2_loadrigp>;