From cfaebd7741da72d2a57896bbb69c3844738fd146 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 5 Oct 2016 21:24:08 +0000 Subject: [PATCH] [WebAssembly] Add binary-encoding opcode values to instruction descriptions. llvm-svn: 283389 --- .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 4 ++ .../WebAssembly/WebAssemblyInstrControl.td | 13 ++-- .../WebAssembly/WebAssemblyInstrConv.td | 50 ++++++++-------- .../WebAssembly/WebAssemblyInstrFloat.td | 40 ++++++------- .../WebAssembly/WebAssemblyInstrFormats.td | 53 ++++++++-------- .../WebAssembly/WebAssemblyInstrInfo.td | 10 +++- .../WebAssembly/WebAssemblyInstrInteger.td | 60 +++++++++---------- .../WebAssembly/WebAssemblyInstrMemory.td | 50 ++++++++-------- 8 files changed, 147 insertions(+), 133 deletions(-) diff --git a/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h b/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h index 0f185638ff9..0fc65e5a836 100644 --- a/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h +++ b/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h @@ -44,6 +44,10 @@ namespace WebAssembly { enum OperandType { /// Basic block label in a branch construct. OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET, + /// 32-bit integer immediates. + OPERAND_I32IMM, + /// 64-bit integer immediates. + OPERAND_I64IMM, /// 32-bit floating-point immediates. OPERAND_F32IMM, /// 64-bit floating-point immediates. diff --git a/lib/Target/WebAssembly/WebAssemblyInstrControl.td b/lib/Target/WebAssembly/WebAssemblyInstrControl.td index a3e7f012089..d1af73137de 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrControl.td +++ b/lib/Target/WebAssembly/WebAssemblyInstrControl.td @@ -18,14 +18,13 @@ let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in { // The condition operand is a boolean value which WebAssembly represents as i32. def BR_IF : I<(outs), (ins bb_op:$dst, I32:$cond), [(brcond I32:$cond, bb:$dst)], - "br_if \t$dst, $cond">; + "br_if \t$dst, $cond", 0x07>; let isCodeGenOnly = 1 in -def BR_UNLESS : I<(outs), (ins bb_op:$dst, I32:$cond), [], - "br_unless\t$dst, $cond">; +def BR_UNLESS : I<(outs), (ins bb_op:$dst, I32:$cond), []>; let isBarrier = 1 in { def BR : I<(outs), (ins bb_op:$dst), [(br bb:$dst)], - "br \t$dst">; + "br \t$dst", 0x06>; } // isBarrier = 1 } // isBranch = 1, isTerminator = 1, hasCtrlDep = 1 @@ -46,7 +45,7 @@ let Defs = [ARGUMENTS] in { let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { def BR_TABLE_I32 : I<(outs), (ins I32:$index, variable_ops), [(WebAssemblybr_table I32:$index)], - "br_table \t$index"> { + "br_table \t$index", 0x08> { let TSFlags{0} = 1; let TSFlags{1} = 1; } @@ -62,8 +61,8 @@ def BR_TABLE_I64 : I<(outs), (ins I64:$index, variable_ops), // use/clobber VALUE_STACK to prevent them from being moved into the middle of // an expression tree. let Uses = [VALUE_STACK], Defs = [VALUE_STACK] in { -def BLOCK : I<(outs), (ins), [], "block">; -def LOOP : I<(outs), (ins), [], "loop">; +def BLOCK : I<(outs), (ins), [], "block", 0x01>; +def LOOP : I<(outs), (ins), [], "loop", 0x02>; def END_BLOCK : I<(outs), (ins), [], "end_block">; def END_LOOP : I<(outs), (ins), [], "end_loop">; } // Uses = [VALUE_STACK], Defs = [VALUE_STACK] diff --git a/lib/Target/WebAssembly/WebAssemblyInstrConv.td b/lib/Target/WebAssembly/WebAssemblyInstrConv.td index b65a1240fee..116b4ac0efc 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrConv.td +++ b/lib/Target/WebAssembly/WebAssemblyInstrConv.td @@ -17,14 +17,14 @@ let Defs = [ARGUMENTS] in { def I32_WRAP_I64 : I<(outs I32:$dst), (ins I64:$src), [(set I32:$dst, (trunc I64:$src))], - "i32.wrap/i64\t$dst, $src">; + "i32.wrap/i64\t$dst, $src", 0xa1>; def I64_EXTEND_S_I32 : I<(outs I64:$dst), (ins I32:$src), [(set I64:$dst, (sext I32:$src))], - "i64.extend_s/i32\t$dst, $src">; + "i64.extend_s/i32\t$dst, $src", 0xa6>; def I64_EXTEND_U_I32 : I<(outs I64:$dst), (ins I32:$src), [(set I64:$dst, (zext I32:$src))], - "i64.extend_u/i32\t$dst, $src">; + "i64.extend_u/i32\t$dst, $src", 0xa7>; } // defs = [ARGUMENTS] @@ -39,73 +39,73 @@ let Defs = [ARGUMENTS] in { let hasSideEffects = 1 in { def I32_TRUNC_S_F32 : I<(outs I32:$dst), (ins F32:$src), [(set I32:$dst, (fp_to_sint F32:$src))], - "i32.trunc_s/f32\t$dst, $src">; + "i32.trunc_s/f32\t$dst, $src", 0x9d>; def I32_TRUNC_U_F32 : I<(outs I32:$dst), (ins F32:$src), [(set I32:$dst, (fp_to_uint F32:$src))], - "i32.trunc_u/f32\t$dst, $src">; + "i32.trunc_u/f32\t$dst, $src", 0x9f>; def I64_TRUNC_S_F32 : I<(outs I64:$dst), (ins F32:$src), [(set I64:$dst, (fp_to_sint F32:$src))], - "i64.trunc_s/f32\t$dst, $src">; + "i64.trunc_s/f32\t$dst, $src", 0xa2>; def I64_TRUNC_U_F32 : I<(outs I64:$dst), (ins F32:$src), [(set I64:$dst, (fp_to_uint F32:$src))], - "i64.trunc_u/f32\t$dst, $src">; + "i64.trunc_u/f32\t$dst, $src", 0xa4>; def I32_TRUNC_S_F64 : I<(outs I32:$dst), (ins F64:$src), [(set I32:$dst, (fp_to_sint F64:$src))], - "i32.trunc_s/f64\t$dst, $src">; + "i32.trunc_s/f64\t$dst, $src", 0x9e>; def I32_TRUNC_U_F64 : I<(outs I32:$dst), (ins F64:$src), [(set I32:$dst, (fp_to_uint F64:$src))], - "i32.trunc_u/f64\t$dst, $src">; + "i32.trunc_u/f64\t$dst, $src", 0xa0>; def I64_TRUNC_S_F64 : I<(outs I64:$dst), (ins F64:$src), [(set I64:$dst, (fp_to_sint F64:$src))], - "i64.trunc_s/f64\t$dst, $src">; + "i64.trunc_s/f64\t$dst, $src", 0xa3>; def I64_TRUNC_U_F64 : I<(outs I64:$dst), (ins F64:$src), [(set I64:$dst, (fp_to_uint F64:$src))], - "i64.trunc_u/f64\t$dst, $src">; + "i64.trunc_u/f64\t$dst, $src", 0xa5>; } // hasSideEffects = 1 def F32_CONVERT_S_I32 : I<(outs F32:$dst), (ins I32:$src), [(set F32:$dst, (sint_to_fp I32:$src))], - "f32.convert_s/i32\t$dst, $src">; + "f32.convert_s/i32\t$dst, $src", 0xa8>; def F32_CONVERT_U_I32 : I<(outs F32:$dst), (ins I32:$src), [(set F32:$dst, (uint_to_fp I32:$src))], - "f32.convert_u/i32\t$dst, $src">; + "f32.convert_u/i32\t$dst, $src", 0xa9>; def F64_CONVERT_S_I32 : I<(outs F64:$dst), (ins I32:$src), [(set F64:$dst, (sint_to_fp I32:$src))], - "f64.convert_s/i32\t$dst, $src">; + "f64.convert_s/i32\t$dst, $src", 0xae>; def F64_CONVERT_U_I32 : I<(outs F64:$dst), (ins I32:$src), [(set F64:$dst, (uint_to_fp I32:$src))], - "f64.convert_u/i32\t$dst, $src">; + "f64.convert_u/i32\t$dst, $src", 0xaf>; def F32_CONVERT_S_I64 : I<(outs F32:$dst), (ins I64:$src), [(set F32:$dst, (sint_to_fp I64:$src))], - "f32.convert_s/i64\t$dst, $src">; + "f32.convert_s/i64\t$dst, $src", 0xaa>; def F32_CONVERT_U_I64 : I<(outs F32:$dst), (ins I64:$src), [(set F32:$dst, (uint_to_fp I64:$src))], - "f32.convert_u/i64\t$dst, $src">; + "f32.convert_u/i64\t$dst, $src", 0xab>; def F64_CONVERT_S_I64 : I<(outs F64:$dst), (ins I64:$src), [(set F64:$dst, (sint_to_fp I64:$src))], - "f64.convert_s/i64\t$dst, $src">; + "f64.convert_s/i64\t$dst, $src", 0xb0>; def F64_CONVERT_U_I64 : I<(outs F64:$dst), (ins I64:$src), [(set F64:$dst, (uint_to_fp I64:$src))], - "f64.convert_u/i64\t$dst, $src">; + "f64.convert_u/i64\t$dst, $src", 0xb1>; def F64_PROMOTE_F32 : I<(outs F64:$dst), (ins F32:$src), [(set F64:$dst, (fpextend F32:$src))], - "f64.promote/f32\t$dst, $src">; + "f64.promote/f32\t$dst, $src", 0xb2>; def F32_DEMOTE_F64 : I<(outs F32:$dst), (ins F64:$src), [(set F32:$dst, (fpround F64:$src))], - "f32.demote/f64\t$dst, $src">; + "f32.demote/f64\t$dst, $src", 0xac>; def I32_REINTERPRET_F32 : I<(outs I32:$dst), (ins F32:$src), [(set I32:$dst, (bitconvert F32:$src))], - "i32.reinterpret/f32\t$dst, $src">; + "i32.reinterpret/f32\t$dst, $src", 0xb4>; def F32_REINTERPRET_I32 : I<(outs F32:$dst), (ins I32:$src), [(set F32:$dst, (bitconvert I32:$src))], - "f32.reinterpret/i32\t$dst, $src">; + "f32.reinterpret/i32\t$dst, $src", 0xad>; def I64_REINTERPRET_F64 : I<(outs I64:$dst), (ins F64:$src), [(set I64:$dst, (bitconvert F64:$src))], - "i64.reinterpret/f64\t$dst, $src">; + "i64.reinterpret/f64\t$dst, $src", 0xb5>; def F64_REINTERPRET_I64 : I<(outs F64:$dst), (ins I64:$src), [(set F64:$dst, (bitconvert I64:$src))], - "f64.reinterpret/i64\t$dst, $src">; + "f64.reinterpret/i64\t$dst, $src", 0xb3>; } // Defs = [ARGUMENTS] diff --git a/lib/Target/WebAssembly/WebAssemblyInstrFloat.td b/lib/Target/WebAssembly/WebAssemblyInstrFloat.td index 64569720375..3a7420b3acb 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrFloat.td +++ b/lib/Target/WebAssembly/WebAssemblyInstrFloat.td @@ -15,26 +15,26 @@ let Defs = [ARGUMENTS] in { let isCommutable = 1 in -defm ADD : BinaryFP; -defm SUB : BinaryFP; +defm ADD : BinaryFP; +defm SUB : BinaryFP; let isCommutable = 1 in -defm MUL : BinaryFP; -defm DIV : BinaryFP; -defm SQRT : UnaryFP; +defm MUL : BinaryFP; +defm DIV : BinaryFP; +defm SQRT : UnaryFP; -defm ABS : UnaryFP; -defm NEG : UnaryFP; -defm COPYSIGN : BinaryFP; +defm ABS : UnaryFP; +defm NEG : UnaryFP; +defm COPYSIGN : BinaryFP; let isCommutable = 1 in { -defm MIN : BinaryFP; -defm MAX : BinaryFP; +defm MIN : BinaryFP; +defm MAX : BinaryFP; } // isCommutable = 1 -defm CEIL : UnaryFP; -defm FLOOR : UnaryFP; -defm TRUNC : UnaryFP; -defm NEAREST : UnaryFP; +defm CEIL : UnaryFP; +defm FLOOR : UnaryFP; +defm TRUNC : UnaryFP; +defm NEAREST : UnaryFP; } // Defs = [ARGUMENTS] @@ -51,13 +51,13 @@ def : Pat<(frint f64:$src), (NEAREST_F64 f64:$src)>; let Defs = [ARGUMENTS] in { let isCommutable = 1 in { -defm EQ : ComparisonFP; -defm NE : ComparisonFP; +defm EQ : ComparisonFP; +defm NE : ComparisonFP; } // isCommutable = 1 -defm LT : ComparisonFP; -defm LE : ComparisonFP; -defm GT : ComparisonFP; -defm GE : ComparisonFP; +defm LT : ComparisonFP; +defm LE : ComparisonFP; +defm GT : ComparisonFP; +defm GE : ComparisonFP; } // Defs = [ARGUMENTS] diff --git a/lib/Target/WebAssembly/WebAssemblyInstrFormats.td b/lib/Target/WebAssembly/WebAssemblyInstrFormats.td index 66145b0bb25..5b249840257 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrFormats.td +++ b/lib/Target/WebAssembly/WebAssemblyInstrFormats.td @@ -13,56 +13,57 @@ //===----------------------------------------------------------------------===// // WebAssembly Instruction Format. -class WebAssemblyInst : Instruction { - field bits<0> Inst; // Instruction encoding. +class WebAssemblyInst inst, string asmstr> : Instruction { + field bits<32> Inst = inst; // Instruction encoding. let Namespace = "WebAssembly"; let Pattern = []; let AsmString = asmstr; } // Normal instructions. -class I pattern, string asmstr = ""> - : WebAssemblyInst { +class I pattern, string asmstr = "", bits<32> inst = -1> + : WebAssemblyInst { dag OutOperandList = oops; dag InOperandList = iops; let Pattern = pattern; } -class SIMD_I pattern, string asmstr = ""> - : I, Requires<[HasSIMD128]>; +class SIMD_I pattern, + string asmstr = "", bits<32> inst = -1> + : I, Requires<[HasSIMD128]>; // Unary and binary instructions, for the local types that WebAssembly supports. -multiclass UnaryInt { +multiclass UnaryInt i32Inst, bits<32> i64Inst> { def _I32 : I<(outs I32:$dst), (ins I32:$src), [(set I32:$dst, (node I32:$src))], - !strconcat("i32.", !strconcat(name, "\t$dst, $src"))>; + !strconcat("i32.", !strconcat(name, "\t$dst, $src")), i32Inst>; def _I64 : I<(outs I64:$dst), (ins I64:$src), [(set I64:$dst, (node I64:$src))], - !strconcat("i64.", !strconcat(name, "\t$dst, $src"))>; + !strconcat("i64.", !strconcat(name, "\t$dst, $src")), i64Inst>; } -multiclass BinaryInt { +multiclass BinaryInt i32Inst, bits<32> i64Inst> { def _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs), [(set I32:$dst, (node I32:$lhs, I32:$rhs))], - !strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs"))>; + !strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs")), i32Inst>; def _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs), [(set I64:$dst, (node I64:$lhs, I64:$rhs))], - !strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs"))>; + !strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs")), i64Inst>; } -multiclass UnaryFP { +multiclass UnaryFP f32Inst, bits<32> f64Inst> { def _F32 : I<(outs F32:$dst), (ins F32:$src), [(set F32:$dst, (node F32:$src))], - !strconcat("f32.", !strconcat(name, "\t$dst, $src"))>; + !strconcat("f32.", !strconcat(name, "\t$dst, $src")), f32Inst>; def _F64 : I<(outs F64:$dst), (ins F64:$src), [(set F64:$dst, (node F64:$src))], - !strconcat("f64.", !strconcat(name, "\t$dst, $src"))>; + !strconcat("f64.", !strconcat(name, "\t$dst, $src")), f64Inst>; } -multiclass BinaryFP { +multiclass BinaryFP f32Inst, bits<32> f64Inst> { def _F32 : I<(outs F32:$dst), (ins F32:$lhs, F32:$rhs), [(set F32:$dst, (node F32:$lhs, F32:$rhs))], - !strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs"))>; + !strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")), f32Inst>; def _F64 : I<(outs F64:$dst), (ins F64:$lhs, F64:$rhs), [(set F64:$dst, (node F64:$lhs, F64:$rhs))], - !strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs"))>; + !strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs")), f64Inst>; } multiclass SIMDBinary { def _I8x16 : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs), @@ -79,19 +80,23 @@ multiclass SIMDBinary { !strconcat("f32x4.", !strconcat(name, "\t$dst, $lhs, $rhs"))>; } -multiclass ComparisonInt { +multiclass ComparisonInt i32Inst, bits<32> i64Inst> { def _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs), [(set I32:$dst, (setcc I32:$lhs, I32:$rhs, cond))], - !strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs"))>; + !strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs")), + i32Inst>; def _I64 : I<(outs I32:$dst), (ins I64:$lhs, I64:$rhs), [(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))], - !strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs"))>; + !strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs")), + i64Inst>; } -multiclass ComparisonFP { +multiclass ComparisonFP f32Inst, bits<32> f64Inst> { def _F32 : I<(outs I32:$dst), (ins F32:$lhs, F32:$rhs), [(set I32:$dst, (setcc F32:$lhs, F32:$rhs, cond))], - !strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs"))>; + !strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")), + f32Inst>; def _F64 : I<(outs I32:$dst), (ins F64:$lhs, F64:$rhs), [(set I32:$dst, (setcc F64:$lhs, F64:$rhs, cond))], - !strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs"))>; + !strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs")), + f64Inst>; } diff --git a/lib/Target/WebAssembly/WebAssemblyInstrInfo.td b/lib/Target/WebAssembly/WebAssemblyInstrInfo.td index 0a6de2a52f5..f911f1a39e6 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrInfo.td +++ b/lib/Target/WebAssembly/WebAssemblyInstrInfo.td @@ -71,6 +71,12 @@ let OperandNamespace = "WebAssembly" in { let OperandType = "OPERAND_BASIC_BLOCK" in def bb_op : Operand; +let OperandType = "OPERAND_I32IMM" in +def i32imm_op : Operand; + +let OperandType = "OPERAND_I64IMM" in +def i64imm_op : Operand; + let OperandType = "OPERAND_F32IMM" in def f32imm_op : Operand; @@ -144,10 +150,10 @@ defm : LOCAL; defm : LOCAL, Requires<[HasSIMD128]>; let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in { -def CONST_I32 : I<(outs I32:$res), (ins i32imm:$imm), +def CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm), [(set I32:$res, imm:$imm)], "i32.const\t$res, $imm">; -def CONST_I64 : I<(outs I64:$res), (ins i64imm:$imm), +def CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm), [(set I64:$res, imm:$imm)], "i64.const\t$res, $imm">; def CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm), diff --git a/lib/Target/WebAssembly/WebAssemblyInstrInteger.td b/lib/Target/WebAssembly/WebAssemblyInstrInteger.td index 7eaa57bb217..96ff1c331f8 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrInteger.td +++ b/lib/Target/WebAssembly/WebAssemblyInstrInteger.td @@ -17,51 +17,51 @@ let Defs = [ARGUMENTS] in { // The spaces after the names are for aesthetic purposes only, to make // operands line up vertically after tab expansion. let isCommutable = 1 in -defm ADD : BinaryInt; -defm SUB : BinaryInt; +defm ADD : BinaryInt; +defm SUB : BinaryInt; let isCommutable = 1 in -defm MUL : BinaryInt; +defm MUL : BinaryInt; // Divide and remainder trap on a zero denominator. let hasSideEffects = 1 in { -defm DIV_S : BinaryInt; -defm DIV_U : BinaryInt; -defm REM_S : BinaryInt; -defm REM_U : BinaryInt; +defm DIV_S : BinaryInt; +defm DIV_U : BinaryInt; +defm REM_S : BinaryInt; +defm REM_U : BinaryInt; } // hasSideEffects = 1 let isCommutable = 1 in { -defm AND : BinaryInt; -defm OR : BinaryInt; -defm XOR : BinaryInt; +defm AND : BinaryInt; +defm OR : BinaryInt; +defm XOR : BinaryInt; } // isCommutable = 1 -defm SHL : BinaryInt; -defm SHR_U : BinaryInt; -defm SHR_S : BinaryInt; -defm ROTL : BinaryInt; -defm ROTR : BinaryInt; +defm SHL : BinaryInt; +defm SHR_U : BinaryInt; +defm SHR_S : BinaryInt; +defm ROTL : BinaryInt; +defm ROTR : BinaryInt; let isCommutable = 1 in { -defm EQ : ComparisonInt; -defm NE : ComparisonInt; +defm EQ : ComparisonInt; +defm NE : ComparisonInt; } // isCommutable = 1 -defm LT_S : ComparisonInt; -defm LE_S : ComparisonInt; -defm LT_U : ComparisonInt; -defm LE_U : ComparisonInt; -defm GT_S : ComparisonInt; -defm GE_S : ComparisonInt; -defm GT_U : ComparisonInt; -defm GE_U : ComparisonInt; +defm LT_S : ComparisonInt; +defm LE_S : ComparisonInt; +defm LT_U : ComparisonInt; +defm LE_U : ComparisonInt; +defm GT_S : ComparisonInt; +defm GE_S : ComparisonInt; +defm GT_U : ComparisonInt; +defm GE_U : ComparisonInt; -defm CLZ : UnaryInt; -defm CTZ : UnaryInt; -defm POPCNT : UnaryInt; +defm CLZ : UnaryInt; +defm CTZ : UnaryInt; +defm POPCNT : UnaryInt; def EQZ_I32 : I<(outs I32:$dst), (ins I32:$src), [(set I32:$dst, (setcc I32:$src, 0, SETEQ))], - "i32.eqz \t$dst, $src">; + "i32.eqz \t$dst, $src", 0x5a>; def EQZ_I64 : I<(outs I32:$dst), (ins I64:$src), [(set I32:$dst, (setcc I64:$src, 0, SETEQ))], - "i64.eqz \t$dst, $src">; + "i64.eqz \t$dst, $src", 0xba>; } // Defs = [ARGUMENTS] diff --git a/lib/Target/WebAssembly/WebAssemblyInstrMemory.td b/lib/Target/WebAssembly/WebAssemblyInstrMemory.td index 5bd09bd5795..7535ece1c2d 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrMemory.td +++ b/lib/Target/WebAssembly/WebAssemblyInstrMemory.td @@ -58,16 +58,16 @@ let Defs = [ARGUMENTS] in { // Basic load. def LOAD_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i32.load\t$dst, ${off}(${addr})${p2align}">; + "i32.load\t$dst, ${off}(${addr})${p2align}", 0x2a>; def LOAD_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i64.load\t$dst, ${off}(${addr})${p2align}">; + "i64.load\t$dst, ${off}(${addr})${p2align}", 0x2b>; def LOAD_F32 : I<(outs F32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "f32.load\t$dst, ${off}(${addr})${p2align}">; + "f32.load\t$dst, ${off}(${addr})${p2align}", 0x2c>; def LOAD_F64 : I<(outs F64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "f64.load\t$dst, ${off}(${addr})${p2align}">; + "f64.load\t$dst, ${off}(${addr})${p2align}", 0x2d>; } // Defs = [ARGUMENTS] @@ -142,34 +142,34 @@ let Defs = [ARGUMENTS] in { // Extending load. def LOAD8_S_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i32.load8_s\t$dst, ${off}(${addr})${p2align}">; + "i32.load8_s\t$dst, ${off}(${addr})${p2align}", 0x20>; def LOAD8_U_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i32.load8_u\t$dst, ${off}(${addr})${p2align}">; + "i32.load8_u\t$dst, ${off}(${addr})${p2align}", 0x21>; def LOAD16_S_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i32.load16_s\t$dst, ${off}(${addr})${p2align}">; + "i32.load16_s\t$dst, ${off}(${addr})${p2align}", 0x22>; def LOAD16_U_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i32.load16_u\t$dst, ${off}(${addr})${p2align}">; + "i32.load16_u\t$dst, ${off}(${addr})${p2align}", 0x23>; def LOAD8_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i64.load8_s\t$dst, ${off}(${addr})${p2align}">; + "i64.load8_s\t$dst, ${off}(${addr})${p2align}", 0x24>; def LOAD8_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i64.load8_u\t$dst, ${off}(${addr})${p2align}">; + "i64.load8_u\t$dst, ${off}(${addr})${p2align}", 0x25>; def LOAD16_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i64.load16_s\t$dst, ${off}(${addr})${p2align}">; + "i64.load16_s\t$dst, ${off}(${addr})${p2align}", 0x26>; def LOAD16_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i64.load16_u\t$dst, ${off}(${addr})${p2align}">; + "i64.load16_u\t$dst, ${off}(${addr})${p2align}", 0x27>; def LOAD32_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i64.load32_s\t$dst, ${off}(${addr})${p2align}">; + "i64.load32_s\t$dst, ${off}(${addr})${p2align}", 0x28>; def LOAD32_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align), [], - "i64.load32_u\t$dst, ${off}(${addr})${p2align}">; + "i64.load32_u\t$dst, ${off}(${addr})${p2align}", 0x29>; } // Defs = [ARGUMENTS] @@ -453,16 +453,16 @@ let Defs = [ARGUMENTS] in { // Note: WebAssembly inverts SelectionDAG's usual operand order. def STORE_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align, I32:$val), [], - "i32.store\t$dst, ${off}(${addr})${p2align}, $val">; + "i32.store\t$dst, ${off}(${addr})${p2align}, $val", 0x33>; def STORE_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align, I64:$val), [], - "i64.store\t$dst, ${off}(${addr})${p2align}, $val">; + "i64.store\t$dst, ${off}(${addr})${p2align}, $val", 0x34>; def STORE_F32 : I<(outs F32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align, F32:$val), [], - "f32.store\t$dst, ${off}(${addr})${p2align}, $val">; + "f32.store\t$dst, ${off}(${addr})${p2align}, $val", 0x35>; def STORE_F64 : I<(outs F64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align, F64:$val), [], - "f64.store\t$dst, ${off}(${addr})${p2align}, $val">; + "f64.store\t$dst, ${off}(${addr})${p2align}, $val", 0x36>; } // Defs = [ARGUMENTS] @@ -545,19 +545,19 @@ let Defs = [ARGUMENTS] in { // Truncating store. def STORE8_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align, I32:$val), [], - "i32.store8\t$dst, ${off}(${addr})${p2align}, $val">; + "i32.store8\t$dst, ${off}(${addr})${p2align}, $val", 0x2e>; def STORE16_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align, I32:$val), [], - "i32.store16\t$dst, ${off}(${addr})${p2align}, $val">; + "i32.store16\t$dst, ${off}(${addr})${p2align}, $val", 0x2f>; def STORE8_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align, I64:$val), [], - "i64.store8\t$dst, ${off}(${addr})${p2align}, $val">; + "i64.store8\t$dst, ${off}(${addr})${p2align}, $val", 0x30>; def STORE16_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align, I64:$val), [], - "i64.store16\t$dst, ${off}(${addr})${p2align}, $val">; + "i64.store16\t$dst, ${off}(${addr})${p2align}, $val", 0x31>; def STORE32_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, P2Align:$p2align, I64:$val), [], - "i64.store32\t$dst, ${off}(${addr})${p2align}, $val">; + "i64.store32\t$dst, ${off}(${addr})${p2align}, $val", 0x32>; } // Defs = [ARGUMENTS] @@ -671,7 +671,7 @@ let Defs = [ARGUMENTS] in { // Current memory size. def CURRENT_MEMORY_I32 : I<(outs I32:$dst), (ins), [(set I32:$dst, (int_wasm_current_memory))], - "current_memory\t$dst">, + "current_memory\t$dst", 0x3b>, Requires<[HasAddr32]>; def CURRENT_MEMORY_I64 : I<(outs I64:$dst), (ins), [(set I64:$dst, (int_wasm_current_memory))], @@ -681,7 +681,7 @@ def CURRENT_MEMORY_I64 : I<(outs I64:$dst), (ins), // Grow memory. def GROW_MEMORY_I32 : I<(outs), (ins I32:$delta), [(int_wasm_grow_memory I32:$delta)], - "grow_memory\t$delta">, + "grow_memory\t$delta", 0x39>, Requires<[HasAddr32]>; def GROW_MEMORY_I64 : I<(outs), (ins I64:$delta), [(int_wasm_grow_memory I64:$delta)],