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Convert more tests to new atomic instructions.

llvm-svn: 140567
This commit is contained in:
Eli Friedman 2011-09-26 21:36:10 +00:00
parent 6aaaadc188
commit d01fc33809
3 changed files with 19 additions and 35 deletions

View File

@ -2,24 +2,12 @@
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=-db | FileCheck %s -check-prefix=V6
; RUN: llc < %s -march=thumb -mcpu=cortex-m0 | FileCheck %s -check-prefix=V6M
declare void @llvm.memory.barrier(i1 , i1 , i1 , i1 , i1)
define void @t1() {
; V6: t1:
; V6: blx {{_*}}sync_synchronize
; V6M: t1:
; V6M: dmb st
call void @llvm.memory.barrier(i1 false, i1 false, i1 false, i1 true, i1 true)
ret void
}
define void @t2() {
; V6: t2:
; V6: blx {{_*}}sync_synchronize
; V6M: t2:
; V6M: dmb ish
call void @llvm.memory.barrier(i1 true, i1 false, i1 false, i1 true, i1 false)
fence seq_cst
ret void
}

View File

@ -6,20 +6,18 @@
define i32 @t1(i32 %a, i32 %b, i32 %c) {
; CHECK: t1:
; CHECK: cbz
%tmp2 = icmp eq i32 %a, 0
br i1 %tmp2, label %cond_false, label %cond_true
%tmp2 = icmp eq i32 %a, 0
br i1 %tmp2, label %cond_false, label %cond_true
cond_true:
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
%tmp5 = add i32 %b, 1
%tmp6 = and i32 %tmp5, %c
ret i32 %tmp6
fence seq_cst
%tmp5 = add i32 %b, 1
%tmp6 = and i32 %tmp5, %c
ret i32 %tmp6
cond_false:
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
%tmp7 = add i32 %b, -1
%tmp8 = xor i32 %tmp7, %c
ret i32 %tmp8
fence seq_cst
%tmp7 = add i32 %b, -1
%tmp8 = xor i32 %tmp7, %c
ret i32 %tmp8
}
declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind

View File

@ -11,12 +11,12 @@ entry:
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
fence seq_cst
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
fence seq_cst
ret i32 1
}
@ -28,12 +28,12 @@ entry:
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
fence seq_cst
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
fence seq_cst
ret i32 1
}
@ -45,12 +45,12 @@ entry:
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
fence seq_cst
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
fence seq_cst
ret i32 1
}
@ -62,13 +62,11 @@ entry:
br i1 %tmp, label %return, label %cond_true
cond_true: ; preds = %entry
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
fence seq_cst
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
fence seq_cst
ret i32 1
}
declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind