RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 20:51:52 +01:00
Code Issues Projects Releases Wiki Activity

Fix an error in the two-address example.

Browse Source 
llvm-svn: 52253
This commit is contained in:
Dan Gohman 2008-06-13 17:55:57 +00:00
parent d3d353dd68
commit d05ed6f328
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
docs/CodeGenerator.html
View File

@ -1468,12 +1468,12 @@ instance, in situations where an instruction such as <tt>%a = ADD %b
<div class="doc_code">
<pre>
%a = MOVE %b
%a = ADD %a %b
%a = ADD %a %c
</pre>
</div>
<p>Notice that, internally, the second instruction is represented as
<tt>ADD %a[def/use] %b</tt>. I.e., the register operand <tt>%a</tt> is
<tt>ADD %a[def/use] %c</tt>. I.e., the register operand <tt>%a</tt> is
both used and defined by the instruction.</p>
</div>