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[X86] Merge the two different SSE2 blocks in the X86TargetLowering constructor. Also qualfiy the XOP block with !useSoftFloat to match the other vector blocks.
llvm-svn: 266848
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1bdb84bae2
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@ -893,6 +893,24 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setOperationAction(ISD::BITCAST, MVT::v2i32, Custom);
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setOperationAction(ISD::BITCAST, MVT::v4i16, Custom);
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setOperationAction(ISD::BITCAST, MVT::v8i8, Custom);
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v2i64, Custom);
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v4i32, Custom);
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v8i16, Custom);
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for (auto VT : { MVT::v8i16, MVT::v16i8 }) {
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setOperationAction(ISD::SRL, VT, Custom);
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setOperationAction(ISD::SHL, VT, Custom);
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setOperationAction(ISD::SRA, VT, Custom);
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}
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// In the customized shift lowering, the legal cases in AVX2 will be
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// recognized.
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for (auto VT : { MVT::v4i32, MVT::v2i64 }) {
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setOperationAction(ISD::SRL, VT, Custom);
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setOperationAction(ISD::SHL, VT, Custom);
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setOperationAction(ISD::SRA, VT, Custom);
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}
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}
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if (!Subtarget.useSoftFloat() && Subtarget.hasSSE41()) {
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@ -965,27 +983,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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}
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}
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if (Subtarget.hasSSE2()) {
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v2i64, Custom);
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v4i32, Custom);
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v8i16, Custom);
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for (auto VT : { MVT::v8i16, MVT::v16i8 }) {
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setOperationAction(ISD::SRL, VT, Custom);
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setOperationAction(ISD::SHL, VT, Custom);
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setOperationAction(ISD::SRA, VT, Custom);
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}
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// In the customized shift lowering, the legal cases in AVX2 will be
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// recognized.
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for (auto VT : { MVT::v4i32, MVT::v2i64 }) {
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setOperationAction(ISD::SRL, VT, Custom);
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setOperationAction(ISD::SHL, VT, Custom);
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setOperationAction(ISD::SRA, VT, Custom);
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}
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}
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if (Subtarget.hasXOP()) {
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if (!Subtarget.useSoftFloat() && Subtarget.hasXOP()) {
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for (auto VT : { MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64,
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MVT::v32i8, MVT::v16i16, MVT::v8i32, MVT::v4i64 })
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setOperationAction(ISD::ROTL, VT, Custom);
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