From d12832ea06c9373955b2a1a2235bd1ef4c6d9361 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Tue, 22 Mar 2016 19:59:53 +0000
Subject: [PATCH] [SelectionDAG] Ensure constant folded legalized vector
 element types are compatible with the BUILD_VECTOR type

Found during fuzz testing - 32-bit x86 targets were legalizing a <2 x i1> compare result to <2 x i32> when <2 x i64> was expected.

llvm-svn: 264085
---
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp |  2 +-
 test/CodeGen/X86/widen_compare-1.ll       | 21 +++++++++++++++++++++
 2 files changed, 22 insertions(+), 1 deletion(-)
 create mode 100644 test/CodeGen/X86/widen_compare-1.ll

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 99b457afe35..2daae135045 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3403,7 +3403,7 @@ SDValue SelectionDAG::FoldConstantVectorArithmetic(unsigned Opcode, SDLoc DL,
   EVT LegalSVT = VT.getScalarType();
   if (LegalSVT.isInteger()) {
     LegalSVT = TLI->getTypeToTransformTo(*getContext(), LegalSVT);
-    if (LegalSVT.bitsLT(SVT))
+    if (LegalSVT.bitsLT(VT.getScalarType()))
       return SDValue();
   }
 
diff --git a/test/CodeGen/X86/widen_compare-1.ll b/test/CodeGen/X86/widen_compare-1.ll
new file mode 100644
index 00000000000..8ea0db53a39
--- /dev/null
+++ b/test/CodeGen/X86/widen_compare-1.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+
+; compare v2i16
+
+define <2 x i16> @compare_v2i64_to_v2i16(<2 x i16>* %src) nounwind {
+; X86-LABEL: compare_v2i64_to_v2i16:
+; X86:       # BB#0:
+; X86-NEXT:    movaps {{.*#+}} xmm0 = [65535,0,65535,0]
+; X86-NEXT:    retl
+;
+; X64-LABEL: compare_v2i64_to_v2i16:
+; X64:       # BB#0:
+; X64-NEXT:    movaps {{.*#+}} xmm0 = [65535,65535]
+; X64-NEXT:    retq
+  %val = load <2 x i16>, <2 x i16>* %src, align 4
+  %cmp = icmp uge <2 x i16> %val, %val
+  %sel = select <2 x i1> %cmp, <2 x i16> <i16 -1, i16 -1>, <2 x i16> zeroinitializer
+  ret <2 x i16> %sel
+}