RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 12:43:36 +01:00
Code Issues Projects Releases Wiki Activity

ARM: add support for segment base relocations (SBREL)

Browse Source 
This adds support for parsing and emitting the SBREL relocation variant for the
ARM target.  Handling this relocation variant is necessary for supporting the
full ARM ELF specification.  Addresses PR22128.

llvm-svn: 225595
This commit is contained in:
Saleem Abdulrasool 2015-01-11 04:39:18 +00:00
parent 2da477ebfb
commit d18c3b767f
6 changed files with 47 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
include/llvm/MC/MCExpr.h
View File

@ -194,6 +194,7 @@ public:
VK_ARM_TARGET1,
VK_ARM_TARGET2,
VK_ARM_PREL31,
VK_ARM_SBREL, // symbol(sbrel)
VK_ARM_TLSLDO, // symbol(tlsldo)
VK_ARM_TLSCALL, // symbol(tlscall)
VK_ARM_TLSDESC, // symbol(tlsdesc)

2
lib/MC/MCExpr.cpp
View File

@ -197,6 +197,7 @@ StringRef MCSymbolRefExpr::getVariantKindName(VariantKind Kind) {
case VK_ARM_TARGET1: return "target1";
case VK_ARM_TARGET2: return "target2";
case VK_ARM_PREL31: return "prel31";
case VK_ARM_SBREL: return "sbrel";
case VK_ARM_TLSLDO: return "tlsldo";
case VK_ARM_TLSCALL: return "tlscall";
case VK_ARM_TLSDESC: return "tlsdesc";
@ -364,6 +365,7 @@ MCSymbolRefExpr::getVariantKindForName(StringRef Name) {
.Case("target1", VK_ARM_TARGET1)
.Case("target2", VK_ARM_TARGET2)
.Case("prel31", VK_ARM_PREL31)
.Case("sbrel", VK_ARM_SBREL)
.Case("tlsldo", VK_ARM_TLSLDO)
.Case("tlscall", VK_ARM_TLSCALL)
.Case("tlsdesc", VK_ARM_TLSDESC)

3
lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
View File

@ -200,6 +200,9 @@ unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
case MCSymbolRefExpr::VK_ARM_PREL31:
Type = ELF::R_ARM_PREL31;
break;
case MCSymbolRefExpr::VK_ARM_SBREL:
Type = ELF::R_ARM_SBREL32;
break;
case MCSymbolRefExpr::VK_ARM_TLSLDO:
Type = ELF::R_ARM_TLS_LDO32;
break;

4
lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
View File

@ -553,6 +553,10 @@ public:
/// necessary.
void EmitValueImpl(const MCExpr *Value, unsigned Size,
const SMLoc &Loc) override {
if (const MCSymbolRefExpr *SRE = dyn_cast_or_null<MCSymbolRefExpr>(Value))
if (SRE->getKind() == MCSymbolRefExpr::VK_ARM_SBREL && !(Size == 4))
getContext().FatalError(Loc, "relocated expression must be 32-bit");
EmitDataMappingSymbol();
MCELFStreamer::EmitValueImpl(Value, Size);
}

27
test/MC/ARM/arm-elf-relocation-diagnostics.s Normal file
View File

@ -0,0 +1,27 @@
@ RUN: not llvm-mc -triple armv7-eabi -filetype obj -o - %s 2>&1 \
@ RUN: | FileCheck %s
@ RUN: not llvm-mc -triple thumbv7-eabi -filetype obj -o - %s 2>&1 \
@ RUN: | FileCheck %s
.byte target(sbrel)
@ CHECK: error: relocated expression must be 32-bit
@ CHECK: .byte target(sbrel)
@ CHECK: ^
@ TODO: enable these negative test cases
@ .hword target(sbrel)
@ @ CHECK-SBREL-HWORD: error: relocated expression must be 32-bit
@ @ CHECK-SBREL-HWORD: .hword target(sbrel)
@ @ CHECK-SBREL-HWORD: ^
@
@ .short target(sbrel)
@ @ CHECK-SBREL-SHORT: error: relocated expression must be 32-bit
@ @ CHECK-SBREL-SHORT: .short target(sbrel)
@ @ CHECK-SBREL-SHORT: ^
@
@ .quad target(sbrel)
@ @ CHECK-SBREL-SHORT: error: relocated expression must be 32-bit
@ @ CHECK-SBREL-SHORT: .quad target(sbrel)
@ @ CHECK-SBREL-SHORT: ^

10
test/MC/ARM/arm-elf-relocations.s
View File

@ -23,5 +23,15 @@
@ CHECK: Section {{.*}} .rel.text.r_arm_abs16 {
@ CHECK: 0x0 R_ARM_ABS16 abs16_0 0x0
@ CHECK: 0x2 R_ARM_ABS16 abs16_1 0x0
@ CHECK: }
.section .text.r_arm_sbrel32
.word target(sbrel)
.word target(SBREL)
@ CHECK: Section {{.*}} .rel.text.r_arm_sbrel32 {
@ CHECK: 0x0 R_ARM_SBREL32 target 0x0
@ CHECK: 0x4 R_ARM_SBREL32 target 0x0
@ CHECK: }