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[DAGCombiner, PowerPC] allow X - (fpext(-Y) --> X + fpext(Y) with multiple uses
This is a transform that I limited in instcombine in rL329821 because it was creating more instructions in IR when the cast has multiple uses. But if the cast is free, then we can do the transform regardless of other uses because it improves the potential throughput of the calculation by removing a dependency on the fneg. Differential Revision: https://reviews.llvm.org/D45598 llvm-svn: 330098
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@ -667,13 +667,16 @@ static char isNegatibleForFree(SDValue Op, bool LegalOperations,
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// fneg is removable even if it has multiple uses.
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if (Op.getOpcode() == ISD::FNEG) return 2;
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// Don't allow anything with multiple uses.
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if (!Op.hasOneUse()) return 0;
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// Don't allow anything with multiple uses unless we know it is free.
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EVT VT = Op.getValueType();
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if (!Op.hasOneUse())
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if (!(Op.getOpcode() == ISD::FP_EXTEND &&
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TLI.isFPExtFree(VT, Op.getOperand(0).getValueType())))
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return 0;
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// Don't recurse exponentially.
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if (Depth > 6) return 0;
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EVT VT = Op.getValueType();
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switch (Op.getOpcode()) {
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default: return false;
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case ISD::ConstantFP: {
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@ -736,9 +739,6 @@ static SDValue GetNegatedExpression(SDValue Op, SelectionDAG &DAG,
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// fneg is removable even if it has multiple uses.
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if (Op.getOpcode() == ISD::FNEG) return Op.getOperand(0);
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// Don't allow anything with multiple uses.
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assert(Op.hasOneUse() && "Unknown reuse!");
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assert(Depth <= 6 && "GetNegatedExpression doesn't match isNegatibleForFree");
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const SDNodeFlags Flags = Op.getNode()->getFlags();
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@ -1,16 +1,16 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le < %s | FileCheck %s
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; FIXME: When fpext is free, we should look through it for optimizations
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; When fpext is free, we should look through it for optimizations
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; even if it has multiple uses and produce an 'fadd' here.
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; Y - (fpext(-X)) --> Y + fpext(X)
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define double @neg_ext_op1_extra_use(float %x, double %y) nounwind {
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; CHECK-LABEL: neg_ext_op1_extra_use:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fneg 0, 1
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; CHECK-NEXT: xssubdp 1, 2, 0
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; CHECK-NEXT: xsdivdp 1, 0, 1
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; CHECK-NEXT: xsadddp 0, 2, 1
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; CHECK-NEXT: fneg 13, 1
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; CHECK-NEXT: xsdivdp 1, 13, 0
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; CHECK-NEXT: blr
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%t1 = fsub float -0.0, %x
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%t2 = fpext float %t1 to double
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