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Fix some comments
llvm-svn: 22530
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b0658628c1
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@ -1656,9 +1656,6 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
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return Result;
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case ISD::AND:
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// FIXME: should add check in getImmediateForOpcode to return a value
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// indicating the immediate is a run of set bits so we can emit a bitfield
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// clear with RLWINM instead.
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switch(getImmediateForOpcode(N.getOperand(1), opcode, Tmp2)) {
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default: assert(0 && "unhandled result code");
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case 0: // No immediate
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@ -1690,6 +1687,7 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
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Tmp3 = Tmp2 >> 16; // MB
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Tmp2 &= 0xFFFF; // ME
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// FIXME: Catch SHL-AND in addition to SRL-AND in this block.
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if (N.getOperand(0).getOpcode() == ISD::SRL)
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if (ConstantSDNode *SA =
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dyn_cast<ConstantSDNode>(N.getOperand(0).getOperand(1))) {
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@ -263,7 +263,7 @@ void PPC32RegisterInfo::emitPrologue(MachineFunction &MF) const {
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// Update frame info to pretend that this is part of the stack...
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MFI->setStackSize(NumBytes);
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// If , adjust stack pointer: r1 -= numbytes.
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// Adjust stack pointer: r1 -= numbytes.
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if (NumBytes <= 32768) {
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MI=BuildMI(PPC::STWU,3).addReg(PPC::R1).addSImm(-NumBytes).addReg(PPC::R1);
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MBB.insert(MBBI, MI);
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