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Add support for the signx instrution alias of SPARCv9.

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llvm-svn: 244519
This commit is contained in:
Joerg Sonnenberger 2015-08-10 22:32:25 +00:00
parent f64a63c16f
commit d2510224dd
2 changed files with 14 additions and 0 deletions
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5
lib/Target/Sparc/SparcInstrAliases.td
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@ -450,3 +450,8 @@ def : InstAlias<"fcmpeq $rs1, $rs2", (V9FCMPEQ FCC0, QFPRegs:$rs1,
QFPRegs:$rs2)>,
Requires<[HasHardQuad]>;
// signx rd -> sra rd, %g0, rd
def : InstAlias<"signx $rd", (SRArr IntRegs:$rd, IntRegs:$rd, G0), 0>, Requires<[HasV9]>;
// signx reg, rd -> sra reg, %g0, rd
def : InstAlias<"signx $rs1, $rd", (SRArr IntRegs:$rd, IntRegs:$rs1, G0), 0>, Requires<[HasV9]>;

9
test/MC/Sparc/sparcv9-instructions.s
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@ -26,3 +26,12 @@
! V9: popc %g1, %g2 ! encoding: [0x85,0x70,0x00,0x01]
popc %g1, %g2
! V8: error: instruction requires a CPU feature not currently enabled
! V8-NEXT: signx %g1, %g2
! V9: sra %g1, %g0, %g2 ! encoding: [0x85,0x38,0x40,0x00]
signx %g1, %g2
! V8: error: instruction requires a CPU feature not currently enabled
! V8-NEXT: signx %g1
! V9: sra %g1, %g0, %g1 ! encoding: [0x83,0x38,0x40,0x00]
signx %g1