RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 20:12:56 +02:00
Code Issues Projects Releases Wiki Activity

Commit test change for r162658.

Browse Source 
llvm-svn: 162660
This commit is contained in:
Craig Topper 2012-08-27 07:55:50 +00:00
parent 57736afed2
commit d27b76d897
1 changed files with 0 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
test/CodeGen/X86/avx-vextractf128.ll
View File

@ -32,20 +32,6 @@ entry:
declare <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float>, i8) nounwind readnone
; CHECK: @t1
; CHECK-NOT: vextractf128 $0, %ymm0, %xmm0
; CHECK-NOT: vmovups %xmm0, (%rdi)
; CHECK: vextractf128 $0, %ymm0, (%rdi)
define void @t1(float* %addr, <8 x float> %a) nounwind uwtable ssp {
entry:
%0 = tail call <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float> %a, i8 0)
%1 = bitcast float* %addr to i8*
tail call void @llvm.x86.sse.storeu.ps(i8* %1, <4 x float> %0)
ret void
}
declare void @llvm.x86.sse.storeu.ps(i8*, <4 x float>) nounwind
; CHECK: @t2
; CHECK-NOT: vextractf128 $0, %ymm0, %xmm0
; CHECK-NOT: vmovaps %xmm0, (%rdi)
@ -60,20 +46,6 @@ entry:
declare <2 x double> @llvm.x86.avx.vextractf128.pd.256(<4 x double>, i8) nounwind readnone
; CHECK: @t3
; CHECK-NOT: vextractf128 $0, %ymm0, %xmm0
; CHECK-NOT: vmovups %xmm0, (%rdi)
; CHECK: vextractf128 $0, %ymm0, (%rdi)
define void @t3(double* %addr, <4 x double> %a) nounwind uwtable ssp {
entry:
%0 = tail call <2 x double> @llvm.x86.avx.vextractf128.pd.256(<4 x double> %a, i8 0)
%1 = bitcast double* %addr to i8*
tail call void @llvm.x86.sse2.storeu.pd(i8* %1, <2 x double> %0)
ret void
}
declare void @llvm.x86.sse2.storeu.pd(i8*, <2 x double>) nounwind
; CHECK: @t4
; CHECK-NOT: vextractf128 $0, %ymm0, %xmm0
; CHECK-NOT: vmovaps %xmm0, (%rdi)
@ -88,19 +60,3 @@ entry:
}
declare <4 x i32> @llvm.x86.avx.vextractf128.si.256(<8 x i32>, i8) nounwind readnone
; CHECK: @t5
; CHECK-NOT: vextractf128 $0, %ymm0, %xmm0
; CHECK-NOT: vmovdqu %xmm0, (%rdi)
; CHECK: vextractf128 $0, %ymm0, (%rdi)
define void @t5(<2 x i64>* %addr, <4 x i64> %a) nounwind uwtable ssp {
entry:
%0 = bitcast <4 x i64> %a to <8 x i32>
%1 = tail call <4 x i32> @llvm.x86.avx.vextractf128.si.256(<8 x i32> %0, i8 0)
%2 = bitcast <2 x i64>* %addr to i8*
%3 = bitcast <4 x i32> %1 to <16 x i8>
tail call void @llvm.x86.sse2.storeu.dq(i8* %2, <16 x i8> %3)
ret void
}
declare void @llvm.x86.sse2.storeu.dq(i8*, <16 x i8>) nounwind