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https://github.com/RPCS3/llvm-mirror.git
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Assembly and Bitcode support for unsigned/signed overflow flags and
exact sdiv flags. llvm-svn: 76475
This commit is contained in:
parent
2bac9b0d83
commit
d2ad3e183b
@ -171,6 +171,18 @@ namespace bitc {
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BINOP_XOR = 12
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};
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/// OverflowingBinaryOperatorOptionalFlags - Flags for serializing
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/// OverflowingBinaryOperator's SubclassOptionalData contents.
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enum OverflowingBinaryOperatorOptionalFlags {
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OBO_NO_UNSIGNED_OVERFLOW = 0,
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OBO_NO_SIGNED_OVERFLOW = 1
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};
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/// SDivOperatorOptionalFlags - Flags for serializing SDivOperator's
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/// SubclassOptionalData contents.
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enum SDivOperatorOptionalFlags {
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SDIV_EXACT = 0
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};
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// The function body block (FUNCTION_BLOCK_ID) describes function bodies. It
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// can contain a constant block (CONSTANTS_BLOCK_ID).
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@ -501,6 +501,9 @@ lltok::Kind LLLexer::LexIdentifier() {
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KEYWORD(deplibs);
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KEYWORD(datalayout);
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KEYWORD(volatile);
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KEYWORD(signed);
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KEYWORD(unsigned);
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KEYWORD(exact);
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KEYWORD(align);
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KEYWORD(addrspace);
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KEYWORD(section);
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@ -21,6 +21,7 @@
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#include "llvm/LLVMContext.h"
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#include "llvm/MDNode.h"
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#include "llvm/Module.h"
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#include "llvm/Operator.h"
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#include "llvm/ValueSymbolTable.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/StringExtras.h"
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@ -2041,6 +2042,49 @@ bool LLParser::ParseValID(ValID &ID) {
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ID.Kind = ValID::t_Constant;
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return false;
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}
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case lltok::kw_signed: {
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Lex.Lex();
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bool AlsoUnsigned = EatIfPresent(lltok::kw_unsigned);
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if (Lex.getKind() != lltok::kw_add &&
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Lex.getKind() != lltok::kw_sub &&
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Lex.getKind() != lltok::kw_mul)
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return TokError("expected 'add', 'sub', or 'mul'");
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bool Result = LLParser::ParseValID(ID);
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if (!Result) {
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cast<OverflowingBinaryOperator>(ID.ConstantVal)
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->setHasNoSignedOverflow(true);
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if (AlsoUnsigned)
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cast<OverflowingBinaryOperator>(ID.ConstantVal)
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->setHasNoUnsignedOverflow(true);
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}
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return Result;
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}
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case lltok::kw_unsigned: {
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Lex.Lex();
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bool AlsoSigned = EatIfPresent(lltok::kw_signed);
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if (Lex.getKind() != lltok::kw_add &&
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Lex.getKind() != lltok::kw_sub &&
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Lex.getKind() != lltok::kw_mul)
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return TokError("expected 'add', 'sub', or 'mul'");
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bool Result = LLParser::ParseValID(ID);
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if (!Result) {
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cast<OverflowingBinaryOperator>(ID.ConstantVal)
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->setHasNoUnsignedOverflow(true);
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if (AlsoSigned)
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cast<OverflowingBinaryOperator>(ID.ConstantVal)
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->setHasNoSignedOverflow(true);
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}
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return Result;
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}
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case lltok::kw_exact: {
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Lex.Lex();
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if (Lex.getKind() != lltok::kw_sdiv)
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return TokError("expected 'sdiv'");
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bool Result = LLParser::ParseValID(ID);
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if (!Result)
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cast<SDivOperator>(ID.ConstantVal)->setIsExact(true);
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return Result;
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}
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}
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Lex.Lex();
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@ -2558,6 +2602,50 @@ bool LLParser::ParseInstruction(Instruction *&Inst, BasicBlock *BB,
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return ParseStore(Inst, PFS, true);
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else
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return TokError("expected 'load' or 'store'");
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case lltok::kw_signed: {
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bool AlsoUnsigned = EatIfPresent(lltok::kw_unsigned);
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if (Lex.getKind() == lltok::kw_add ||
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Lex.getKind() == lltok::kw_sub ||
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Lex.getKind() == lltok::kw_mul) {
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Lex.Lex();
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KeywordVal = Lex.getUIntVal();
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bool Result = ParseArithmetic(Inst, PFS, KeywordVal, 0);
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if (!Result) {
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cast<OverflowingBinaryOperator>(Inst)->setHasNoSignedOverflow(true);
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if (AlsoUnsigned)
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cast<OverflowingBinaryOperator>(Inst)->setHasNoUnsignedOverflow(true);
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}
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return Result;
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}
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return TokError("expected 'add', 'sub', or 'mul'");
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}
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case lltok::kw_unsigned: {
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bool AlsoSigned = EatIfPresent(lltok::kw_signed);
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if (Lex.getKind() == lltok::kw_add ||
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Lex.getKind() == lltok::kw_sub ||
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Lex.getKind() == lltok::kw_mul) {
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Lex.Lex();
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KeywordVal = Lex.getUIntVal();
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bool Result = ParseArithmetic(Inst, PFS, KeywordVal, 1);
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if (!Result) {
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cast<OverflowingBinaryOperator>(Inst)->setHasNoUnsignedOverflow(true);
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if (AlsoSigned)
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cast<OverflowingBinaryOperator>(Inst)->setHasNoSignedOverflow(true);
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}
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return Result;
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}
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return TokError("expected 'add', 'sub', or 'mul'");
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}
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case lltok::kw_exact:
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if (Lex.getKind() == lltok::kw_sdiv) {
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Lex.Lex();
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KeywordVal = Lex.getUIntVal();
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bool Result = ParseArithmetic(Inst, PFS, KeywordVal, 1);
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if (!Result)
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cast<SDivOperator>(Inst)->setIsExact(true);
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return Result;
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}
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return TokError("expected 'udiv'");
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case lltok::kw_getresult: return ParseGetResult(Inst, PFS);
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case lltok::kw_getelementptr: return ParseGetElementPtr(Inst, PFS);
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case lltok::kw_extractvalue: return ParseExtractValue(Inst, PFS);
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@ -51,6 +51,9 @@ namespace lltok {
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kw_deplibs,
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kw_datalayout,
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kw_volatile,
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kw_signed,
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kw_unsigned,
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kw_exact,
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kw_align,
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kw_addrspace,
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kw_section,
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@ -20,6 +20,7 @@
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#include "llvm/LLVMContext.h"
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#include "llvm/MDNode.h"
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#include "llvm/Module.h"
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#include "llvm/Operator.h"
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#include "llvm/AutoUpgrade.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/SmallVector.h"
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@ -747,6 +748,18 @@ bool BitcodeReader::ResolveGlobalAndAliasInits() {
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return false;
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}
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static void SetOptimizationFlags(Value *V, uint64_t Flags) {
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if (OverflowingBinaryOperator *OBO =
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dyn_cast<OverflowingBinaryOperator>(V)) {
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if (Flags & (1 << bitc::OBO_NO_SIGNED_OVERFLOW))
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OBO->setHasNoSignedOverflow(true);
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if (Flags & (1 << bitc::OBO_NO_UNSIGNED_OVERFLOW))
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OBO->setHasNoUnsignedOverflow(true);
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} else if (SDivOperator *Div = dyn_cast<SDivOperator>(V)) {
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if (Flags & (1 << bitc::SDIV_EXACT))
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Div->setIsExact(true);
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}
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}
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bool BitcodeReader::ParseConstants() {
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if (Stream.EnterSubBlock(bitc::CONSTANTS_BLOCK_ID))
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@ -778,7 +791,8 @@ bool BitcodeReader::ParseConstants() {
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// Read a record.
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Record.clear();
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Value *V = 0;
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switch (Stream.ReadRecord(Code, Record)) {
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unsigned BitCode = Stream.ReadRecord(Code, Record);
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switch (BitCode) {
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default: // Default behavior: unknown constant
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case bitc::CST_CODE_UNDEF: // UNDEF
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V = Context.getUndef(CurTy);
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@ -899,6 +913,8 @@ bool BitcodeReader::ParseConstants() {
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Constant *RHS = ValueList.getConstantFwdRef(Record[2], CurTy);
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V = Context.getConstantExpr(Opc, LHS, RHS);
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}
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if (Record.size() >= 4)
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SetOptimizationFlags(V, Record[3]);
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break;
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}
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case bitc::CST_CODE_CE_CAST: { // CE_CAST: [opcode, opty, opval]
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@ -1451,7 +1467,8 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
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// Read a record.
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Record.clear();
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Instruction *I = 0;
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switch (Stream.ReadRecord(Code, Record)) {
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unsigned BitCode = Stream.ReadRecord(Code, Record);
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switch (BitCode) {
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default: // Default behavior: reject
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return Error("Unknown instruction");
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case bitc::FUNC_CODE_DECLAREBLOCKS: // DECLAREBLOCKS: [nblocks]
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@ -1469,12 +1486,14 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
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Value *LHS, *RHS;
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if (getValueTypePair(Record, OpNum, NextValueNo, LHS) ||
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getValue(Record, OpNum, LHS->getType(), RHS) ||
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OpNum+1 != Record.size())
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OpNum+1 > Record.size())
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return Error("Invalid BINOP record");
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int Opc = GetDecodedBinaryOpcode(Record[OpNum], LHS->getType());
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int Opc = GetDecodedBinaryOpcode(Record[OpNum++], LHS->getType());
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if (Opc == -1) return Error("Invalid BINOP record");
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I = BinaryOperator::Create((Instruction::BinaryOps)Opc, LHS, RHS);
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if (OpNum < Record.size())
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SetOptimizationFlags(I, Record[3]);
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break;
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}
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case bitc::FUNC_CODE_INST_CAST: { // CAST: [opval, opty, destty, castopc]
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#include "llvm/Instructions.h"
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#include "llvm/MDNode.h"
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#include "llvm/Module.h"
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#include "llvm/Operator.h"
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#include "llvm/TypeSymbolTable.h"
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#include "llvm/ValueSymbolTable.h"
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#include "llvm/Support/ErrorHandling.h"
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@ -50,6 +51,7 @@ enum {
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// FUNCTION_BLOCK abbrev id's.
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FUNCTION_INST_LOAD_ABBREV = bitc::FIRST_APPLICATION_ABBREV,
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FUNCTION_INST_BINOP_ABBREV,
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FUNCTION_INST_BINOP_FLAGS_ABBREV,
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FUNCTION_INST_CAST_ABBREV,
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FUNCTION_INST_RET_VOID_ABBREV,
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FUNCTION_INST_RET_VAL_ABBREV,
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@ -454,6 +456,22 @@ static void WriteModuleInfo(const Module *M, const ValueEnumerator &VE,
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}
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}
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static uint64_t GetOptimizationFlags(const Value *V) {
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uint64_t Flags = 0;
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if (const OverflowingBinaryOperator *OBO =
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dyn_cast<OverflowingBinaryOperator>(V)) {
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if (OBO->hasNoSignedOverflow())
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Flags |= 1 << bitc::OBO_NO_SIGNED_OVERFLOW;
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if (OBO->hasNoUnsignedOverflow())
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Flags |= 1 << bitc::OBO_NO_UNSIGNED_OVERFLOW;
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} else if (const SDivOperator *Div = dyn_cast<SDivOperator>(V)) {
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if (Div->isExact())
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Flags |= 1 << bitc::SDIV_EXACT;
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}
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return Flags;
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}
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static void WriteConstants(unsigned FirstVal, unsigned LastVal,
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const ValueEnumerator &VE,
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@ -641,6 +659,9 @@ static void WriteConstants(unsigned FirstVal, unsigned LastVal,
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Record.push_back(GetEncodedBinaryOpcode(CE->getOpcode()));
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Record.push_back(VE.getValueID(C->getOperand(0)));
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Record.push_back(VE.getValueID(C->getOperand(1)));
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uint64_t Flags = GetOptimizationFlags(CE);
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if (Flags != 0)
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Record.push_back(Flags);
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}
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break;
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case Instruction::GetElementPtr:
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@ -778,6 +799,12 @@ static void WriteInstruction(const Instruction &I, unsigned InstID,
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AbbrevToUse = FUNCTION_INST_BINOP_ABBREV;
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Vals.push_back(VE.getValueID(I.getOperand(1)));
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Vals.push_back(GetEncodedBinaryOpcode(I.getOpcode()));
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uint64_t Flags = GetOptimizationFlags(&I);
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if (Flags != 0) {
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if (AbbrevToUse == FUNCTION_INST_BINOP_ABBREV)
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AbbrevToUse = FUNCTION_INST_BINOP_FLAGS_ABBREV;
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Vals.push_back(Flags);
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}
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}
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break;
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@ -1225,6 +1252,17 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
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Abbv) != FUNCTION_INST_BINOP_ABBREV)
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llvm_unreachable("Unexpected abbrev ordering!");
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}
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{ // INST_BINOP_FLAGS abbrev for FUNCTION_BLOCK.
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BitCodeAbbrev *Abbv = new BitCodeAbbrev();
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Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_BINOP));
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Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // LHS
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Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // RHS
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Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 4)); // opc
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Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 7)); // flags
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if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
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Abbv) != FUNCTION_INST_BINOP_FLAGS_ABBREV)
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llvm_unreachable("Unexpected abbrev ordering!");
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}
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{ // INST_CAST abbrev for FUNCTION_BLOCK.
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BitCodeAbbrev *Abbv = new BitCodeAbbrev();
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Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_CAST));
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@ -23,6 +23,7 @@
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#include "llvm/InlineAsm.h"
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#include "llvm/Instruction.h"
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#include "llvm/Instructions.h"
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#include "llvm/Operator.h"
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#include "llvm/MDNode.h"
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#include "llvm/Module.h"
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#include "llvm/ValueSymbolTable.h"
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@ -851,6 +852,19 @@ static void WriteMDNodes(raw_ostream &Out, TypePrinting &TypePrinter,
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}
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}
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static void WriteOptimizationInfo(raw_ostream &Out, const User *U) {
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if (const OverflowingBinaryOperator *OBO =
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dyn_cast<OverflowingBinaryOperator>(U)) {
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if (OBO->hasNoUnsignedOverflow())
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Out << "unsigned ";
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if (OBO->hasNoSignedOverflow())
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Out << "signed ";
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} else if (const SDivOperator *Div = dyn_cast<SDivOperator>(U)) {
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if (Div->isExact())
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Out << "exact ";
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}
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}
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static void WriteConstantInt(raw_ostream &Out, const Constant *CV,
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TypePrinting &TypePrinter, SlotTracker *Machine) {
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if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) {
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@ -1062,6 +1076,7 @@ static void WriteConstantInt(raw_ostream &Out, const Constant *CV,
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}
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if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(CV)) {
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WriteOptimizationInfo(Out, CE);
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Out << CE->getOpcodeName();
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if (CE->isCompare())
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Out << ' ' << getPredicateText(CE->getPredicate());
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@ -1682,6 +1697,9 @@ void AssemblyWriter::printInstruction(const Instruction &I) {
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Out << "tail ";
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}
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// Print out optimization information.
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WriteOptimizationInfo(Out, &I);
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// Print out the opcode...
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Out << I.getOpcodeName();
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23
test/Assembler/flags-plain.ll
Normal file
23
test/Assembler/flags-plain.ll
Normal file
@ -0,0 +1,23 @@
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; RUN: llvm-as < %s | llvm-dis | FileCheck %s
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@addr = external global i64
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define i64 @add_plain_ce() {
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; CHECK: ret i64 add (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 add (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sub_plain_ce() {
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; CHECK: ret i64 sub (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 sub (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @mul_plain_ce() {
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; CHECK: ret i64 mul (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 mul (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sdiv_plain_ce() {
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; CHECK: ret i64 sdiv (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 sdiv (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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18
test/Assembler/flags-reversed.ll
Normal file
18
test/Assembler/flags-reversed.ll
Normal file
@ -0,0 +1,18 @@
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; RUN: llvm-as < %s | llvm-dis | FileCheck %s
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@addr = external global i64
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define i64 @add_both_reversed_ce() {
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; CHECK: ret i64 unsigned signed add (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 signed unsigned add (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sub_both_reversed_ce() {
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; CHECK: ret i64 unsigned signed sub (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 signed unsigned sub (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @mul_both_reversed_ce() {
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; CHECK: ret i64 unsigned signed mul (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 signed unsigned mul (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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18
test/Assembler/flags-signed.ll
Normal file
18
test/Assembler/flags-signed.ll
Normal file
@ -0,0 +1,18 @@
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; RUN: llvm-as < %s | llvm-dis | FileCheck %s
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@addr = external global i64
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define i64 @add_signed_ce() {
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; CHECK: ret i64 signed add (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 signed add (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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define i64 @sub_signed_ce() {
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; CHECK: ret i64 signed sub (i64 ptrtoint (i64* @addr to i64), i64 91)
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ret i64 signed sub (i64 ptrtoint (i64* @addr to i64), i64 91)
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}
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||||
define i64 @mul_signed_ce() {
|
||||
; CHECK: ret i64 signed mul (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
ret i64 signed mul (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
}
|
18
test/Assembler/flags-unsigned.ll
Normal file
18
test/Assembler/flags-unsigned.ll
Normal file
@ -0,0 +1,18 @@
|
||||
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
|
||||
|
||||
@addr = external global i64
|
||||
|
||||
define i64 @add_unsigned_ce() {
|
||||
; CHECK: ret i64 unsigned add (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
ret i64 unsigned add (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
}
|
||||
|
||||
define i64 @sub_unsigned_ce() {
|
||||
; CHECK: ret i64 unsigned sub (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
ret i64 unsigned sub (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
}
|
||||
|
||||
define i64 @mul_unsigned_ce() {
|
||||
; CHECK: ret i64 unsigned mul (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
ret i64 unsigned mul (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
}
|
125
test/Assembler/flags.ll
Normal file
125
test/Assembler/flags.ll
Normal file
@ -0,0 +1,125 @@
|
||||
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
|
||||
|
||||
@addr = external global i64
|
||||
|
||||
define i64 @add_signed(i64 %x, i64 %y) {
|
||||
; CHECK: %z = signed add i64 %x, %y
|
||||
%z = signed add i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @sub_signed(i64 %x, i64 %y) {
|
||||
; CHECK: %z = signed sub i64 %x, %y
|
||||
%z = signed sub i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @mul_signed(i64 %x, i64 %y) {
|
||||
; CHECK: %z = signed mul i64 %x, %y
|
||||
%z = signed mul i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @add_unsigned(i64 %x, i64 %y) {
|
||||
; CHECK: %z = unsigned add i64 %x, %y
|
||||
%z = unsigned add i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @sub_unsigned(i64 %x, i64 %y) {
|
||||
; CHECK: %z = unsigned sub i64 %x, %y
|
||||
%z = unsigned sub i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @mul_unsigned(i64 %x, i64 %y) {
|
||||
; CHECK: %z = unsigned mul i64 %x, %y
|
||||
%z = unsigned mul i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @add_plain(i64 %x, i64 %y) {
|
||||
; CHECK: %z = add i64 %x, %y
|
||||
%z = add i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @sub_plain(i64 %x, i64 %y) {
|
||||
; CHECK: %z = sub i64 %x, %y
|
||||
%z = sub i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @mul_plain(i64 %x, i64 %y) {
|
||||
; CHECK: %z = mul i64 %x, %y
|
||||
%z = mul i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @add_both(i64 %x, i64 %y) {
|
||||
; CHECK: %z = unsigned signed add i64 %x, %y
|
||||
%z = unsigned signed add i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @sub_both(i64 %x, i64 %y) {
|
||||
; CHECK: %z = unsigned signed sub i64 %x, %y
|
||||
%z = unsigned signed sub i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @mul_both(i64 %x, i64 %y) {
|
||||
; CHECK: %z = unsigned signed mul i64 %x, %y
|
||||
%z = unsigned signed mul i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @add_both_reversed(i64 %x, i64 %y) {
|
||||
; CHECK: %z = unsigned signed add i64 %x, %y
|
||||
%z = signed unsigned add i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @sub_both_reversed(i64 %x, i64 %y) {
|
||||
; CHECK: %z = unsigned signed sub i64 %x, %y
|
||||
%z = signed unsigned sub i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @mul_both_reversed(i64 %x, i64 %y) {
|
||||
; CHECK: %z = unsigned signed mul i64 %x, %y
|
||||
%z = signed unsigned mul i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @sdiv_exact(i64 %x, i64 %y) {
|
||||
; CHECK: %z = exact sdiv i64 %x, %y
|
||||
%z = exact sdiv i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @sdiv_plain(i64 %x, i64 %y) {
|
||||
; CHECK: %z = sdiv i64 %x, %y
|
||||
%z = sdiv i64 %x, %y
|
||||
ret i64 %z
|
||||
}
|
||||
|
||||
define i64 @add_both_ce() {
|
||||
; CHECK: ret i64 unsigned signed add (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
ret i64 signed unsigned add (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
}
|
||||
|
||||
define i64 @sub_both_ce() {
|
||||
; CHECK: ret i64 unsigned signed sub (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
ret i64 signed unsigned sub (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
}
|
||||
|
||||
define i64 @mul_both_ce() {
|
||||
; CHECK: ret i64 unsigned signed mul (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
ret i64 unsigned signed mul (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
}
|
||||
|
||||
define i64 @sdiv_exact_ce() {
|
||||
; CHECK: ret i64 exact sdiv (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
ret i64 exact sdiv (i64 ptrtoint (i64* @addr to i64), i64 91)
|
||||
}
|
Loading…
Reference in New Issue
Block a user