mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-01-31 12:41:49 +01:00
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes: - added description of GFX10; - added description of operands sccz, vccz, lds_direct, etc; - minor bugfixing and improvements. llvm-svn: 365347
This commit is contained in:
Dmitry Preobrazhensky
parent
c6a0fb82c8
commit
d2c3f2c3bb
2176
docs/AMDGPU/AMDGPUAsmGFX10.rst
Normal file
2176
docs/AMDGPU/AMDGPUAsmGFX10.rst
Normal file
File diff suppressed because it is too large
Load Diff
@ -188,7 +188,7 @@ FLAT
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
flat_atomic_add :ref:`vdst<amdgpu_synid7_dst_flat_atomic32>`::ref:`opt<amdgpu_synid7_opt>`, :ref:`vaddr<amdgpu_synid7_addr_flat>`, :ref:`vdata<amdgpu_synid7_vdata32_0>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
|
||||
flat_atomic_add_x2 :ref:`vdst<amdgpu_synid7_dst_flat_atomic64>`::ref:`opt<amdgpu_synid7_opt>`, :ref:`vaddr<amdgpu_synid7_addr_flat>`, :ref:`vdata<amdgpu_synid7_vdata64_0>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
|
||||
flat_atomic_and :ref:`vdst<amdgpu_synid7_dst_flat_atomic32>`::ref:`opt<amdgpu_synid7_opt>`, :ref:`vaddr<amdgpu_synid7_addr_flat>`, :ref:`vdata<amdgpu_synid7_vdata32_0>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
|
||||
@ -555,22 +555,22 @@ SOPK
|
||||
s_addk_i32 :ref:`sdst<amdgpu_synid7_sdst32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cbranch_i_fork :ref:`ssrc<amdgpu_synid7_ssrc64_3>`, :ref:`label<amdgpu_synid7_label>`
|
||||
s_cmovk_i32 :ref:`sdst<amdgpu_synid7_sdst32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_1>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid7_ssrc32_4>`, :ref:`imm16<amdgpu_synid7_uimm16>`
|
||||
s_getreg_b32 :ref:`sdst<amdgpu_synid7_sdst32_1>`, :ref:`hwreg<amdgpu_synid7_hwreg>`
|
||||
s_movk_i32 :ref:`sdst<amdgpu_synid7_sdst32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_mulk_i32 :ref:`sdst<amdgpu_synid7_sdst32_1>`, :ref:`imm16<amdgpu_synid7_simm16>`
|
||||
s_setreg_b32 :ref:`hwreg<amdgpu_synid7_hwreg>`, :ref:`ssrc<amdgpu_synid7_ssrc32_1>`
|
||||
s_setreg_b32 :ref:`hwreg<amdgpu_synid7_hwreg>`, :ref:`ssrc<amdgpu_synid7_ssrc32_4>`
|
||||
s_setreg_imm32_b32 :ref:`hwreg<amdgpu_synid7_hwreg>`, :ref:`imm32<amdgpu_synid7_bimm32>`
|
||||
|
||||
SOPP
|
||||
@ -678,7 +678,7 @@ VOP1
|
||||
v_rcp_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_0>`
|
||||
v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_0>`
|
||||
v_rcp_legacy_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_0>`
|
||||
v_readfirstlane_b32 :ref:`sdst<amdgpu_synid7_sdst32_2>`, :ref:`vsrc<amdgpu_synid7_vsrc32_0>`
|
||||
v_readfirstlane_b32 :ref:`sdst<amdgpu_synid7_sdst32_2>`, :ref:`vsrc<amdgpu_synid7_vsrc32_1>`
|
||||
v_rndne_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_0>`
|
||||
v_rndne_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_0>`
|
||||
v_rsq_clamp_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_0>`
|
||||
@ -704,7 +704,7 @@ VOP2
|
||||
v_addc_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`
|
||||
v_and_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_ashr_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_ashrrev_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_ashrrev_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_bfm_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_cndmask_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`
|
||||
@ -716,9 +716,9 @@ VOP2
|
||||
v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_ldexp_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`::ref:`i32<amdgpu_synid7_type_dev>`
|
||||
v_lshl_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshlrev_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_lshlrev_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_lshr_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshrrev_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_lshrrev_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_mac_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_mac_legacy_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_madak_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`, :ref:`imm32<amdgpu_synid7_fimm32>`
|
||||
@ -740,14 +740,14 @@ VOP2
|
||||
v_mul_legacy_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_mul_u32_u24 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_or_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_readlane_b32 :ref:`sdst<amdgpu_synid7_sdst32_2>`, :ref:`vsrc0<amdgpu_synid7_vsrc32_0>`, :ref:`ssrc1<amdgpu_synid7_ssrc32_4>`
|
||||
v_readlane_b32 :ref:`sdst<amdgpu_synid7_sdst32_2>`, :ref:`vsrc0<amdgpu_synid7_vsrc32_1>`, :ref:`ssrc1<amdgpu_synid7_ssrc32_5>`
|
||||
v_sub_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_sub_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_subb_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`
|
||||
v_subbrev_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`
|
||||
v_subrev_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_subrev_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_writelane_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`ssrc0<amdgpu_synid7_ssrc32_0>`, :ref:`ssrc1<amdgpu_synid7_ssrc32_4>`
|
||||
v_subbrev_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`
|
||||
v_subrev_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_subrev_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
v_writelane_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`ssrc0<amdgpu_synid7_ssrc32_6>`, :ref:`ssrc1<amdgpu_synid7_ssrc32_5>`
|
||||
v_xor_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_0>`, :ref:`vsrc1<amdgpu_synid7_vsrc32_0>`
|
||||
|
||||
VOP3
|
||||
@ -757,369 +757,369 @@ VOP3
|
||||
|
||||
**INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_add_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_addc_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`ssrc2<amdgpu_synid7_ssrc64_1>`
|
||||
v_alignbit_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_alignbyte_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_and_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_ashr_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_ashr_i64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_bcnt_u32_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_bfe_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_bfe_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_bfi_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_bfm_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_ceil_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_addc_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`ssrc2<amdgpu_synid7_ssrc64_1>`
|
||||
v_alignbit_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_alignbyte_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_and_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_ashr_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_ashr_i64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_bcnt_u32_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_bfe_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_bfe_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_bfi_b32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_bfm_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_ceil_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ceil_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_clrexcp_e64
|
||||
v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_eq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_eq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_eq_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_f_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_f_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_f_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_ge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_ge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_ge_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_gt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_gt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_gt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_le_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_le_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_le_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_lg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_lg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_lg_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_lt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_lt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_lt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_neq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_neq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_neq_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nge_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_ngt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_ngt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_ngt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nle_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nle_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nle_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nlg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nlg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nlg_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nlt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nlt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_nlt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_o_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_o_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_o_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_tru_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_tru_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_tru_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_u_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_u_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmps_u_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_eq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_eq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_eq_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_f_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_f_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_f_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_ge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_ge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_ge_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_gt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_gt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_gt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_le_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_le_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_le_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_lg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_lg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_lg_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_lt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_lt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_lt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_neq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_neq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_neq_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nge_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_ngt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_ngt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_ngt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nle_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nle_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nle_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nlg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nlg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nlg_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nlt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nlt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_nlt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_o_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_o_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_o_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_tru_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_tru_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_tru_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_u_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_u_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpsx_u_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_eq_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_eq_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_eq_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_f_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_f_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_f_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_ge_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_ge_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_ge_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_gt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_gt_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_gt_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_le_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_le_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_le_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_lg_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_lt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_lt_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_lt_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_ne_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_ne_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_neq_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nge_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_ngt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nle_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nlg_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_nlt_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_o_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_t_i64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cmpx_t_u64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`
|
||||
v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_tru_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cmpx_u_f64_e64 :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`ssrc2<amdgpu_synid7_ssrc64_1>`
|
||||
v_cos_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubeid_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubema_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubesc_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubetc_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`ssrc2<amdgpu_synid7_ssrc64_1>`
|
||||
v_cos_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubeid_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubema_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubesc_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubetc_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_5>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src32_3>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src32_3>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_pk_i16_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cvt_pk_u16_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_cvt_pkaccum_u8_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_cvt_pknorm_i16_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_pknorm_u16_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_pkrtz_f16_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_pk_i16_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cvt_pk_u16_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_cvt_pkaccum_u8_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_cvt_pknorm_i16_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_pknorm_u16_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_pkrtz_f16_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_div_fixup_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fixup_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fixup_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fmas_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fmas_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fmas_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_scale_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_div_scale_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_div_scale_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`vcc<amdgpu_synid7_vcc_64>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src64_1>`, :ref:`src2<amdgpu_synid7_src64_1>`
|
||||
v_exp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_floor_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_exp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_floor_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_floor_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fract_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fract_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fract_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`
|
||||
v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`i32<amdgpu_synid7_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`i32<amdgpu_synid7_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lerp_u8 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_log_clamp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_log_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lshl_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshl_b64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_lshr_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshr_b64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mac_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mac_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_i32_i24 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`i32<amdgpu_synid7_type_dev>`
|
||||
v_mad_i64_i32 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src64_1>`::ref:`i64<amdgpu_synid7_type_dev>`
|
||||
v_mad_legacy_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_u32_u24 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_mad_u64_u32 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src64_1>`::ref:`u64<amdgpu_synid7_type_dev>`
|
||||
v_max3_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max3_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_max3_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_max_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`i32<amdgpu_synid7_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`i32<amdgpu_synid7_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lerp_u8 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_6>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_6>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_log_clamp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_log_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lshl_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshl_b64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_lshr_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshr_b64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mac_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mac_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_i32_i24 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`i32<amdgpu_synid7_type_dev>`
|
||||
v_mad_i64_i32 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src64_1>`::ref:`i64<amdgpu_synid7_type_dev>`
|
||||
v_mad_legacy_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_u32_u24 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_mad_u64_u32 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src64_1>`::ref:`u64<amdgpu_synid7_type_dev>`
|
||||
v_max3_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max3_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_max3_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_max_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_max_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mbcnt_hi_u32_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mbcnt_lo_u32_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_med3_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_med3_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_med3_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_min3_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min3_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_min3_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_min_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_max_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mbcnt_hi_u32_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mbcnt_lo_u32_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_med3_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_med3_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_med3_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_min3_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min3_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_min3_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_min_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_min_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mov_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_mov_fed_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_movreld_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_min_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_min_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mov_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_mov_fed_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_movreld_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_movrels_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vsrc<amdgpu_synid7_vsrc32_0>`
|
||||
v_movrelsd_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`vsrc<amdgpu_synid7_vsrc32_0>`
|
||||
v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid7_vdst64_0>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`
|
||||
v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid7_vdst128_0>`::ref:`b128<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`vsrc2<amdgpu_synid7_vsrc128_0>`::ref:`b128<amdgpu_synid7_type_dev>`
|
||||
v_msad_u8 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_mul_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid7_vdst64_0>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_6>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`
|
||||
v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid7_vdst128_0>`::ref:`b128<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_6>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`vsrc2<amdgpu_synid7_vsrc128_0>`::ref:`b128<amdgpu_synid7_type_dev>`
|
||||
v_msad_u8 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_6>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_6>`::ref:`b32<amdgpu_synid7_type_dev>`
|
||||
v_mul_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_hi_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mul_hi_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_lo_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mul_lo_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_mullit_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_hi_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mul_hi_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_lo_i32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mul_lo_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_mullit_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_nop_e64
|
||||
v_not_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`
|
||||
v_or_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid7_vdst64_0>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_1>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`
|
||||
v_rcp_clamp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_not_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`
|
||||
v_or_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid7_vdst64_0>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_6>`::ref:`b32<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid7_type_dev>`
|
||||
v_rcp_clamp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_clamp_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rndne_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rndne_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rndne_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_clamp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_clamp_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_clamp_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sad_hi_u8 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`u8x4<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_1>`::ref:`u8x4<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_sad_u16 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`u16x2<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_1>`::ref:`u16x2<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_sad_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`src2<amdgpu_synid7_src32_2>`
|
||||
v_sad_u8 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`u8x4<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_1>`::ref:`u8x4<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_sin_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_legacy_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sad_hi_u8 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`u8x4<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_6>`::ref:`u8x4<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_sad_u16 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`u16x2<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_6>`::ref:`u16x2<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_sad_u32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`src2<amdgpu_synid7_src32_4>`
|
||||
v_sad_u8 :ref:`vdst<amdgpu_synid7_vdst32_0>`::ref:`u32<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src32_1>`::ref:`u8x4<amdgpu_synid7_type_dev>`, :ref:`src1<amdgpu_synid7_src32_6>`::ref:`u8x4<amdgpu_synid7_type_dev>`, :ref:`src2<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>`
|
||||
v_sin_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_subb_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`ssrc2<amdgpu_synid7_ssrc64_1>`
|
||||
v_subbrev_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`, :ref:`ssrc2<amdgpu_synid7_ssrc64_1>`
|
||||
v_subrev_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_subrev_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_trig_preop_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_2>`::ref:`u32<amdgpu_synid7_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_trunc_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_2>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_subb_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`ssrc2<amdgpu_synid7_ssrc64_1>`
|
||||
v_subbrev_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_4>`, :ref:`src1<amdgpu_synid7_src32_4>`, :ref:`ssrc2<amdgpu_synid7_ssrc64_1>`
|
||||
v_subrev_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_subrev_i32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_sdst64_0>`, :ref:`src0<amdgpu_synid7_src32_4>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
v_trig_preop_f64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src0<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>`, :ref:`src1<amdgpu_synid7_src32_4>`::ref:`u32<amdgpu_synid7_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_trunc_f32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src<amdgpu_synid7_src32_3>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_trunc_f64_e64 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`src<amdgpu_synid7_src64_1>`::ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_xor_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_2>`, :ref:`src1<amdgpu_synid7_src32_2>`
|
||||
v_xor_b32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgpu_synid7_src32_3>`, :ref:`src1<amdgpu_synid7_src32_4>`
|
||||
|
||||
VOPC
|
||||
-----------------------
|
||||
@ -1380,6 +1380,9 @@ VOPC
|
||||
gfx7_src32_1
|
||||
gfx7_src32_2
|
||||
gfx7_src32_3
|
||||
gfx7_src32_4
|
||||
gfx7_src32_5
|
||||
gfx7_src32_6
|
||||
gfx7_src64_0
|
||||
gfx7_src64_1
|
||||
gfx7_src64_2
|
||||
@ -1389,6 +1392,8 @@ VOPC
|
||||
gfx7_ssrc32_2
|
||||
gfx7_ssrc32_3
|
||||
gfx7_ssrc32_4
|
||||
gfx7_ssrc32_5
|
||||
gfx7_ssrc32_6
|
||||
gfx7_ssrc64_0
|
||||
gfx7_ssrc64_1
|
||||
gfx7_ssrc64_2
|
||||
@ -1404,6 +1409,7 @@ VOPC
|
||||
gfx7_vdst96_0
|
||||
gfx7_vsrc128_0
|
||||
gfx7_vsrc32_0
|
||||
gfx7_vsrc32_1
|
||||
gfx7_vsrc64_0
|
||||
gfx7_mod
|
||||
gfx7_opt
|
||||
|
||||
@ -193,7 +193,7 @@ FLAT
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
flat_atomic_add :ref:`vdst<amdgpu_synid8_dst_flat_atomic32>`::ref:`opt<amdgpu_synid8_opt>`, :ref:`vaddr<amdgpu_synid8_addr_flat>`, :ref:`vdata<amdgpu_synid8_vdata32_0>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
|
||||
flat_atomic_add_x2 :ref:`vdst<amdgpu_synid8_dst_flat_atomic64>`::ref:`opt<amdgpu_synid8_opt>`, :ref:`vaddr<amdgpu_synid8_addr_flat>`, :ref:`vdata<amdgpu_synid8_vdata64_0>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
|
||||
flat_atomic_and :ref:`vdst<amdgpu_synid8_dst_flat_atomic32>`::ref:`opt<amdgpu_synid8_opt>`, :ref:`vaddr<amdgpu_synid8_addr_flat>`, :ref:`vdata<amdgpu_synid8_vdata32_0>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
|
||||
@ -405,7 +405,7 @@ SMEM
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
s_atc_probe :ref:`imm3<amdgpu_synid8_perm_smem>`, :ref:`sbase<amdgpu_synid8_base_smem_addr>`, :ref:`soffset<amdgpu_synid8_offset_smem_load>`
|
||||
s_atc_probe_buffer :ref:`imm3<amdgpu_synid8_perm_smem>`, :ref:`sbase<amdgpu_synid8_base_smem_buf>`, :ref:`soffset<amdgpu_synid8_offset_smem_load>`
|
||||
s_buffer_load_dword :ref:`sdst<amdgpu_synid8_sdst32_0>`, :ref:`sbase<amdgpu_synid8_base_smem_buf>`, :ref:`soffset<amdgpu_synid8_offset_smem_load>` :ref:`glc<amdgpu_synid_glc>`
|
||||
@ -805,7 +805,7 @@ VOP1
|
||||
v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_0>`
|
||||
v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
|
||||
v_readfirstlane_b32 :ref:`sdst<amdgpu_synid8_sdst32_2>`, :ref:`vsrc<amdgpu_synid8_vsrc32_0>`
|
||||
v_readfirstlane_b32 :ref:`sdst<amdgpu_synid8_sdst32_2>`, :ref:`vsrc<amdgpu_synid8_vsrc32_1>`
|
||||
v_rndne_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_0>`
|
||||
v_rndne_f16_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
|
||||
@ -866,10 +866,10 @@ VOP2
|
||||
v_and_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_and_b32_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_and_b32_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_ashrrev_i16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_ashrrev_i16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_ashrrev_i16_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_ashrrev_i16_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_ashrrev_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_ashrrev_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_cndmask_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`
|
||||
@ -878,16 +878,16 @@ VOP2
|
||||
v_ldexp_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`i16<amdgpu_synid8_type_dev>`
|
||||
v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`i16<amdgpu_synid8_type_dev>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`::ref:`i16<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshlrev_b16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_lshlrev_b16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_lshlrev_b16_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_lshlrev_b16_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshlrev_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_lshlrev_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshrrev_b16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_lshrrev_b16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_lshrrev_b16_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_lshrrev_b16_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshrrev_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_lshrrev_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_mac_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
@ -978,19 +978,19 @@ VOP2
|
||||
v_subb_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`
|
||||
v_subb_u32_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subb_u32_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`, :ref:`vcc<amdgpu_synid8_vcc_64>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subbrev_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`
|
||||
v_subbrev_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`
|
||||
v_subbrev_u32_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subbrev_u32_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`, :ref:`vcc<amdgpu_synid8_vcc_64>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_subrev_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_subrev_f16_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_subrev_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_subrev_f32_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_u16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_subrev_u16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_subrev_u16_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subrev_u16_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_subrev_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
v_subrev_u32_dpp :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subrev_u32_sdwa :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_xor_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`, :ref:`vsrc1<amdgpu_synid8_vsrc32_0>`
|
||||
@ -1004,290 +1004,290 @@ VOP3
|
||||
|
||||
**INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_add_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_add_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_add_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_add_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_addc_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`ssrc2<amdgpu_synid8_ssrc64_1>`
|
||||
v_alignbit_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_alignbyte_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_and_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_ashrrev_i16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_ashrrev_i64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_bfe_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`
|
||||
v_bfe_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_bfi_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_bfm_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`
|
||||
v_ceil_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_ceil_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_add_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_addc_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`ssrc2<amdgpu_synid8_ssrc64_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_alignbit_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_alignbyte_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_and_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_ashrrev_i16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_ashrrev_i64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_bfe_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`
|
||||
v_bfe_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_bfi_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_bfm_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`
|
||||
v_ceil_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_ceil_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ceil_f64_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_clrexcp_e64
|
||||
v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_f_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_f_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_f_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_t_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_t_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_t_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmp_t_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_class_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmpx_eq_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_class_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_cmpx_eq_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_eq_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_eq_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_eq_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_eq_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_eq_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_eq_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_eq_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_f_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_f_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_f_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_f_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_f_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_f_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_ge_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_ge_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_ge_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_ge_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_ge_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_ge_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_gt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_gt_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_gt_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_gt_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_gt_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_gt_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_le_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_le_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_le_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_le_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_le_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_le_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_lg_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lg_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lg_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_lt_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_lt_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_lt_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_lt_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_lt_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_ne_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_ne_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_ne_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_ne_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_ne_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_ne_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_neq_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_neq_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_neq_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_t_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_t_i16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_t_i64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_t_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cmpx_t_u16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cmpx_t_u64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_cmpx_tru_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_tru_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_tru_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f16_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f64_e64 :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`ssrc2<amdgpu_synid8_ssrc64_1>`
|
||||
v_cos_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cos_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubeid_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubema_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubesc_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubetc_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`ssrc2<amdgpu_synid8_ssrc64_1>`
|
||||
v_cos_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cos_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubeid_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubema_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubesc_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubetc_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`
|
||||
v_cvt_pkaccum_u8_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`
|
||||
v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`
|
||||
v_cvt_pkaccum_u8_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`
|
||||
v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_div_fixup_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_div_fixup_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fixup_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_div_fixup_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fixup_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fmas_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fmas_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fmas_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_scale_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_div_scale_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_div_scale_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`vcc<amdgpu_synid8_vcc_64>`, :ref:`src0<amdgpu_synid8_src64_1>`, :ref:`src1<amdgpu_synid8_src64_1>`, :ref:`src2<amdgpu_synid8_src64_1>`
|
||||
v_exp_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_exp_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`
|
||||
v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`
|
||||
v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`
|
||||
v_floor_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_floor_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_exp_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_exp_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`
|
||||
v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`
|
||||
v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`
|
||||
v_floor_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_floor_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_floor_f64_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fract_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fract_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fract_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fract_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fract_f64_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`
|
||||
v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_interp_mov_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`param<amdgpu_synid8_param>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`attr<amdgpu_synid8_attr>`::ref:`b32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_interp_p1_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`attr<amdgpu_synid8_attr>`::ref:`b32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
@ -1295,116 +1295,116 @@ VOP3
|
||||
v_interp_p1lv_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`f32<amdgpu_synid8_type_dev>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid8_type_dev>`, :ref:`attr<amdgpu_synid8_attr>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`vsrc2<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`::ref:`f16x2<amdgpu_synid8_type_dev>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_interp_p2_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid8_type_dev>`, :ref:`attr<amdgpu_synid8_attr>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`vsrc2<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid8_type_dev>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_interp_p2_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc<amdgpu_synid8_vsrc32_0>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`attr<amdgpu_synid8_attr>`::ref:`b32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`i16<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_ldexp_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`i32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`i32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lerp_u8 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_log_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_log_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lshlrev_b16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_lshlrev_b64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_lshrrev_b16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_lshrrev_b64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_mac_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mac_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_i16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i32_i24 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`i32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i64_i32 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`i64<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_legacy_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_u16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u32_u24 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u64_u32 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`u64<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max3_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max3_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_max3_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_max_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`i16<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_ldexp_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`i32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`i32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lerp_u8 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`
|
||||
v_log_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_log_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lshlrev_b16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_lshlrev_b64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_lshrrev_b16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`u16<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_lshrrev_b64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src64_1>`
|
||||
v_mac_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mac_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_i16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i32_i24 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`i32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i64_i32 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`i64<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_legacy_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_u16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u32_u24 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u64_u32 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`u64<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max3_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max3_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_max3_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_max_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_i16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_max_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_max_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_max_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_med3_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_med3_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_med3_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_min3_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min3_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_min3_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_min_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_min_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_i16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_max_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_max_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_max_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_med3_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_med3_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_med3_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_min3_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min3_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_min3_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_min_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_min_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min_i16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_min_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_min_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_min_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mov_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`
|
||||
v_mov_fed_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`
|
||||
v_movreld_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`
|
||||
v_min_i16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_min_i32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_min_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_min_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mov_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`
|
||||
v_mov_fed_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`
|
||||
v_movreld_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`
|
||||
v_movrels_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc<amdgpu_synid8_vsrc32_0>`
|
||||
v_movrelsd_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`vsrc<amdgpu_synid8_vsrc32_0>`
|
||||
v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid8_vdst64_0>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid8_vdst128_0>`::ref:`b128<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`vsrc2<amdgpu_synid8_vsrc128_0>`::ref:`b128<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_msad_u8 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mul_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mul_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid8_vdst64_0>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid8_vdst128_0>`::ref:`b128<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`vsrc2<amdgpu_synid8_vsrc128_0>`::ref:`b128<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_msad_u8 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mul_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mul_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_hi_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mul_hi_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_lo_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mul_lo_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_mul_hi_i32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mul_hi_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_lo_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mul_lo_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_nop_e64
|
||||
v_not_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`
|
||||
v_or_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_perm_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>`
|
||||
v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid8_vdst64_0>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rcp_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rcp_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_not_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`
|
||||
v_or_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_perm_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>`
|
||||
v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid8_vdst64_0>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`b32<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rcp_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rcp_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_f64_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_readlane_b32 :ref:`sdst<amdgpu_synid8_sdst32_2>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_0>`, :ref:`ssrc1<amdgpu_synid8_ssrc32_3>`
|
||||
v_rndne_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rndne_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_readlane_b32 :ref:`sdst<amdgpu_synid8_sdst32_2>`, :ref:`vsrc0<amdgpu_synid8_vsrc32_1>`, :ref:`ssrc1<amdgpu_synid8_ssrc32_3>`
|
||||
v_rndne_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rndne_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rndne_f64_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rsq_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rsq_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_f64_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sad_hi_u8 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u8x4<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`u8x4<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u16 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u16x2<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`u16x2<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`src2<amdgpu_synid8_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u8 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`u8x4<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`u8x4<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sin_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sin_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sad_hi_u8 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`u8x4<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`u8x4<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u16 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`u16x2<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`u16x2<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`src2<amdgpu_synid8_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u8 :ref:`vdst<amdgpu_synid8_vdst32_0>`::ref:`u32<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`u8x4<amdgpu_synid8_type_dev>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`u8x4<amdgpu_synid8_type_dev>`, :ref:`src2<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sin_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sin_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sub_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_sub_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_subb_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`ssrc2<amdgpu_synid8_ssrc64_1>`
|
||||
v_subbrev_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`, :ref:`ssrc2<amdgpu_synid8_ssrc64_1>`
|
||||
v_subrev_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subrev_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_subrev_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_subrev_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_trig_preop_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_1>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_trunc_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_trunc_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sub_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_sub_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subb_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`ssrc2<amdgpu_synid8_ssrc64_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subbrev_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_3>`, :ref:`src1<amdgpu_synid8_src32_3>`, :ref:`ssrc2<amdgpu_synid8_ssrc64_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subrev_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subrev_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_subrev_u16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
v_subrev_u32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`sdst<amdgpu_synid8_sdst64_0>`, :ref:`src0<amdgpu_synid8_src32_3>`, :ref:`src1<amdgpu_synid8_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_trig_preop_f64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid8_src32_3>`::ref:`u32<amdgpu_synid8_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_trunc_f16_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_trunc_f32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src<amdgpu_synid8_src32_2>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_trunc_f64_e64 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`src<amdgpu_synid8_src64_1>`::ref:`m<amdgpu_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_writelane_b32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`ssrc0<amdgpu_synid8_ssrc32_4>`, :ref:`ssrc1<amdgpu_synid8_ssrc32_3>`
|
||||
v_xor_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_1>`, :ref:`src1<amdgpu_synid8_src32_1>`
|
||||
v_xor_b32_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_2>`, :ref:`src1<amdgpu_synid8_src32_3>`
|
||||
|
||||
VOPC
|
||||
-----------------------
|
||||
@ -1814,6 +1814,8 @@ VOPC
|
||||
gfx8_sdst64_1
|
||||
gfx8_src32_0
|
||||
gfx8_src32_1
|
||||
gfx8_src32_2
|
||||
gfx8_src32_3
|
||||
gfx8_src64_0
|
||||
gfx8_src64_1
|
||||
gfx8_src_exp
|
||||
@ -1837,6 +1839,7 @@ VOPC
|
||||
gfx8_vdst96_0
|
||||
gfx8_vsrc128_0
|
||||
gfx8_vsrc32_0
|
||||
gfx8_vsrc32_1
|
||||
gfx8_vsrc64_0
|
||||
gfx8_mod_dpp_sdwa_abs_neg
|
||||
gfx8_mod_sdwa_sext
|
||||
|
||||
@ -501,7 +501,7 @@ SMEM
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
s_atc_probe :ref:`imm3<amdgpu_synid9_perm_smem>`, :ref:`sbase<amdgpu_synid9_base_smem_addr>`, :ref:`soffset<amdgpu_synid9_offset_smem_plain>`
|
||||
s_atc_probe_buffer :ref:`imm3<amdgpu_synid9_perm_smem>`, :ref:`sbase<amdgpu_synid9_base_smem_buf>`, :ref:`soffset<amdgpu_synid9_offset_smem_buf>`
|
||||
s_atomic_add :ref:`sdata<amdgpu_synid9_data_smem_atomic32>`::ref:`dst<amdgpu_synid9_ret>`, :ref:`sbase<amdgpu_synid9_base_smem_addr>`, :ref:`soffset<amdgpu_synid9_offset_smem_plain>` :ref:`glc<amdgpu_synid_glc>`
|
||||
@ -980,7 +980,7 @@ VOP1
|
||||
v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_0>`
|
||||
v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
|
||||
v_readfirstlane_b32 :ref:`sdst<amdgpu_synid9_sdst32_2>`, :ref:`vsrc<amdgpu_synid9_vsrc32_0>`
|
||||
v_readfirstlane_b32 :ref:`sdst<amdgpu_synid9_sdst32_2>`, :ref:`vsrc<amdgpu_synid9_vsrc32_1>`
|
||||
v_rndne_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_0>`
|
||||
v_rndne_f16_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
|
||||
@ -1051,30 +1051,30 @@ VOP2
|
||||
v_and_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_and_b32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_and_b32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_ashrrev_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_ashrrev_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_ashrrev_i16_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_ashrrev_i16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_ashrrev_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_ashrrev_i16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_ashrrev_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_cndmask_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`
|
||||
v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_cndmask_b32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vcc<amdgpu_synid9_vcc_64>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_ldexp_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`i16<amdgpu_synid9_type_dev>`
|
||||
v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`i16<amdgpu_synid9_type_dev>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`i16<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshlrev_b16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_lshlrev_b16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_lshlrev_b16_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_lshlrev_b16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshlrev_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_lshlrev_b16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshlrev_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshrrev_b16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshrrev_b16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_lshrrev_b16_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_lshrrev_b16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshrrev_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_lshrrev_b16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshrrev_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_mac_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_mac_f16_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_mac_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
@ -1164,24 +1164,24 @@ VOP2
|
||||
v_subb_co_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`
|
||||
v_subb_co_u32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subb_co_u32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vcc<amdgpu_synid9_vcc_64>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subbrev_co_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`
|
||||
v_subbrev_co_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`
|
||||
v_subbrev_co_u32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subbrev_co_u32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vcc<amdgpu_synid9_vcc_64>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_co_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subbrev_co_u32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vcc<amdgpu_synid9_vcc_64>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_co_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subrev_co_u32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subrev_co_u32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subrev_co_u32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subrev_f16_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subrev_f32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subrev_u16_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subrev_u16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subrev_u16_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_subrev_u32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_subrev_u32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_subrev_u32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
v_xor_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`
|
||||
v_xor_b32_dpp :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_xor_b32_sdwa :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
@ -1193,302 +1193,302 @@ VOP3
|
||||
|
||||
**INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_add3_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_add_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_add_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_add_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add3_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_add_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_add_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_add_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_add_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_add_lshl_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_add_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_add_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_addc_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`ssrc2<amdgpu_synid9_ssrc64_1>`
|
||||
v_alignbit_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_alignbyte_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_and_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_and_or_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_ashrrev_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_ashrrev_i64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_bfe_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`
|
||||
v_bfe_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_bfi_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_bfm_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`
|
||||
v_ceil_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_ceil_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_add_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_add_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_add_lshl_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_add_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_add_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_addc_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`ssrc2<amdgpu_synid9_ssrc64_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_alignbit_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_alignbyte_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_and_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_and_or_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_ashrrev_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_ashrrev_i64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_bfe_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`
|
||||
v_bfe_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_bfi_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_bfm_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`
|
||||
v_ceil_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_ceil_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ceil_f64_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_clrexcp_e64
|
||||
v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_f_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_f_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_f_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_f_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_t_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_t_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_t_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmp_t_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_class_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmpx_eq_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_class_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_cmpx_eq_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_eq_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_eq_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_eq_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_eq_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_eq_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_eq_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_eq_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_f_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_f_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_f_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_f_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_f_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_f_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_f_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_ge_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ge_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_ge_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_ge_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_ge_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_ge_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_ge_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_gt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_gt_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_gt_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_gt_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_gt_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_gt_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_gt_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_le_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_le_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_le_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_le_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_le_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_le_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_le_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_lg_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lg_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lg_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_lt_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_lt_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_lt_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_lt_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_lt_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_lt_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_ne_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_ne_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_ne_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_ne_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_ne_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_ne_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_neq_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_neq_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_neq_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nge_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_ngt_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nle_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlg_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_nlt_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_o_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_t_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_t_i16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_t_i64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_t_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cmpx_t_u16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cmpx_t_u64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_cmpx_tru_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_tru_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_tru_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f16_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cmpx_u_f64_e64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`ssrc2<amdgpu_synid9_ssrc64_1>`
|
||||
v_cos_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cos_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubeid_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubema_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubesc_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubetc_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`ssrc2<amdgpu_synid9_ssrc64_1>`
|
||||
v_cos_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cos_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubeid_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubema_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubesc_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cubetc_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_norm_i16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_norm_u16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`
|
||||
v_cvt_pkaccum_u8_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`
|
||||
v_cvt_pknorm_i16_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_pknorm_u16_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_norm_i16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_norm_u16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`
|
||||
v_cvt_pkaccum_u8_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`
|
||||
v_cvt_pknorm_i16_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_pknorm_u16_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_div_fixup_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_div_fixup_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fixup_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_div_fixup_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fixup_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fixup_legacy_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_div_fmas_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fixup_legacy_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_div_fmas_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_fmas_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_div_scale_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_div_scale_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_div_scale_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`vcc<amdgpu_synid9_vcc_64>`, :ref:`src0<amdgpu_synid9_src64_1>`, :ref:`src1<amdgpu_synid9_src64_1>`, :ref:`src2<amdgpu_synid9_src64_1>`
|
||||
v_exp_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_exp_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`
|
||||
v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`
|
||||
v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`
|
||||
v_floor_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_floor_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_exp_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_exp_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`
|
||||
v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`
|
||||
v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`
|
||||
v_floor_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_floor_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_floor_f64_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_legacy_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fract_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fract_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fma_legacy_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fract_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fract_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_fract_f64_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`
|
||||
v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_interp_mov_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`param<amdgpu_synid9_param>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`attr<amdgpu_synid9_attr>`::ref:`b32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_interp_p1_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`attr<amdgpu_synid9_attr>`::ref:`b32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
@ -1497,138 +1497,138 @@ VOP3
|
||||
v_interp_p2_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid9_type_dev>`, :ref:`attr<amdgpu_synid9_attr>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`vsrc2<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid9_type_dev>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_interp_p2_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`attr<amdgpu_synid9_attr>`::ref:`b32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_interp_p2_legacy_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid9_type_dev>`, :ref:`attr<amdgpu_synid9_attr>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`vsrc2<amdgpu_synid9_vsrc32_0>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`::ref:`f32<amdgpu_synid9_type_dev>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`i16<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_ldexp_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`i32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`i32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lerp_u8 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_log_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_log_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lshl_add_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_lshl_or_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_lshlrev_b16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_lshlrev_b64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_lshrrev_b16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_lshrrev_b64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_mac_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mac_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i32_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`i32<amdgpu_synid9_type_dev>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i32_i24 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`i32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i64_i32 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`i64<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_legacy_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_legacy_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_legacy_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_legacy_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u32_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u32_u24 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u64_u32 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`u64<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max3_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max3_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max3_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_max3_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_max3_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_max3_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_max_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`i16<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_ldexp_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`i32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_ldexp_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`i32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lerp_u8 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`
|
||||
v_log_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_log_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_lshl_add_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_lshl_or_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_lshlrev_b16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_lshlrev_b64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_lshrrev_b16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u16<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_lshrrev_b64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src64_1>`
|
||||
v_mac_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mac_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i32_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`i32<amdgpu_synid9_type_dev>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i32_i24 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`i32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_i64_i32 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`i64<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_legacy_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_legacy_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mad_legacy_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_legacy_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u32_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u32_u24 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_u64_u32 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`u64<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max3_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max3_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max3_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_max3_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_max3_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_max3_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_max_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_max_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_max_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_max_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_max_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_med3_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_med3_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_med3_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_med3_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_med3_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_med3_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_min3_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_min3_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min3_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_min3_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_min3_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_min3_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_min_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_min_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_max_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_max_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_max_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_max_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_med3_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_med3_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_med3_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_med3_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_med3_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_med3_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_min3_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_min3_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min3_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_min3_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_min3_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_min3_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_min_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_min_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_min_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_min_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_min_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mov_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`
|
||||
v_mov_fed_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`
|
||||
v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid9_vdst64_0>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid9_vdst128_0>`::ref:`b128<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`vsrc2<amdgpu_synid9_vsrc128_0>`::ref:`b128<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_msad_u8 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mul_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mul_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_min_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_min_i32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_min_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_min_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mov_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`
|
||||
v_mov_fed_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`
|
||||
v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid9_vdst64_0>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid9_vdst128_0>`::ref:`b128<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`vsrc2<amdgpu_synid9_vsrc128_0>`::ref:`b128<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_msad_u8 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mul_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mul_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_hi_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mul_hi_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_lo_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mul_lo_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_mul_hi_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mul_hi_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_mul_lo_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mul_lo_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_nop_e64
|
||||
v_not_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`
|
||||
v_or3_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_or_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_pack_b32_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_perm_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid9_vdst64_0>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rcp_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rcp_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_not_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`
|
||||
v_or3_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_or_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_pack_b32_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
|
||||
v_perm_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid9_vdst64_0>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`b32<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rcp_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rcp_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_f64_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_readlane_b32 :ref:`sdst<amdgpu_synid9_sdst32_2>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_0>`, :ref:`ssrc1<amdgpu_synid9_ssrc32_3>`
|
||||
v_rndne_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rndne_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_readlane_b32 :ref:`sdst<amdgpu_synid9_sdst32_2>`, :ref:`vsrc0<amdgpu_synid9_vsrc32_1>`, :ref:`ssrc1<amdgpu_synid9_ssrc32_3>`
|
||||
v_rndne_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rndne_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rndne_f64_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rsq_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_rsq_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_rsq_f64_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sad_hi_u8 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u8x4<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`u8x4<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u8 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u8x4<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`u8x4<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sat_pk_u8_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`
|
||||
v_screen_partition_4se_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`
|
||||
v_sin_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sin_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sad_hi_u8 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`u8x4<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`u8x4<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sad_u8 :ref:`vdst<amdgpu_synid9_vdst32_0>`::ref:`u32<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`u8x4<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`u8x4<amdgpu_synid9_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sat_pk_u8_i16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`
|
||||
v_screen_partition_4se_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`
|
||||
v_sin_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sin_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_sub_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sub_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sub_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_sub_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_sub_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_subb_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`ssrc2<amdgpu_synid9_ssrc64_1>`
|
||||
v_subbrev_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`ssrc2<amdgpu_synid9_ssrc64_1>`
|
||||
v_subrev_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_subrev_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subrev_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_subrev_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_subrev_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_trig_preop_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_trunc_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_trunc_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sub_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sub_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_sub_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_sub_i32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_sub_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_sub_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subb_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`ssrc2<amdgpu_synid9_ssrc64_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subbrev_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_3>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`ssrc2<amdgpu_synid9_ssrc64_1>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subrev_co_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`sdst<amdgpu_synid9_sdst64_0>`, :ref:`src0<amdgpu_synid9_src32_3>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subrev_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_subrev_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_subrev_u16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
v_subrev_u32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_trig_preop_f64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`u32<amdgpu_synid9_type_dev>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_trunc_f16_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_trunc_f32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src<amdgpu_synid9_src32_2>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_trunc_f64_e64 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`src<amdgpu_synid9_src64_1>`::ref:`m<amdgpu_synid9_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_writelane_b32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`ssrc0<amdgpu_synid9_ssrc32_4>`, :ref:`ssrc1<amdgpu_synid9_ssrc32_3>`
|
||||
v_xad_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>`
|
||||
v_xor_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`
|
||||
v_xad_u32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>`
|
||||
v_xor_b32_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`
|
||||
|
||||
VOP3P
|
||||
-----------------------
|
||||
@ -1637,28 +1637,28 @@ VOP3P
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_mad_mix_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`fx<amdgpu_synid9_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_mixhi_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`fx<amdgpu_synid9_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_mixlo_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src2<amdgpu_synid9_src32_1>`::ref:`fx<amdgpu_synid9_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_add_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_add_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_add_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_ashrrev_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_fma_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_lshlrev_b16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_lshrrev_b16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_mad_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_mad_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>`, :ref:`src2<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_max_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_max_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_max_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_min_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_min_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_min_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_mul_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_sub_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_sub_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_1>`, :ref:`src1<amdgpu_synid9_src32_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_mix_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`fx<amdgpu_synid9_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_mixhi_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`fx<amdgpu_synid9_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_mixlo_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>`::ref:`fx<amdgpu_synid9_mad_type_dev>`, :ref:`src2<amdgpu_synid9_src32_3>`::ref:`fx<amdgpu_synid9_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_add_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_add_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_add_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_ashrrev_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_fma_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_lshlrev_b16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_lshrrev_b16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`::ref:`u16x2<amdgpu_synid9_type_dev>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_mad_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_mad_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>`, :ref:`src2<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_max_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_max_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_max_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_min_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_min_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_min_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_mul_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
|
||||
v_pk_sub_i16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_pk_sub_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_2>`, :ref:`src1<amdgpu_synid9_src32_3>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
|
||||
VOPC
|
||||
-----------------------
|
||||
@ -2067,6 +2067,8 @@ VOPC
|
||||
gfx9_sdst64_1
|
||||
gfx9_src32_0
|
||||
gfx9_src32_1
|
||||
gfx9_src32_2
|
||||
gfx9_src32_3
|
||||
gfx9_src64_0
|
||||
gfx9_src64_1
|
||||
gfx9_src_exp
|
||||
@ -2092,6 +2094,7 @@ VOPC
|
||||
gfx9_vdst96_0
|
||||
gfx9_vsrc128_0
|
||||
gfx9_vsrc32_0
|
||||
gfx9_vsrc32_1
|
||||
gfx9_vsrc64_0
|
||||
gfx9_mad_type_dev
|
||||
gfx9_mod_dpp_sdwa_abs_neg
|
||||
|
||||
22
docs/AMDGPU/gfx10_addr_buf.rst
Normal file
22
docs/AMDGPU/gfx10_addr_buf.rst
Normal file
@ -0,0 +1,22 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_addr_buf:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
|
||||
This is an optional operand which may specify offset and/or index.
|
||||
|
||||
*Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`offen<amdgpu_synid_offen>` and :ref:`idxen<amdgpu_synid_idxen>`:
|
||||
|
||||
* If only :ref:`idxen<amdgpu_synid_idxen>` is specified, this operand supplies an index. Size is 1 dword.
|
||||
* If only :ref:`offen<amdgpu_synid_offen>` is specified, this operand supplies an offset. Size is 1 dword.
|
||||
* If both modifiers are specified, index is in the first register and offset is in the second. Size is 2 dwords.
|
||||
* If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>`.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`off<amdgpu_synid_off>`
|
||||
17
docs/AMDGPU/gfx10_addr_ds.rst
Normal file
17
docs/AMDGPU/gfx10_addr_ds.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_addr_ds:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
|
||||
An offset from the start of GDS/LDS memory.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_addr_flat.rst
Normal file
17
docs/AMDGPU/gfx10_addr_flat.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_addr_flat:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
|
||||
A 64-bit flat address.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
23
docs/AMDGPU/gfx10_addr_mimg.rst
Normal file
23
docs/AMDGPU/gfx10_addr_mimg.rst
Normal file
@ -0,0 +1,23 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_addr_mimg:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
|
||||
Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
|
||||
|
||||
This operand may be specified using either :ref:`standard VGPR syntax<amdgpu_synid_v>` or special :ref:`NSA VGPR syntax<amdgpu_synid_nsa>`.
|
||||
|
||||
*Size:* 1-13 dwords. Actual size depends on syntax, opcode, :ref:`dim<amdgpu_synid_dim>` and :ref:`a16<amdgpu_synid_a16>`.
|
||||
|
||||
* If specified using :ref:`NSA VGPR syntax<amdgpu_synid_nsa>`, the size is 1-13 dwords.
|
||||
* If specified using :ref:`standard VGPR syntax<amdgpu_synid_vcc_lo>`, the size is 1, 2, 3, 4, 8 or 16 dwords. Note that assembler currently supports a limited range of register sequences.
|
||||
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
30
docs/AMDGPU/gfx10_attr.rst
Normal file
30
docs/AMDGPU/gfx10_attr.rst
Normal file
@ -0,0 +1,30 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_attr:
|
||||
|
||||
attr
|
||||
===========================
|
||||
|
||||
Interpolation attribute and channel:
|
||||
|
||||
============== ===================================
|
||||
Syntax Description
|
||||
============== ===================================
|
||||
attr{0..32}.x Attribute 0..32 with *x* channel.
|
||||
attr{0..32}.y Attribute 0..32 with *y* channel.
|
||||
attr{0..32}.z Attribute 0..32 with *z* channel.
|
||||
attr{0..32}.w Attribute 0..32 with *w* channel.
|
||||
============== ===================================
|
||||
|
||||
Examples:
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
v_interp_p1_f32 v1, v0, attr0.x
|
||||
v_interp_p1_f32 v1, v0, attr32.w
|
||||
|
||||
17
docs/AMDGPU/gfx10_base_smem_addr.rst
Normal file
17
docs/AMDGPU/gfx10_base_smem_addr.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_base_smem_addr:
|
||||
|
||||
sbase
|
||||
===========================
|
||||
|
||||
A 64-bit base address for scalar memory operations.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_base_smem_buf.rst
Normal file
17
docs/AMDGPU/gfx10_base_smem_buf.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_base_smem_buf:
|
||||
|
||||
sbase
|
||||
===========================
|
||||
|
||||
A 128-bit buffer resource constant for scalar memory operations which provides a base address, a size and a stride.
|
||||
|
||||
*Size:* 4 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_base_smem_scratch.rst
Normal file
17
docs/AMDGPU/gfx10_base_smem_scratch.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_base_smem_scratch:
|
||||
|
||||
sbase
|
||||
===========================
|
||||
|
||||
This operand is ignored by H/W and :ref:`flat_scratch<amdgpu_synid_flat_scratch>` is supplied instead.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
14
docs/AMDGPU/gfx10_bimm16.rst
Normal file
14
docs/AMDGPU/gfx10_bimm16.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_bimm16:
|
||||
|
||||
imm16
|
||||
===========================
|
||||
|
||||
An :ref:`integer_number<amdgpu_synid_integer_number>`. The value is truncated to 16 bits.
|
||||
|
||||
14
docs/AMDGPU/gfx10_bimm32.rst
Normal file
14
docs/AMDGPU/gfx10_bimm32.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_bimm32:
|
||||
|
||||
imm32
|
||||
===========================
|
||||
|
||||
An :ref:`integer_number<amdgpu_synid_integer_number>`. The value is truncated to 32 bits.
|
||||
|
||||
21
docs/AMDGPU/gfx10_data_buf_atomic128.rst
Normal file
21
docs/AMDGPU/gfx10_data_buf_atomic128.rst
Normal file
@ -0,0 +1,21 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_buf_atomic128:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
Optionally may serve as an output data:
|
||||
|
||||
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
|
||||
|
||||
*Size:* 4 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
21
docs/AMDGPU/gfx10_data_buf_atomic32.rst
Normal file
21
docs/AMDGPU/gfx10_data_buf_atomic32.rst
Normal file
@ -0,0 +1,21 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_buf_atomic32:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
Optionally may serve as an output data:
|
||||
|
||||
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
|
||||
|
||||
*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
21
docs/AMDGPU/gfx10_data_buf_atomic64.rst
Normal file
21
docs/AMDGPU/gfx10_data_buf_atomic64.rst
Normal file
@ -0,0 +1,21 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_buf_atomic64:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
Optionally may serve as an output data:
|
||||
|
||||
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
|
||||
|
||||
*Size:* 2 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
27
docs/AMDGPU/gfx10_data_mimg_atomic_cmp.rst
Normal file
27
docs/AMDGPU/gfx10_data_mimg_atomic_cmp.rst
Normal file
@ -0,0 +1,27 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_mimg_atomic_cmp:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
Optionally may serve as an output data:
|
||||
|
||||
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
|
||||
|
||||
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
|
||||
|
||||
* :ref:`dmask<amdgpu_synid_dmask>` may specify 2 data elements for 32-bit-per-pixel surfaces or 4 data elements for 64-bit-per-pixel surfaces. Each data element occupies 1 dword.
|
||||
* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
Note. The surface data format is indicated in the image resource constant but not in the instruction.
|
||||
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
26
docs/AMDGPU/gfx10_data_mimg_atomic_reg.rst
Normal file
26
docs/AMDGPU/gfx10_data_mimg_atomic_reg.rst
Normal file
@ -0,0 +1,26 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_mimg_atomic_reg:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
Optionally may serve as an output data:
|
||||
|
||||
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
|
||||
|
||||
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
|
||||
|
||||
* :ref:`dmask<amdgpu_synid_dmask>` may specify 1 data element for 32-bit-per-pixel surfaces or 2 data elements for 64-bit-per-pixel surfaces. Each data element occupies 1 dword.
|
||||
* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
Note. The surface data format is indicated in the image resource constant but not in the instruction.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
18
docs/AMDGPU/gfx10_data_mimg_store.rst
Normal file
18
docs/AMDGPU/gfx10_data_mimg_store.rst
Normal file
@ -0,0 +1,18 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_mimg_store:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Image data to store by an *image_store* instruction.
|
||||
|
||||
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` which may specify from 1 to 4 data elements. Each data element occupies 1 dword.
|
||||
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
21
docs/AMDGPU/gfx10_data_mimg_store_d16.rst
Normal file
21
docs/AMDGPU/gfx10_data_mimg_store_d16.rst
Normal file
@ -0,0 +1,21 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_mimg_store_d16:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Image data to store by an *image_store* instruction.
|
||||
|
||||
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`d16<amdgpu_synid_d16>`:
|
||||
|
||||
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
|
||||
* :ref:`d16<amdgpu_synid_d16>` specifies that data in registers are packed; each value occupies 16 bits.
|
||||
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
21
docs/AMDGPU/gfx10_data_smem_atomic128.rst
Normal file
21
docs/AMDGPU/gfx10_data_smem_atomic128.rst
Normal file
@ -0,0 +1,21 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_smem_atomic128:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
Optionally may serve as an output data:
|
||||
|
||||
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
|
||||
|
||||
*Size:* 4 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
21
docs/AMDGPU/gfx10_data_smem_atomic32.rst
Normal file
21
docs/AMDGPU/gfx10_data_smem_atomic32.rst
Normal file
@ -0,0 +1,21 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_smem_atomic32:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
Optionally may serve as an output data:
|
||||
|
||||
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
|
||||
21
docs/AMDGPU/gfx10_data_smem_atomic64.rst
Normal file
21
docs/AMDGPU/gfx10_data_smem_atomic64.rst
Normal file
@ -0,0 +1,21 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_smem_atomic64:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
Optionally may serve as an output data:
|
||||
|
||||
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_dst_buf_128.rst
Normal file
17
docs/AMDGPU/gfx10_dst_buf_128.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_buf_128:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output: data read from a memory buffer.
|
||||
|
||||
*Size:* 4 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_dst_buf_32.rst
Normal file
17
docs/AMDGPU/gfx10_dst_buf_32.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_buf_32:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output: data read from a memory buffer.
|
||||
|
||||
*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_dst_buf_64.rst
Normal file
17
docs/AMDGPU/gfx10_dst_buf_64.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_buf_64:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output: data read from a memory buffer.
|
||||
|
||||
*Size:* 2 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_dst_buf_96.rst
Normal file
17
docs/AMDGPU/gfx10_dst_buf_96.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_buf_96:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output: data read from a memory buffer.
|
||||
|
||||
*Size:* 3 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
21
docs/AMDGPU/gfx10_dst_buf_lds.rst
Normal file
21
docs/AMDGPU/gfx10_dst_buf_lds.rst
Normal file
@ -0,0 +1,21 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_buf_lds:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output: data read from a memory buffer.
|
||||
|
||||
If :ref:`lds<amdgpu_synid_lds>` is specified, this operand is ignored by H/W and data are stored directly into LDS.
|
||||
|
||||
*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
Note that :ref:`tfe<amdgpu_synid_tfe>` and :ref:`lds<amdgpu_synid_lds>` cannot be used together.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
19
docs/AMDGPU/gfx10_dst_flat_atomic32.rst
Normal file
19
docs/AMDGPU/gfx10_dst_flat_atomic32.rst
Normal file
@ -0,0 +1,19 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_flat_atomic32:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Data returned by a 32-bit atomic flat instruction.
|
||||
|
||||
This is an optional operand. It must be used if and only if :ref:`glc<amdgpu_synid_glc>` is specified.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
19
docs/AMDGPU/gfx10_dst_flat_atomic64.rst
Normal file
19
docs/AMDGPU/gfx10_dst_flat_atomic64.rst
Normal file
@ -0,0 +1,19 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_flat_atomic64:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Data returned by a 64-bit atomic flat instruction.
|
||||
|
||||
This is an optional operand. It must be used if and only if :ref:`glc<amdgpu_synid_glc>` is specified.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
22
docs/AMDGPU/gfx10_dst_mimg_gather4.rst
Normal file
22
docs/AMDGPU/gfx10_dst_mimg_gather4.rst
Normal file
@ -0,0 +1,22 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_mimg_gather4:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Image data to load by an *image_gather4* instruction.
|
||||
|
||||
*Size:* 4 data elements by default. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
|
||||
|
||||
:ref:`d16<amdgpu_synid_d16>` and :ref:`tfe<amdgpu_synid_tfe>` affect operand size as follows:
|
||||
|
||||
* :ref:`d16<amdgpu_synid_d16>` specifies that data elements in registers are packed; each value occupies 16 bits.
|
||||
* :ref:`tfe<amdgpu_synid_tfe>` adds one dword if specified.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
20
docs/AMDGPU/gfx10_dst_mimg_regular.rst
Normal file
20
docs/AMDGPU/gfx10_dst_mimg_regular.rst
Normal file
@ -0,0 +1,20 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_mimg_regular:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Image data to load by an image instruction.
|
||||
|
||||
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
|
||||
|
||||
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies 1 dword.
|
||||
* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
22
docs/AMDGPU/gfx10_dst_mimg_regular_d16.rst
Normal file
22
docs/AMDGPU/gfx10_dst_mimg_regular_d16.rst
Normal file
@ -0,0 +1,22 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_dst_mimg_regular_d16:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Image data to load by an image instruction.
|
||||
|
||||
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`, :ref:`tfe<amdgpu_synid_tfe>` and :ref:`d16<amdgpu_synid_d16>`:
|
||||
|
||||
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
|
||||
* :ref:`d16<amdgpu_synid_d16>` specifies that data elements in registers are packed; each value occupies 16 bits.
|
||||
* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
||||
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
14
docs/AMDGPU/gfx10_fimm16.rst
Normal file
14
docs/AMDGPU/gfx10_fimm16.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_fimm16:
|
||||
|
||||
imm32
|
||||
===========================
|
||||
|
||||
An :ref:`integer_number<amdgpu_synid_integer_number>` or a :ref:`floating-point_number<amdgpu_synid_floating-point_number>`. The number is converted to *f16* as described :ref:`here<amdgpu_synid_lit_conv>`.
|
||||
|
||||
14
docs/AMDGPU/gfx10_fimm32.rst
Normal file
14
docs/AMDGPU/gfx10_fimm32.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_fimm32:
|
||||
|
||||
imm32
|
||||
===========================
|
||||
|
||||
An :ref:`integer_number<amdgpu_synid_integer_number>` or a :ref:`floating-point_number<amdgpu_synid_floating-point_number>`. The value is converted to *f32* as described :ref:`here<amdgpu_synid_lit_conv>`.
|
||||
|
||||
69
docs/AMDGPU/gfx10_hwreg.rst
Normal file
69
docs/AMDGPU/gfx10_hwreg.rst
Normal file
@ -0,0 +1,69 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_hwreg:
|
||||
|
||||
hwreg
|
||||
===========================
|
||||
|
||||
Bits of a hardware register being accessed.
|
||||
|
||||
The bits of this operand have the following meaning:
|
||||
|
||||
============ ===================================
|
||||
Bits Description
|
||||
============ ===================================
|
||||
5:0 Register *id*.
|
||||
10:6 First bit *offset* (0..31).
|
||||
15:11 *Size* in bits (1..32).
|
||||
============ ===================================
|
||||
|
||||
This operand may be specified as a positive 16-bit :ref:`integer_number<amdgpu_synid_integer_number>` or using the syntax described below.
|
||||
|
||||
==================================== ============================================================================
|
||||
Syntax Description
|
||||
==================================== ============================================================================
|
||||
hwreg({0..63}) All bits of a register indicated by its *id*.
|
||||
hwreg(<*name*>) All bits of a register indicated by its *name*.
|
||||
hwreg({0..63}, {0..31}, {1..32}) Register bits indicated by register *id*, first bit *offset* and *size*.
|
||||
hwreg(<*name*>, {0..31}, {1..32}) Register bits indicated by register *name*, first bit *offset* and *size*.
|
||||
==================================== ============================================================================
|
||||
|
||||
Register *id*, *offset* and *size* must be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`.
|
||||
|
||||
Defined register *names* include:
|
||||
|
||||
=================== ==========================================
|
||||
Name Description
|
||||
=================== ==========================================
|
||||
HW_REG_MODE Shader writeable mode bits.
|
||||
HW_REG_STATUS Shader read-only status.
|
||||
HW_REG_TRAPSTS Trap status.
|
||||
HW_REG_HW_ID Id of wave, simd, compute unit, etc.
|
||||
HW_REG_GPR_ALLOC Per-wave SGPR and VGPR allocation.
|
||||
HW_REG_LDS_ALLOC Per-wave LDS allocation.
|
||||
HW_REG_IB_STS Counters of outstanding instructions.
|
||||
HW_REG_SH_MEM_BASES Memory aperture.
|
||||
HW_REG_TBA_LO tba_lo register.
|
||||
HW_REG_TBA_HI tba_hi register.
|
||||
HW_REG_TMA_LO tma_lo register.
|
||||
HW_REG_TMA_HI tma_hi register.
|
||||
HW_REG_FLAT_SCR_LO flat_scratch_lo register.
|
||||
HW_REG_FLAT_SCR_HI flat_scratch_hi register.
|
||||
HW_REG_XNACK_MASK xnack_mask register.
|
||||
HW_REG_POPS_PACKER pops_packer register.
|
||||
=================== ==========================================
|
||||
|
||||
Examples:
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
s_getreg_b32 s2, 0x6
|
||||
s_getreg_b32 s2, hwreg(15)
|
||||
s_getreg_b32 s2, hwreg(51, 1, 31)
|
||||
s_getreg_b32 s2, hwreg(HW_REG_LDS_ALLOC, 0, 1)
|
||||
|
||||
30
docs/AMDGPU/gfx10_label.rst
Normal file
30
docs/AMDGPU/gfx10_label.rst
Normal file
@ -0,0 +1,30 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_label:
|
||||
|
||||
label
|
||||
===========================
|
||||
|
||||
A branch target which is a 16-bit signed integer treated as a PC-relative dword offset.
|
||||
|
||||
This operand may be specified as:
|
||||
|
||||
* An :ref:`integer_number<amdgpu_synid_integer_number>`. The number is truncated to 16 bits.
|
||||
* An :ref:`absolute_expression<amdgpu_synid_absolute_expression>` which must start with an :ref:`integer_number<amdgpu_synid_integer_number>`. The value of the expression is truncated to 16 bits.
|
||||
* A :ref:`symbol<amdgpu_synid_symbol>` (for example, a label). The value is handled as a 16-bit PC-relative dword offset to be resolved by a linker.
|
||||
|
||||
Examples:
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
offset = 30
|
||||
s_branch loop_end
|
||||
s_branch 2 + offset
|
||||
s_branch 32
|
||||
loop_end:
|
||||
|
||||
17
docs/AMDGPU/gfx10_mad_type_dev.rst
Normal file
17
docs/AMDGPU/gfx10_mad_type_dev.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_mad_type_dev:
|
||||
|
||||
fx
|
||||
===========================
|
||||
|
||||
This is an *f32* or *f16* operand depending on instruction modifiers:
|
||||
|
||||
* Operand size is controlled by :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>`.
|
||||
* Location of 16-bit operand is controlled by :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>`.
|
||||
|
||||
14
docs/AMDGPU/gfx10_mod_dpp_sdwa_abs_neg.rst
Normal file
14
docs/AMDGPU/gfx10_mod_dpp_sdwa_abs_neg.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_mod_dpp_sdwa_abs_neg:
|
||||
|
||||
m
|
||||
===========================
|
||||
|
||||
This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
|
||||
|
||||
14
docs/AMDGPU/gfx10_mod_sdwa_sext.rst
Normal file
14
docs/AMDGPU/gfx10_mod_sdwa_sext.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_mod_sdwa_sext:
|
||||
|
||||
m
|
||||
===========================
|
||||
|
||||
This operand may be used with integer operand modifier :ref:`sext<amdgpu_synid_sext>`.
|
||||
|
||||
14
docs/AMDGPU/gfx10_mod_vop3_abs_neg.rst
Normal file
14
docs/AMDGPU/gfx10_mod_vop3_abs_neg.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_mod_vop3_abs_neg:
|
||||
|
||||
m
|
||||
===========================
|
||||
|
||||
This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
|
||||
|
||||
73
docs/AMDGPU/gfx10_msg.rst
Normal file
73
docs/AMDGPU/gfx10_msg.rst
Normal file
@ -0,0 +1,73 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_msg:
|
||||
|
||||
msg
|
||||
===========================
|
||||
|
||||
A 16-bit message code. The bits of this operand have the following meaning:
|
||||
|
||||
============ ======================================================
|
||||
Bits Description
|
||||
============ ======================================================
|
||||
3:0 Message *type*.
|
||||
6:4 Optional *operation*.
|
||||
9:7 Optional *parameters*.
|
||||
15:10 Unused.
|
||||
============ ======================================================
|
||||
|
||||
This operand may be specified as a positive 16-bit :ref:`integer_number<amdgpu_synid_integer_number>` or using the syntax described below:
|
||||
|
||||
======================================== ========================================================================
|
||||
Syntax Description
|
||||
======================================== ========================================================================
|
||||
sendmsg(<*type*>) A message identified by its *type*.
|
||||
sendmsg(<*type*>, <*op*>) A message identified by its *type* and *operation*.
|
||||
sendmsg(<*type*>, <*op*>, <*stream*>) A message identified by its *type* and *operation* with a stream *id*.
|
||||
======================================== ========================================================================
|
||||
|
||||
*Type* may be specified using message *name* or message *id*.
|
||||
|
||||
*Op* may be specified using operation *name* or operation *id*.
|
||||
|
||||
Stream *id* is an integer in the range 0..3.
|
||||
|
||||
Message *id*, operation *id* and stream *id* must be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`.
|
||||
|
||||
Each message type supports specific operations:
|
||||
|
||||
================= ========== ============================== ============ ==========
|
||||
Message name Message Id Supported Operations Operation Id Stream Id
|
||||
================= ========== ============================== ============ ==========
|
||||
MSG_INTERRUPT 1 \- \- \-
|
||||
MSG_GS 2 GS_OP_CUT 1 Optional
|
||||
\ GS_OP_EMIT 2 Optional
|
||||
\ GS_OP_EMIT_CUT 3 Optional
|
||||
MSG_GS_DONE 3 GS_OP_NOP 0 \-
|
||||
\ GS_OP_CUT 1 Optional
|
||||
\ GS_OP_EMIT 2 Optional
|
||||
\ GS_OP_EMIT_CUT 3 Optional
|
||||
MSG_GS_ALLOC_REQ 9 \- \- \-
|
||||
MSG_SYSMSG 15 SYSMSG_OP_ECC_ERR_INTERRUPT 1 \-
|
||||
\ SYSMSG_OP_REG_RD 2 \-
|
||||
\ SYSMSG_OP_HOST_TRAP_ACK 3 \-
|
||||
\ SYSMSG_OP_TTRACE_PC 4 \-
|
||||
================= ========== ============================== ============ ==========
|
||||
|
||||
Examples:
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
s_sendmsg 0x12
|
||||
s_sendmsg sendmsg(MSG_INTERRUPT)
|
||||
s_sendmsg sendmsg(2, GS_OP_CUT)
|
||||
s_sendmsg sendmsg(MSG_GS, GS_OP_EMIT)
|
||||
s_sendmsg sendmsg(MSG_GS, 2)
|
||||
s_sendmsg sendmsg(MSG_GS_DONE, GS_OP_EMIT_CUT, 1)
|
||||
s_sendmsg sendmsg(MSG_SYSMSG, SYSMSG_OP_TTRACE_PC)
|
||||
|
||||
17
docs/AMDGPU/gfx10_offset_buf.rst
Normal file
17
docs/AMDGPU/gfx10_offset_buf.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_offset_buf:
|
||||
|
||||
soffset
|
||||
===========================
|
||||
|
||||
An unsigned byte offset.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
||||
19
docs/AMDGPU/gfx10_offset_smem_buf.rst
Normal file
19
docs/AMDGPU/gfx10_offset_smem_buf.rst
Normal file
@ -0,0 +1,19 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_offset_smem_buf:
|
||||
|
||||
soffset
|
||||
===========================
|
||||
|
||||
An unsigned byte offset added to the base address to get memory address.
|
||||
|
||||
.. WARNING:: Assembler currently supports 20-bit offsets only. Use :ref:`uimm20<amdgpu_synid_uimm20>` instead of :ref:`uimm21<amdgpu_synid_uimm21>`.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`uimm21<amdgpu_synid_uimm21>`
|
||||
22
docs/AMDGPU/gfx10_offset_smem_plain.rst
Normal file
22
docs/AMDGPU/gfx10_offset_smem_plain.rst
Normal file
@ -0,0 +1,22 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_offset_smem_plain:
|
||||
|
||||
soffset
|
||||
===========================
|
||||
|
||||
An offset added to the base address to get memory address.
|
||||
|
||||
* If offset is specified as a register, it supplies an unsigned byte offset.
|
||||
* If offset is specified as a 21-bit immediate, it supplies a signed byte offset.
|
||||
|
||||
.. WARNING:: Assembler currently supports 20-bit unsigned offsets only. Use :ref:`uimm20<amdgpu_synid_uimm20>` instead of :ref:`simm21<amdgpu_synid_simm21>`.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`simm21<amdgpu_synid_simm21>`
|
||||
14
docs/AMDGPU/gfx10_opt.rst
Normal file
14
docs/AMDGPU/gfx10_opt.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_opt:
|
||||
|
||||
opt
|
||||
===========================
|
||||
|
||||
This is an optional operand. It must be used if and only if :ref:`glc<amdgpu_synid_glc>` is specified.
|
||||
|
||||
22
docs/AMDGPU/gfx10_param.rst
Normal file
22
docs/AMDGPU/gfx10_param.rst
Normal file
@ -0,0 +1,22 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_param:
|
||||
|
||||
param
|
||||
===========================
|
||||
|
||||
Interpolation parameter to read:
|
||||
|
||||
============ ===================================
|
||||
Syntax Description
|
||||
============ ===================================
|
||||
p0 Parameter *P0*.
|
||||
p10 Parameter *P10*.
|
||||
p20 Parameter *P20*.
|
||||
============ ===================================
|
||||
|
||||
24
docs/AMDGPU/gfx10_perm_smem.rst
Normal file
24
docs/AMDGPU/gfx10_perm_smem.rst
Normal file
@ -0,0 +1,24 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_perm_smem:
|
||||
|
||||
imm3
|
||||
===========================
|
||||
|
||||
A bit mask which indicates request permissions.
|
||||
|
||||
This operand must be specified as an :ref:`integer_number<amdgpu_synid_integer_number>`. The value is truncated to 7 bits, but only 3 low bits are significant.
|
||||
|
||||
============ ==============================
|
||||
Bit Number Description
|
||||
============ ==============================
|
||||
0 Request *read* permission.
|
||||
1 Request *write* permission.
|
||||
2 Request *execute* permission.
|
||||
============ ==============================
|
||||
|
||||
14
docs/AMDGPU/gfx10_ret.rst
Normal file
14
docs/AMDGPU/gfx10_ret.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ret:
|
||||
|
||||
dst
|
||||
===========================
|
||||
|
||||
This is an input operand. It may optionally serve as a destination if :ref:`glc<amdgpu_synid_glc>` is specified.
|
||||
|
||||
17
docs/AMDGPU/gfx10_rsrc_buf.rst
Normal file
17
docs/AMDGPU/gfx10_rsrc_buf.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_rsrc_buf:
|
||||
|
||||
srsrc
|
||||
===========================
|
||||
|
||||
Buffer resource constant which defines the address and characteristics of the buffer in memory.
|
||||
|
||||
*Size:* 4 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_rsrc_mimg.rst
Normal file
17
docs/AMDGPU/gfx10_rsrc_mimg.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_rsrc_mimg:
|
||||
|
||||
srsrc
|
||||
===========================
|
||||
|
||||
Image resource constant which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
|
||||
|
||||
*Size:* 8 dwords by default, 4 dwords if :ref:`r128<amdgpu_synid_r128>` is specified.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
19
docs/AMDGPU/gfx10_saddr_flat_global.rst
Normal file
19
docs/AMDGPU/gfx10_saddr_flat_global.rst
Normal file
@ -0,0 +1,19 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_saddr_flat_global:
|
||||
|
||||
saddr
|
||||
===========================
|
||||
|
||||
An optional 64-bit flat global address. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
|
||||
|
||||
See :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` for description of available addressing modes.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`off<amdgpu_synid_off>`
|
||||
19
docs/AMDGPU/gfx10_saddr_flat_scratch.rst
Normal file
19
docs/AMDGPU/gfx10_saddr_flat_scratch.rst
Normal file
@ -0,0 +1,19 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_saddr_flat_scratch:
|
||||
|
||||
saddr
|
||||
===========================
|
||||
|
||||
An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
|
||||
|
||||
Either this operand or :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>` must be set to :ref:`off<amdgpu_synid_off>`.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`off<amdgpu_synid_off>`
|
||||
17
docs/AMDGPU/gfx10_samp_mimg.rst
Normal file
17
docs/AMDGPU/gfx10_samp_mimg.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_samp_mimg:
|
||||
|
||||
ssamp
|
||||
===========================
|
||||
|
||||
Sampler constant used to specify filtering options applied to the image data after it is read.
|
||||
|
||||
*Size:* 4 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_sdata128_0.rst
Normal file
17
docs/AMDGPU/gfx10_sdata128_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdata128_0:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 4 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_sdata32_0.rst
Normal file
17
docs/AMDGPU/gfx10_sdata32_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdata32_0:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
|
||||
17
docs/AMDGPU/gfx10_sdata64_0.rst
Normal file
17
docs/AMDGPU/gfx10_sdata64_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdata64_0:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_sdst128_0.rst
Normal file
17
docs/AMDGPU/gfx10_sdst128_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst128_0:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 4 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_sdst256_0.rst
Normal file
17
docs/AMDGPU/gfx10_sdst256_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst256_0:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 8 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_sdst32_0.rst
Normal file
17
docs/AMDGPU/gfx10_sdst32_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst32_0:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
|
||||
17
docs/AMDGPU/gfx10_sdst32_1.rst
Normal file
17
docs/AMDGPU/gfx10_sdst32_1.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst32_1:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`
|
||||
17
docs/AMDGPU/gfx10_sdst32_2.rst
Normal file
17
docs/AMDGPU/gfx10_sdst32_2.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst32_2:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_sdst512_0.rst
Normal file
17
docs/AMDGPU/gfx10_sdst512_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst512_0:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 16 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_sdst64_0.rst
Normal file
17
docs/AMDGPU/gfx10_sdst64_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst64_0:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
17
docs/AMDGPU/gfx10_sdst64_1.rst
Normal file
17
docs/AMDGPU/gfx10_sdst64_1.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst64_1:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`
|
||||
14
docs/AMDGPU/gfx10_simm16.rst
Normal file
14
docs/AMDGPU/gfx10_simm16.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_simm16:
|
||||
|
||||
imm16
|
||||
===========================
|
||||
|
||||
An :ref:`integer_number<amdgpu_synid_integer_number>`. The value is truncated to 16 bits and then sign-extended to 32 bits.
|
||||
|
||||
17
docs/AMDGPU/gfx10_src32_0.rst
Normal file
17
docs/AMDGPU/gfx10_src32_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_0:
|
||||
|
||||
src
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
||||
17
docs/AMDGPU/gfx10_src32_1.rst
Normal file
17
docs/AMDGPU/gfx10_src32_1.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_1:
|
||||
|
||||
src
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
17
docs/AMDGPU/gfx10_src32_2.rst
Normal file
17
docs/AMDGPU/gfx10_src32_2.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_2:
|
||||
|
||||
src
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
17
docs/AMDGPU/gfx10_src32_3.rst
Normal file
17
docs/AMDGPU/gfx10_src32_3.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_3:
|
||||
|
||||
src
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`
|
||||
17
docs/AMDGPU/gfx10_src64_0.rst
Normal file
17
docs/AMDGPU/gfx10_src64_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src64_0:
|
||||
|
||||
src
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
28
docs/AMDGPU/gfx10_src_exp.rst
Normal file
28
docs/AMDGPU/gfx10_src_exp.rst
Normal file
@ -0,0 +1,28 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src_exp:
|
||||
|
||||
vsrc
|
||||
===========================
|
||||
|
||||
Data to copy to export buffers. This is an optional operand. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
|
||||
|
||||
:ref:`compr<amdgpu_synid_compr>` modifier indicates use of compressed (16-bit) data. This limits number of source operands from 4 to 2:
|
||||
|
||||
* src0 and src1 must specify the first register (or :ref:`off<amdgpu_synid_off>`).
|
||||
* src2 and src3 must specify the second register (or :ref:`off<amdgpu_synid_off>`).
|
||||
|
||||
An example:
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
exp mrtz v3, v3, off, off compr
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`off<amdgpu_synid_off>`
|
||||
17
docs/AMDGPU/gfx10_ssrc32_0.rst
Normal file
17
docs/AMDGPU/gfx10_ssrc32_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_0:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
17
docs/AMDGPU/gfx10_ssrc32_1.rst
Normal file
17
docs/AMDGPU/gfx10_ssrc32_1.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_1:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
|
||||
17
docs/AMDGPU/gfx10_ssrc32_2.rst
Normal file
17
docs/AMDGPU/gfx10_ssrc32_2.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_2:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`
|
||||
17
docs/AMDGPU/gfx10_ssrc32_3.rst
Normal file
17
docs/AMDGPU/gfx10_ssrc32_3.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_3:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
||||
17
docs/AMDGPU/gfx10_ssrc32_4.rst
Normal file
17
docs/AMDGPU/gfx10_ssrc32_4.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_4:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`iconst<amdgpu_synid_iconst>`
|
||||
17
docs/AMDGPU/gfx10_ssrc32_5.rst
Normal file
17
docs/AMDGPU/gfx10_ssrc32_5.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_5:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
17
docs/AMDGPU/gfx10_ssrc64_0.rst
Normal file
17
docs/AMDGPU/gfx10_ssrc64_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc64_0:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
17
docs/AMDGPU/gfx10_ssrc64_1.rst
Normal file
17
docs/AMDGPU/gfx10_ssrc64_1.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc64_1:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||
25
docs/AMDGPU/gfx10_tgt.rst
Normal file
25
docs/AMDGPU/gfx10_tgt.rst
Normal file
@ -0,0 +1,25 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_tgt:
|
||||
|
||||
tgt
|
||||
===========================
|
||||
|
||||
An export target:
|
||||
|
||||
============== ===================================
|
||||
Syntax Description
|
||||
============== ===================================
|
||||
pos{0..4} Copy vertex position 0..4.
|
||||
param{0..31} Copy vertex parameter 0..31.
|
||||
mrt{0..7} Copy pixel color to the MRTs 0..7.
|
||||
mrtz Copy pixel depth (Z) data.
|
||||
prim Copy primitive (connectivity) data.
|
||||
null Copy nothing.
|
||||
============== ===================================
|
||||
|
||||
14
docs/AMDGPU/gfx10_type_dev.rst
Normal file
14
docs/AMDGPU/gfx10_type_dev.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_type_dev:
|
||||
|
||||
Type deviation
|
||||
===========================
|
||||
|
||||
*Type* of this operand differs from *type* :ref:`implied by the opcode<amdgpu_syn_instruction_type>`. This tag specifies actual operand *type*.
|
||||
|
||||
14
docs/AMDGPU/gfx10_uimm16.rst
Normal file
14
docs/AMDGPU/gfx10_uimm16.rst
Normal file
@ -0,0 +1,14 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_uimm16:
|
||||
|
||||
imm16
|
||||
===========================
|
||||
|
||||
An :ref:`integer_number<amdgpu_synid_integer_number>`. The value is truncated to 16 bits and then zero-extended to 32 bits.
|
||||
|
||||
22
docs/AMDGPU/gfx10_vaddr_flat_global.rst
Normal file
22
docs/AMDGPU/gfx10_vaddr_flat_global.rst
Normal file
@ -0,0 +1,22 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vaddr_flat_global:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
|
||||
A 64-bit flat global address or a 32-bit offset depending on addressing mode:
|
||||
|
||||
* Address = :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid10_saddr_flat_global>` set to :ref:`off<amdgpu_synid_off>`.
|
||||
* Address = :ref:`saddr<amdgpu_synid10_saddr_flat_global>` + :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid10_saddr_flat_global>` is not :ref:`off<amdgpu_synid_off>`.
|
||||
|
||||
.. WARNING:: Assembler currently expects a 64-bit *vaddr* regardless of addressing mode. This have to be fixed.
|
||||
|
||||
*Size:* 1 or 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
19
docs/AMDGPU/gfx10_vaddr_flat_scratch.rst
Normal file
19
docs/AMDGPU/gfx10_vaddr_flat_scratch.rst
Normal file
@ -0,0 +1,19 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vaddr_flat_scratch:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
|
||||
An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
|
||||
|
||||
Either this operand or :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` must be set to :ref:`off<amdgpu_synid_off>`.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`off<amdgpu_synid_off>`
|
||||
17
docs/AMDGPU/gfx10_vcc_32.rst
Normal file
17
docs/AMDGPU/gfx10_vcc_32.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vcc_32:
|
||||
|
||||
vcc
|
||||
===========================
|
||||
|
||||
Vector condition code. This operand depends on wavefront size:
|
||||
|
||||
* Should be :ref:`vcc_lo<amdgpu_synid_vcc_lo>` if wavefront size is 32.
|
||||
* Should be :ref:`vcc<amdgpu_synid_vcc>` if wavefront size is 64.
|
||||
|
||||
17
docs/AMDGPU/gfx10_vdata128_0.rst
Normal file
17
docs/AMDGPU/gfx10_vdata128_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vdata128_0:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 4 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vdata32_0.rst
Normal file
17
docs/AMDGPU/gfx10_vdata32_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vdata32_0:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vdata64_0.rst
Normal file
17
docs/AMDGPU/gfx10_vdata64_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vdata64_0:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vdata96_0.rst
Normal file
17
docs/AMDGPU/gfx10_vdata96_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vdata96_0:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 3 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vdst128_0.rst
Normal file
17
docs/AMDGPU/gfx10_vdst128_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vdst128_0:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 4 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vdst32_0.rst
Normal file
17
docs/AMDGPU/gfx10_vdst32_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vdst32_0:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vdst64_0.rst
Normal file
17
docs/AMDGPU/gfx10_vdst64_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vdst64_0:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vdst96_0.rst
Normal file
17
docs/AMDGPU/gfx10_vdst96_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vdst96_0:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 3 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vsrc128_0.rst
Normal file
17
docs/AMDGPU/gfx10_vsrc128_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vsrc128_0:
|
||||
|
||||
vsrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 4 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vsrc32_0.rst
Normal file
17
docs/AMDGPU/gfx10_vsrc32_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vsrc32_0:
|
||||
|
||||
vsrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
17
docs/AMDGPU/gfx10_vsrc32_1.rst
Normal file
17
docs/AMDGPU/gfx10_vsrc32_1.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vsrc32_1:
|
||||
|
||||
vsrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`
|
||||
17
docs/AMDGPU/gfx10_vsrc64_0.rst
Normal file
17
docs/AMDGPU/gfx10_vsrc64_0.rst
Normal file
@ -0,0 +1,17 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vsrc64_0:
|
||||
|
||||
vsrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
56
docs/AMDGPU/gfx10_waitcnt.rst
Normal file
56
docs/AMDGPU/gfx10_waitcnt.rst
Normal file
@ -0,0 +1,56 @@
|
||||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_waitcnt:
|
||||
|
||||
waitcnt
|
||||
===========================
|
||||
|
||||
Counts of outstanding instructions to wait for.
|
||||
|
||||
The bits of this operand have the following meaning:
|
||||
|
||||
============ ======================================================
|
||||
Bits Description
|
||||
============ ======================================================
|
||||
3:0 VM_CNT: vector memory operations count, lower bits.
|
||||
6:4 EXP_CNT: export count.
|
||||
11:8 LGKM_CNT: LDS, GDS, Constant and Message count.
|
||||
15:14 VM_CNT: vector memory operations count, upper bits.
|
||||
============ ======================================================
|
||||
|
||||
This operand may be specified as a positive 16-bit :ref:`integer_number<amdgpu_synid_integer_number>`
|
||||
or as a combination of the following symbolic helpers:
|
||||
|
||||
====================== ======================================================================
|
||||
Syntax Description
|
||||
====================== ======================================================================
|
||||
vmcnt(<*N*>) VM_CNT value. *N* must not exceed the largest VM_CNT value.
|
||||
expcnt(<*N*>) EXP_CNT value. *N* must not exceed the largest EXP_CNT value.
|
||||
lgkmcnt(<*N*>) LGKM_CNT value. *N* must not exceed the largest LGKM_CNT value.
|
||||
vmcnt_sat(<*N*>) VM_CNT value computed as min(*N*, the largest VM_CNT value).
|
||||
expcnt_sat(<*N*>) EXP_CNT value computed as min(*N*, the largest EXP_CNT value).
|
||||
lgkmcnt_sat(<*N*>) LGKM_CNT value computed as min(*N*, the largest LGKM_CNT value).
|
||||
====================== ======================================================================
|
||||
|
||||
These helpers may be specified in any order. Ampersands and commas may be used as optional separators.
|
||||
|
||||
*N* is either an
|
||||
:ref:`integer number<amdgpu_synid_integer_number>` or an
|
||||
:ref:`absolute expression<amdgpu_synid_absolute_expression>`.
|
||||
|
||||
Examples:
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
s_waitcnt 0
|
||||
s_waitcnt vmcnt(1)
|
||||
s_waitcnt expcnt(2) lgkmcnt(3)
|
||||
s_waitcnt vmcnt(1) expcnt(2) lgkmcnt(3)
|
||||
s_waitcnt vmcnt(1), expcnt(2), lgkmcnt(3)
|
||||
s_waitcnt vmcnt(1) & lgkmcnt_sat(100) & expcnt(2)
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user