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[Attributor][FIX] Handle recurrences (PHIs) in AAPointerInfo explicitly
PHI nodes are not pass through but change their value, we have to account for that to avoid missing stores. Follow up for D107798 to fix PR51249 for good. Differential Revision: https://reviews.llvm.org/D107808 (cherry picked from commit e7e3585cde0b08152a8cbf54029794d07c15963d)
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@ -1156,12 +1156,16 @@ struct AAPointerInfoFloating : public AAPointerInfoImpl {
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ChangeStatus Changed = ChangeStatus::UNCHANGED;
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Value &AssociatedValue = getAssociatedValue();
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struct OffsetInfo {
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int64_t Offset = 0;
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int64_t Offset = OffsetAndSize::Unknown;
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bool operator==(const OffsetInfo &OI) const {
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return Offset == OI.Offset;
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}
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};
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const DataLayout &DL = A.getDataLayout();
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DenseMap<Value *, OffsetInfo> OffsetInfoMap;
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OffsetInfoMap[&AssociatedValue] = {};
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OffsetInfoMap[&AssociatedValue] = OffsetInfo{0};
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auto HandlePassthroughUser = [&](Value *Usr, OffsetInfo &PtrOI,
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bool &Follow) {
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@ -1219,8 +1223,48 @@ struct AAPointerInfoFloating : public AAPointerInfoImpl {
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Follow = true;
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return true;
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}
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if (isa<CastInst>(Usr) || isa<PHINode>(Usr) || isa<SelectInst>(Usr))
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if (isa<CastInst>(Usr) || isa<SelectInst>(Usr))
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return HandlePassthroughUser(Usr, PtrOI, Follow);
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// For PHIs we need to take care of the recurrence explicitly as the value
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// might change while we iterate through a loop. For now, we give up if
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// the PHI is not invariant.
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if (isa<PHINode>(Usr)) {
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// Check if the PHI is invariant (so far).
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OffsetInfo &UsrOI = OffsetInfoMap[Usr];
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if (UsrOI == PtrOI)
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return true;
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// Check if the PHI operand has already an unknown offset as we can't
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// improve on that anymore.
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if (PtrOI.Offset == OffsetAndSize::Unknown) {
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UsrOI = PtrOI;
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Follow = true;
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return true;
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}
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// Check if the PHI operand is not dependent on the PHI itself.
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APInt Offset(DL.getIndexTypeSizeInBits(AssociatedValue.getType()), 0);
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if (&AssociatedValue == CurPtr->stripAndAccumulateConstantOffsets(
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DL, Offset, /* AllowNonInbounds */ true)) {
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if (Offset != PtrOI.Offset) {
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LLVM_DEBUG(dbgs()
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<< "[AAPointerInfo] PHI operand pointer offset mismatch "
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<< *CurPtr << " in " << *Usr << "\n");
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return false;
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}
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return HandlePassthroughUser(Usr, PtrOI, Follow);
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}
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// TODO: Approximate in case we know the direction of the recurrence.
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LLVM_DEBUG(dbgs() << "[AAPointerInfo] PHI operand is too complex "
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<< *CurPtr << " in " << *Usr << "\n");
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UsrOI = PtrOI;
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UsrOI.Offset = OffsetAndSize::Unknown;
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Follow = true;
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return true;
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}
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if (auto *LoadI = dyn_cast<LoadInst>(Usr))
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return handleAccess(A, *LoadI, *CurPtr, /* Content */ nullptr,
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AccessKind::AK_READ, PtrOI.Offset, Changed,
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@ -2890,7 +2890,9 @@ define i8 @phi_store() {
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; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2
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; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
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; IS__TUNIT_OPM: end:
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; IS__TUNIT_OPM-NEXT: ret i8 1
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; IS__TUNIT_OPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1
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; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1
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; IS__TUNIT_OPM-NEXT: ret i8 [[L]]
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;
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; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
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; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_store
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@ -2907,7 +2909,9 @@ define i8 @phi_store() {
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; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2
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; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
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; IS__TUNIT_NPM: end:
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; IS__TUNIT_NPM-NEXT: ret i8 1
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; IS__TUNIT_NPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1
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; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1
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; IS__TUNIT_NPM-NEXT: ret i8 [[L]]
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;
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; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
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; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_store
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@ -2924,7 +2928,9 @@ define i8 @phi_store() {
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; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2
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; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
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; IS__CGSCC_OPM: end:
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; IS__CGSCC_OPM-NEXT: ret i8 1
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; IS__CGSCC_OPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1
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; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1
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; IS__CGSCC_OPM-NEXT: ret i8 [[L]]
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;
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; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
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; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@phi_store
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@ -2941,7 +2947,9 @@ define i8 @phi_store() {
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; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2
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; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
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; IS__CGSCC_NPM: end:
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; IS__CGSCC_NPM-NEXT: ret i8 1
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; IS__CGSCC_NPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1
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; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1
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; IS__CGSCC_NPM-NEXT: ret i8 [[L]]
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;
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entry:
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%a = alloca i16
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@ -2963,9 +2971,9 @@ end:
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; FIXME: This function returns 1.
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define i8 @phi_no_store_1() {
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; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind writeonly
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; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind
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; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_no_store_1
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; IS__TUNIT_OPM-SAME: () #[[ATTR6]] {
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; IS__TUNIT_OPM-SAME: () #[[ATTR2]] {
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; IS__TUNIT_OPM-NEXT: entry:
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; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]]
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; IS__TUNIT_OPM: loop:
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@ -2976,11 +2984,14 @@ define i8 @phi_no_store_1() {
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; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
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; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
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; IS__TUNIT_OPM: end:
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; IS__TUNIT_OPM-NEXT: ret i8 0
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; IS__TUNIT_OPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
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; IS__TUNIT_OPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
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; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
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; IS__TUNIT_OPM-NEXT: ret i8 [[ADD]]
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;
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; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly
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; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
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; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_no_store_1
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; IS__TUNIT_NPM-SAME: () #[[ATTR4]] {
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; IS__TUNIT_NPM-SAME: () #[[ATTR2]] {
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; IS__TUNIT_NPM-NEXT: entry:
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; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]]
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; IS__TUNIT_NPM: loop:
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@ -2991,9 +3002,12 @@ define i8 @phi_no_store_1() {
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; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
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; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
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; IS__TUNIT_NPM: end:
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; IS__TUNIT_NPM-NEXT: ret i8 0
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; IS__TUNIT_NPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
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; IS__TUNIT_NPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
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; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
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; IS__TUNIT_NPM-NEXT: ret i8 [[ADD]]
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;
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; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
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; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind
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; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_1
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; IS__CGSCC_OPM-SAME: () #[[ATTR9:[0-9]+]] {
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; IS__CGSCC_OPM-NEXT: entry:
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@ -3006,11 +3020,14 @@ define i8 @phi_no_store_1() {
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; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
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; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
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; IS__CGSCC_OPM: end:
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; IS__CGSCC_OPM-NEXT: ret i8 0
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; IS__CGSCC_OPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
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; IS__CGSCC_OPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
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; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
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; IS__CGSCC_OPM-NEXT: ret i8 [[ADD]]
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;
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; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
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; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
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; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@phi_no_store_1
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; IS__CGSCC_NPM-SAME: () #[[ATTR4]] {
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; IS__CGSCC_NPM-SAME: () #[[ATTR5]] {
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; IS__CGSCC_NPM-NEXT: entry:
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; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]]
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; IS__CGSCC_NPM: loop:
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@ -3021,7 +3038,10 @@ define i8 @phi_no_store_1() {
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; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
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; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
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; IS__CGSCC_NPM: end:
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; IS__CGSCC_NPM-NEXT: ret i8 0
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; IS__CGSCC_NPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
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; IS__CGSCC_NPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
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; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
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; IS__CGSCC_NPM-NEXT: ret i8 [[ADD]]
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;
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entry:
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%b = bitcast i32* @a1 to i8*
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@ -3080,7 +3100,7 @@ define i8 @phi_no_store_2() {
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;
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; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind
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; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_2
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; IS__CGSCC_OPM-SAME: () #[[ATTR10:[0-9]+]] {
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; IS__CGSCC_OPM-SAME: () #[[ATTR9]] {
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; IS__CGSCC_OPM-NEXT: entry:
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; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
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; IS__CGSCC_OPM: loop:
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@ -3162,7 +3182,7 @@ define i8 @phi_no_store_3() {
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;
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; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
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; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_3
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; IS__CGSCC_OPM-SAME: () #[[ATTR9]] {
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; IS__CGSCC_OPM-SAME: () #[[ATTR10:[0-9]+]] {
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; IS__CGSCC_OPM-NEXT: entry:
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; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
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; IS__CGSCC_OPM: loop:
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@ -3274,8 +3294,8 @@ end:
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; IS__CGSCC_OPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn }
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; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind readonly willreturn }
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; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind readnone }
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; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind writeonly }
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; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind }
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; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind }
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; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind writeonly }
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; IS__CGSCC_OPM: attributes #[[ATTR11]] = { willreturn }
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; IS__CGSCC_OPM: attributes #[[ATTR12]] = { nounwind willreturn writeonly }
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; IS__CGSCC_OPM: attributes #[[ATTR13]] = { nounwind writeonly }
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