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R600/SI: Don't emit S_WQM_B64 instruction for compute shaders
llvm-svn: 190077
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@ -409,6 +409,7 @@ void SILowerControlFlowPass::IndirectDst(MachineInstr &MI) {
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bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) {
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TII = MF.getTarget().getInstrInfo();
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TRI = MF.getTarget().getRegisterInfo();
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SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
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bool HaveKill = false;
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bool NeedM0 = false;
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@ -508,7 +509,7 @@ bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) {
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AMDGPU::M0).addImm(0xffffffff);
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}
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if (NeedWQM) {
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if (NeedWQM && MFI->ShaderType != ShaderType::COMPUTE) {
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MachineBasicBlock &MBB = MF.front();
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BuildMI(MBB, MBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WQM_B64),
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AMDGPU::EXEC).addReg(AMDGPU::EXEC);
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@ -446,6 +446,7 @@ define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace(
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; R600-CHECK: @load_i8_local
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; R600-CHECK: LDS_UBYTE_READ_RET
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; SI-CHECK: @load_i8_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_U8
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define void @load_i8_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
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%1 = load i8 addrspace(3)* %in
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@ -458,6 +459,7 @@ define void @load_i8_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
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; R600-CHECK: LDS_UBYTE_READ_RET
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; R600-CHECK: ASHR
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; SI-CHECK: @load_i8_sext_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_I8
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define void @load_i8_sext_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
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entry:
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@ -471,6 +473,7 @@ entry:
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; R600-CHECK: LDS_UBYTE_READ_RET
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; R600-CHECK: LDS_UBYTE_READ_RET
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; SI-CHECK: @load_v2i8_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_U8
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; SI-CHECK: DS_READ_U8
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define void @load_v2i8_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) {
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@ -487,6 +490,7 @@ entry:
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; R600-CHECK-DAG: ASHR
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; R600-CHECK-DAG: ASHR
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; SI-CHECK: @load_v2i8_sext_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_I8
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; SI-CHECK: DS_READ_I8
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define void @load_v2i8_sext_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) {
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@ -503,6 +507,7 @@ entry:
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; R600-CHECK: LDS_UBYTE_READ_RET
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; R600-CHECK: LDS_UBYTE_READ_RET
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; SI-CHECK: @load_v4i8_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_U8
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; SI-CHECK: DS_READ_U8
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; SI-CHECK: DS_READ_U8
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@ -525,6 +530,7 @@ entry:
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; R600-CHECK-DAG: ASHR
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; R600-CHECK-DAG: ASHR
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; SI-CHECK: @load_v4i8_sext_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_I8
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; SI-CHECK: DS_READ_I8
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; SI-CHECK: DS_READ_I8
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@ -541,6 +547,7 @@ entry:
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; R600-CHECK: @load_i16_local
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; R600-CHECK: LDS_USHORT_READ_RET
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; SI-CHECK: @load_i16_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_U16
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define void @load_i16_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) {
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entry:
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@ -554,6 +561,7 @@ entry:
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; R600-CHECK: LDS_USHORT_READ_RET
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; R600-CHECK: ASHR
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; SI-CHECK: @load_i16_sext_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_I16
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define void @load_i16_sext_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) {
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entry:
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@ -567,6 +575,7 @@ entry:
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; R600-CHECK: LDS_USHORT_READ_RET
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; R600-CHECK: LDS_USHORT_READ_RET
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; SI-CHECK: @load_v2i16_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_U16
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; SI-CHECK: DS_READ_U16
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define void @load_v2i16_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) {
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@ -583,6 +592,7 @@ entry:
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; R600-CHECK-DAG: ASHR
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; R600-CHECK-DAG: ASHR
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; SI-CHECK: @load_v2i16_sext_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_I16
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; SI-CHECK: DS_READ_I16
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define void @load_v2i16_sext_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) {
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@ -599,6 +609,7 @@ entry:
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; R600-CHECK: LDS_USHORT_READ_RET
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; R600-CHECK: LDS_USHORT_READ_RET
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; SI-CHECK: @load_v4i16_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_U16
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; SI-CHECK: DS_READ_U16
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; SI-CHECK: DS_READ_U16
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@ -621,6 +632,7 @@ entry:
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; R600-CHECK-DAG: ASHR
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; R600-CHECK-DAG: ASHR
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; SI-CHECK: @load_v4i16_sext_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_I16
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; SI-CHECK: DS_READ_I16
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; SI-CHECK: DS_READ_I16
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@ -637,6 +649,7 @@ entry:
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; R600-CHECK: @load_i32_local
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; R600-CHECK: LDS_READ_RET
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; SI-CHECK: @load_i32_local
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; SI-CHECK-NOT: S_WQM_B64
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; SI-CHECK: DS_READ_B32
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define void @load_i32_local(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
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entry:
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@ -13,6 +13,7 @@
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; SI-CHECK-NEXT: .long 32768
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; EG-CHECK: LDS_WRITE
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; SI-CHECK_NOT: S_WQM_B64
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; SI-CHECK: DS_WRITE_B32 0
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; GROUP_BARRIER must be the last instruction in a clause
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