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LLVM enablement for some older PowerPC CPUs
llvm-svn: 174230
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@ -39,7 +39,12 @@ def DirectiveE500mc : SubtargetFeature<"", "DarwinDirective",
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"PPC::DIR_E500mc", "">;
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def DirectiveE5500 : SubtargetFeature<"", "DarwinDirective",
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"PPC::DIR_E5500", "">;
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def DirectivePwr3: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR3", "">;
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def DirectivePwr4: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR4", "">;
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def DirectivePwr5: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR5", "">;
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def DirectivePwr5x: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR5X", "">;
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def DirectivePwr6: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR6", "">;
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def DirectivePwr6x: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR6X", "">;
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def DirectivePwr7: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR7", "">;
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def Feature64Bit : SubtargetFeature<"64bit","Has64BitSupport", "true",
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@ -116,10 +121,25 @@ def : Processor<"a2q", PPCA2Itineraries, [DirectiveA2, FeatureBookE,
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FeatureSTFIWX, FeatureISEL,
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Feature64Bit /*, Feature64BitRegs */,
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FeatureQPX]>;
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def : Processor<"pwr3", G5Itineraries,
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[DirectivePwr3, FeatureAltivec, FeatureMFOCRF,
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FeatureSTFIWX, Feature64Bit]>;
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def : Processor<"pwr4", G5Itineraries,
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[DirectivePwr4, FeatureAltivec, FeatureMFOCRF,
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FeatureFSqrt, FeatureSTFIWX, Feature64Bit]>;
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def : Processor<"pwr5", G5Itineraries,
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[DirectivePwr5, FeatureAltivec, FeatureMFOCRF,
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FeatureFSqrt, FeatureSTFIWX, Feature64Bit]>;
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def : Processor<"pwr5x", G5Itineraries,
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[DirectivePwr5x, FeatureAltivec, FeatureMFOCRF,
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FeatureFSqrt, FeatureSTFIWX, Feature64Bit]>;
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def : Processor<"pwr6", G5Itineraries,
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[DirectivePwr6, FeatureAltivec,
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FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,
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Feature64Bit /*, Feature64BitRegs */]>;
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def : Processor<"pwr6x", G5Itineraries,
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[DirectivePwr5x, FeatureAltivec, FeatureMFOCRF,
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FeatureFSqrt, FeatureSTFIWX, Feature64Bit]>;
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def : Processor<"pwr7", G5Itineraries,
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[DirectivePwr7, FeatureAltivec,
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FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,
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@ -43,7 +43,12 @@ namespace PPC {
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DIR_A2,
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DIR_E500mc,
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DIR_E5500,
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DIR_PWR3,
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DIR_PWR4,
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DIR_PWR5,
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DIR_PWR5X,
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DIR_PWR6,
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DIR_PWR6X,
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DIR_PWR7,
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DIR_64
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};
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14
test/CodeGen/PowerPC/pwr3-6x.ll
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14
test/CodeGen/PowerPC/pwr3-6x.ll
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@ -0,0 +1,14 @@
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; Test basic support for some older processors.
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;RUN: llc < %s -march=ppc64 -mcpu=pwr3 | FileCheck %s
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;RUN: llc < %s -march=ppc64 -mcpu=pwr4 | FileCheck %s
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;RUN: llc < %s -march=ppc64 -mcpu=pwr5 | FileCheck %s
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;RUN: llc < %s -march=ppc64 -mcpu=pwr5x | FileCheck %s
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;RUN: llc < %s -march=ppc64 -mcpu=pwr6x | FileCheck %s
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define void @foo() {
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entry:
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ret void
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}
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; CHECK: @foo
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