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[RISCV] Add subtargets initialized with target feature

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expected failed test (RV32IF-ILP32F) will be fixed in a subsequent patch.

Reviewers: efriedma, lenary, asb

Reviewed By: efriedma, lenary

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70116
This commit is contained in:
Zakk Chen 2019-11-28 08:33:55 -08:00
parent 533a36d029
commit d404e14917
3 changed files with 46 additions and 6 deletions
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27
lib/Target/RISCV/RISCVTargetMachine.cpp
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@ -64,11 +64,34 @@ RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(TT, RM),
getEffectiveCodeModel(CM, CodeModel::Small), OL),
TLOF(std::make_unique<RISCVELFTargetObjectFile>()),
Subtarget(TT, CPU, FS, Options.MCOptions.getABIName(), *this) {
TLOF(std::make_unique<RISCVELFTargetObjectFile>()) {
initAsmInfo();
}
const RISCVSubtarget *
RISCVTargetMachine::getSubtargetImpl(const Function &F) const {
Attribute CPUAttr = F.getFnAttribute("target-cpu");
Attribute FSAttr = F.getFnAttribute("target-features");
std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
? CPUAttr.getValueAsString().str()
: TargetCPU;
std::string FS = !FSAttr.hasAttribute(Attribute::None)
? FSAttr.getValueAsString().str()
: TargetFS;
std::string Key = CPU + FS;
auto &I = SubtargetMap[Key];
if (!I) {
// This needs to be done before we create a new subtarget since any
// creation will depend on the TM and the code generation flags on the
// function that reside in TargetOptions.
resetTargetOptions(F);
I = std::make_unique<RISCVSubtarget>(TargetTriple, CPU, FS,
Options.MCOptions.getABIName(), *this);
}
return I.get();
}
TargetTransformInfo
RISCVTargetMachine::getTargetTransformInfo(const Function &F) {
return TargetTransformInfo(RISCVTTIImpl(this, F));

10
lib/Target/RISCV/RISCVTargetMachine.h
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@ -22,7 +22,7 @@
namespace llvm {
class RISCVTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
RISCVSubtarget Subtarget;
mutable StringMap<std::unique_ptr<RISCVSubtarget>> SubtargetMap;
public:
RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
@ -30,9 +30,11 @@ public:
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
const RISCVSubtarget *getSubtargetImpl(const Function &) const override {
return &Subtarget;
}
const RISCVSubtarget *getSubtargetImpl(const Function &F) const override;
// DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
// subtargets are per-function entities based on the target-specific
// attributes of each function.
const RISCVSubtarget *getSubtargetImpl() const = delete;
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;

15
test/CodeGen/RISCV/subtarget-features-std-ext.ll Normal file
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@ -0,0 +1,15 @@
; RUN: llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s
; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s
; RV32IF-ILP32F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
define float @foo(i32 %a) nounwind #0 {
; RV32IF-ILP32: # %bb.0:
; RV32IF-ILP32-NEXT: fcvt.s.w ft0, a0
%conv = sitofp i32 %a to float
ret float %conv
}
attributes #0 = { "target-features"="+f"}