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[PowerPC] Fix parest build failure in SPEC2017.

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The build failure was caused by an assertion in pre-legalization DAGCombine:

Combining: t6: ppcf128 = uint_to_fp t5
... into: t20: f32 = PPCISD::FCFIDUS t19

which is clearly wrong since ppcf128 are definitely different type with f32 and
we cannot change the node value type when do DAGCombine. The fix is don't
handle ppc_fp128 or i1 conversions in PPCTargetLowering::combineFPToIntToFP and
leave it to downstream to legalize it and expand it to small legal types.

Differential Revision: https://reviews.llvm.org/D41411

llvm-svn: 321276
This commit is contained in:
Tony Jiang 2017-12-21 15:42:50 +00:00
parent 4299abea6b
commit d407a2a892
2 changed files with 21 additions and 5 deletions
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11
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -11882,6 +11882,12 @@ SDValue PPCTargetLowering::combineFPToIntToFP(SDNode *N,
SDLoc dl(N);
SDValue Op(N, 0);
// Don't handle ppc_fp128 here or i1 conversions.
if (Op.getValueType() != MVT::f32 && Op.getValueType() != MVT::f64)
return SDValue();
if (Op.getOperand(0).getValueType() == MVT::i1)
return SDValue();
SDValue FirstOperand(Op.getOperand(0));
bool SubWordLoad = FirstOperand.getOpcode() == ISD::LOAD &&
(FirstOperand.getValueType() == MVT::i8 ||
@ -11910,11 +11916,6 @@ SDValue PPCTargetLowering::combineFPToIntToFP(SDNode *N,
return DAG.getNode(ConvOp, dl, DstDouble ? MVT::f64 : MVT::f32, Ld);
}
// Don't handle ppc_fp128 here or i1 conversions.
if (Op.getValueType() != MVT::f32 && Op.getValueType() != MVT::f64)
return SDValue();
if (Op.getOperand(0).getValueType() == MVT::i1)
return SDValue();
// For i32 intermediate values, unfortunately, the conversion functions
// leave the upper 32 bits of the value are undefined. Within the set of

15
test/CodeGen/PowerPC/uint-to-ppcfp128-crash.ll Normal file
View File

@ -0,0 +1,15 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr9 \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
; Ensure we don't crash by trying to convert directly from a subword load
; to a ppc_fp128 as we do for conversions to f32/f64.
define ppc_fp128 @test(i16* nocapture readonly %Ptr) {
entry:
%0 = load i16, i16* %Ptr, align 2
%conv = uitofp i16 %0 to ppc_fp128
ret ppc_fp128 %conv
; CHECK: lhz [[LD:[0-9]+]], 0(3)
; CHECK: mtvsrwa [[MV:[0-9]+]], [[LD]]
; CHECK: xscvsxddp [[CONV:[0-9]+]], [[MV]]
; CHECK: bl __gcc_qadd
}