RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 11:42:57 +01:00
Code Issues Projects Releases Wiki Activity

ps][microMIPS] Implement JRC instruction

Browse Source 
Differential Revision: http://reviews.llvm.org/D5045

llvm-svn: 219494
This commit is contained in:
Zoran Jovanovic 2014-10-10 13:31:18 +00:00
parent b5ed47d1e5
commit d436e06cb4
2 changed files with 16 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
lib/Target/Mips/MicroMipsInstrInfo.td
View File

@ -128,6 +128,16 @@ class JumpLinkRegSMM16<string opstr, RegisterOperand RO> :
let Defs = [RA]; let Defs = [RA];
} }
// 16-bit Jump Register Compact - No delay slot
class JumpRegCMM16<string opstr, RegisterOperand RO> :
MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
[], IIBranch, FrmR> {
let isTerminator = 1;
let isBarrier = 1;
let isBranch = 1;
let isIndirectBranch = 1;
}
// MicroMIPS Jump and Link (Call) - Short Delay Slot // MicroMIPS Jump and Link (Call) - Short Delay Slot
let isCall = 1, hasDelaySlot = 1, Defs = [RA] in { let isCall = 1, hasDelaySlot = 1, Defs = [RA] in {
class JumpLinkMM<string opstr, DAGOperand opnd> : class JumpLinkMM<string opstr, DAGOperand opnd> :
@ -151,6 +161,7 @@ def MFLO16_MM : MoveFromHILOMM<"mflo", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x12>;
def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>; def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>;
def JALR16_MM : JumpLinkRegMM16<"jalr", GPR32Opnd>, JALR_FM_MM16<0x0e>; def JALR16_MM : JumpLinkRegMM16<"jalr", GPR32Opnd>, JALR_FM_MM16<0x0e>;
def JALRS16_MM : JumpLinkRegSMM16<"jalrs16", GPR32Opnd>, JALR_FM_MM16<0x0f>; def JALRS16_MM : JumpLinkRegSMM16<"jalrs16", GPR32Opnd>, JALR_FM_MM16<0x0f>;
def JRC16_MM : JumpRegCMM16<"jrc", GPR32Opnd>, JALR_FM_MM16<0x0d>;
def JRADDIUSP : JumpRAddiuStackMM16, JRADDIUSP_FM_MM16<0x18>; def JRADDIUSP : JumpRAddiuStackMM16, JRADDIUSP_FM_MM16<0x18>;
class WaitMM<string opstr> : class WaitMM<string opstr> :

7
test/MC/Mips/micromips-16-bit-instructions.s
View File

@ -12,7 +12,8 @@
# CHECK-EL: mfhi $9 # encoding: [0x09,0x46] # CHECK-EL: mfhi $9 # encoding: [0x09,0x46]
# CHECK-EL: mflo $9 # encoding: [0x49,0x46] # CHECK-EL: mflo $9 # encoding: [0x49,0x46]
# CHECK-EL: move $25, $1 # encoding: [0x21,0x0f] # CHECK-EL: move $25, $1 # encoding: [0x21,0x0f]
# CHECK-EL: jalr $9 # encoding: [0xc9,0x45] # CHECK-EL: jrc $9 # encoding: [0xa9,0x45]
# CHECK-NEXT: jalr $9 # encoding: [0xc9,0x45]
# CHECK-EL: jraddiusp 20 # encoding: [0x05,0x47] # CHECK-EL: jraddiusp 20 # encoding: [0x05,0x47]
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EL: jalrs16 $9 # encoding: [0xe9,0x45] # CHECK-EL: jalrs16 $9 # encoding: [0xe9,0x45]
@ -23,7 +24,8 @@
# CHECK-EB: mfhi $9 # encoding: [0x46,0x09] # CHECK-EB: mfhi $9 # encoding: [0x46,0x09]
# CHECK-EB: mflo $9 # encoding: [0x46,0x49] # CHECK-EB: mflo $9 # encoding: [0x46,0x49]
# CHECK-EB: move $25, $1 # encoding: [0x0f,0x21] # CHECK-EB: move $25, $1 # encoding: [0x0f,0x21]
# CHECK-EB: jalr $9 # encoding: [0x45,0xc9] # CHECK-EB: jrc $9 # encoding: [0x45,0xa9]
# CHECK-NEXT: jalr $9 # encoding: [0x45,0xc9]
# CHECK-EB: jraddiusp 20 # encoding: [0x47,0x05] # CHECK-EB: jraddiusp 20 # encoding: [0x47,0x05]
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EB: jalrs16 $9 # encoding: [0x45,0xe9] # CHECK-EB: jalrs16 $9 # encoding: [0x45,0xe9]
@ -32,6 +34,7 @@
mfhi $9 mfhi $9
mflo $9 mflo $9
move $25, $1 move $25, $1
jrc $9
jalr $9 jalr $9
jraddiusp 20 jraddiusp 20
jalrs16 $9 jalrs16 $9