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[X86] Add avx512vl command lines to the 128/256-bit vector-lzcnt tests so we can see what compare instructions are being used in the lookup table code.

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I noticed the 512-bit lzcnts don't use the X86 specific lookup table code and instead use the EXPAND case in LegalizeDAG. I was toying around with fixing this and noticed it would require compare instructions that generate i1 masks and then converting from mask to vector. Then I noticed that we don't test which compares are used with avx512vl and no avx512cd.

llvm-svn: 303020
This commit is contained in:
Craig Topper 2017-05-14 19:38:11 +00:00
parent 7bf8b47c7e
commit d441caa7a7
2 changed files with 656 additions and 92 deletions
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326
test/CodeGen/X86/vector-lzcnt-128.ll
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@ -3,10 +3,12 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=X64 --check-prefix=SSE --check-prefix=SSE3
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=X64 --check-prefix=SSE --check-prefix=SSSE3
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64 --check-prefix=SSE --check-prefix=SSE41
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=AVX --check-prefix=AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 --check-prefix=AVX --check-prefix=AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512cd -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=AVX512 --check-prefix=AVX512VLCD
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=X64 --check-prefix=AVX512 --check-prefix=AVX512CD
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX --check-prefix=AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX --check-prefix=AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX --check-prefix=AVX512VL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefix=X64 --check-prefix=AVX512VLBWDQ
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512cd -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX512 --check-prefix=AVX512VLCD
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX512 --check-prefix=AVX512CD
;
; Just one 32-bit run to make sure we do reasonable things for i64 lzcnt.
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32-SSE
@ -194,6 +196,36 @@ define <2 x i64> @testv2i64(<2 x i64> %in) nounwind {
; AVX-NEXT: vpaddq %xmm0, %xmm1, %xmm0
; AVX-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv2i64:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %xmm2, %xmm3, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %xmm0, %xmm4
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm4, %xmm1
; AVX512VLBWDQ-NEXT: vpxor %xmm4, %xmm4, %xmm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm1, %xmm5
; AVX512VLBWDQ-NEXT: vpand %xmm5, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpshufb %xmm1, %xmm3, %xmm1
; AVX512VLBWDQ-NEXT: vpaddb %xmm1, %xmm2, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpand %xmm2, %xmm1, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddw %xmm2, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqw %xmm4, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vpsrld $16, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpand %xmm2, %xmm1, %xmm2
; AVX512VLBWDQ-NEXT: vpsrld $16, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddd %xmm2, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqd %xmm4, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpsrlq $32, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpand %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: vpsrlq $32, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddq %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv2i64:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vplzcntq %xmm0, %xmm0
@ -429,6 +461,36 @@ define <2 x i64> @testv2i64u(<2 x i64> %in) nounwind {
; AVX-NEXT: vpaddq %xmm0, %xmm1, %xmm0
; AVX-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv2i64u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %xmm2, %xmm3, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %xmm0, %xmm4
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm4, %xmm1
; AVX512VLBWDQ-NEXT: vpxor %xmm4, %xmm4, %xmm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm1, %xmm5
; AVX512VLBWDQ-NEXT: vpand %xmm5, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpshufb %xmm1, %xmm3, %xmm1
; AVX512VLBWDQ-NEXT: vpaddb %xmm1, %xmm2, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpand %xmm2, %xmm1, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddw %xmm2, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqw %xmm4, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vpsrld $16, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpand %xmm2, %xmm1, %xmm2
; AVX512VLBWDQ-NEXT: vpsrld $16, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddd %xmm2, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqd %xmm4, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpsrlq $32, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpand %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: vpsrlq $32, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddq %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv2i64u:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vplzcntq %xmm0, %xmm0
@ -651,6 +713,31 @@ define <4 x i32> @testv4i32(<4 x i32> %in) nounwind {
; AVX-NEXT: vpaddd %xmm0, %xmm1, %xmm0
; AVX-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv4i32:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %xmm2, %xmm3, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %xmm0, %xmm4
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm4, %xmm1
; AVX512VLBWDQ-NEXT: vpxor %xmm4, %xmm4, %xmm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm1, %xmm5
; AVX512VLBWDQ-NEXT: vpand %xmm5, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpshufb %xmm1, %xmm3, %xmm1
; AVX512VLBWDQ-NEXT: vpaddb %xmm1, %xmm2, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpand %xmm2, %xmm1, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddw %xmm2, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqw %xmm4, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpand %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: vpsrld $16, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddd %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv4i32:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vplzcntd %xmm0, %xmm0
@ -867,6 +954,31 @@ define <4 x i32> @testv4i32u(<4 x i32> %in) nounwind {
; AVX-NEXT: vpaddd %xmm0, %xmm1, %xmm0
; AVX-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv4i32u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %xmm2, %xmm3, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %xmm0, %xmm4
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm4, %xmm1
; AVX512VLBWDQ-NEXT: vpxor %xmm4, %xmm4, %xmm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm1, %xmm5
; AVX512VLBWDQ-NEXT: vpand %xmm5, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpshufb %xmm1, %xmm3, %xmm1
; AVX512VLBWDQ-NEXT: vpaddb %xmm1, %xmm2, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpand %xmm2, %xmm1, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddw %xmm2, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqw %xmm4, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpand %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: vpsrld $16, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddd %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv4i32u:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vplzcntd %xmm0, %xmm0
@ -1054,6 +1166,26 @@ define <8 x i16> @testv8i16(<8 x i16> %in) nounwind {
; AVX-NEXT: vpaddw %xmm0, %xmm1, %xmm0
; AVX-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv8i16:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %xmm2, %xmm3, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %xmm0, %xmm4
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm4, %xmm1
; AVX512VLBWDQ-NEXT: vpxor %xmm4, %xmm4, %xmm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm1, %xmm5
; AVX512VLBWDQ-NEXT: vpand %xmm5, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpshufb %xmm1, %xmm3, %xmm1
; AVX512VLBWDQ-NEXT: vpaddb %xmm1, %xmm2, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpand %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddw %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv8i16:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
@ -1238,6 +1370,26 @@ define <8 x i16> @testv8i16u(<8 x i16> %in) nounwind {
; AVX-NEXT: vpaddw %xmm0, %xmm1, %xmm0
; AVX-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv8i16u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %xmm2, %xmm3, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %xmm0, %xmm4
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm4, %xmm1
; AVX512VLBWDQ-NEXT: vpxor %xmm4, %xmm4, %xmm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm1, %xmm5
; AVX512VLBWDQ-NEXT: vpand %xmm5, %xmm2, %xmm2
; AVX512VLBWDQ-NEXT: vpshufb %xmm1, %xmm3, %xmm1
; AVX512VLBWDQ-NEXT: vpaddb %xmm1, %xmm2, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm4, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpand %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: vpsrlw $8, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpaddw %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv8i16u:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
@ -1399,6 +1551,21 @@ define <16 x i8> @testv16i8(<16 x i8> %in) nounwind {
; AVX-NEXT: vpaddb %xmm0, %xmm1, %xmm0
; AVX-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv16i8:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %xmm2, %xmm3, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm1
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm2, %xmm1
; AVX512VLBWDQ-NEXT: vpshufb %xmm0, %xmm3, %xmm0
; AVX512VLBWDQ-NEXT: vpaddb %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512-LABEL: testv16i8:
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
@ -1546,6 +1713,21 @@ define <16 x i8> @testv16i8u(<16 x i8> %in) nounwind {
; AVX-NEXT: vpaddb %xmm0, %xmm1, %xmm0
; AVX-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv16i8u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %xmm2, %xmm3, %xmm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512VLBWDQ-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm1
; AVX512VLBWDQ-NEXT: vpand %xmm1, %xmm2, %xmm1
; AVX512VLBWDQ-NEXT: vpshufb %xmm0, %xmm3, %xmm0
; AVX512VLBWDQ-NEXT: vpaddb %xmm0, %xmm1, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512-LABEL: testv16i8u:
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
@ -1582,17 +1764,17 @@ define <2 x i64> @foldv2i64() nounwind {
; SSE-NEXT: movq %rax, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: foldv2i64:
; AVX: # BB#0:
; AVX-NEXT: movl $55, %eax
; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: retq
; NOBW-LABEL: foldv2i64:
; NOBW: # BB#0:
; NOBW-NEXT: movl $55, %eax
; NOBW-NEXT: vmovq %rax, %xmm0
; NOBW-NEXT: retq
;
; AVX512-LABEL: foldv2i64:
; AVX512: # BB#0:
; AVX512-NEXT: movl $55, %eax
; AVX512-NEXT: vmovq %rax, %xmm0
; AVX512-NEXT: retq
; AVX512VLBWDQ-LABEL: foldv2i64:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: movl $55, %eax
; AVX512VLBWDQ-NEXT: vmovq %rax, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; X32-SSE-LABEL: foldv2i64:
; X32-SSE: # BB#0:
@ -1610,17 +1792,17 @@ define <2 x i64> @foldv2i64u() nounwind {
; SSE-NEXT: movq %rax, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: foldv2i64u:
; AVX: # BB#0:
; AVX-NEXT: movl $55, %eax
; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: retq
; NOBW-LABEL: foldv2i64u:
; NOBW: # BB#0:
; NOBW-NEXT: movl $55, %eax
; NOBW-NEXT: vmovq %rax, %xmm0
; NOBW-NEXT: retq
;
; AVX512-LABEL: foldv2i64u:
; AVX512: # BB#0:
; AVX512-NEXT: movl $55, %eax
; AVX512-NEXT: vmovq %rax, %xmm0
; AVX512-NEXT: retq
; AVX512VLBWDQ-LABEL: foldv2i64u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: movl $55, %eax
; AVX512VLBWDQ-NEXT: vmovq %rax, %xmm0
; AVX512VLBWDQ-NEXT: retq
;
; X32-SSE-LABEL: foldv2i64u:
; X32-SSE: # BB#0:
@ -1637,15 +1819,15 @@ define <4 x i32> @foldv4i32() nounwind {
; SSE-NEXT: movaps {{.*#+}} xmm0 = [23,0,32,24]
; SSE-NEXT: retq
;
; AVX-LABEL: foldv4i32:
; AVX: # BB#0:
; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [23,0,32,24]
; AVX-NEXT: retq
; NOBW-LABEL: foldv4i32:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} xmm0 = [23,0,32,24]
; NOBW-NEXT: retq
;
; AVX512-LABEL: foldv4i32:
; AVX512: # BB#0:
; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [23,0,32,24]
; AVX512-NEXT: retq
; AVX512VLBWDQ-LABEL: foldv4i32:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovaps {{.*#+}} xmm0 = [23,0,32,24]
; AVX512VLBWDQ-NEXT: retq
;
; X32-SSE-LABEL: foldv4i32:
; X32-SSE: # BB#0:
@ -1661,15 +1843,15 @@ define <4 x i32> @foldv4i32u() nounwind {
; SSE-NEXT: movaps {{.*#+}} xmm0 = [23,0,32,24]
; SSE-NEXT: retq
;
; AVX-LABEL: foldv4i32u:
; AVX: # BB#0:
; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [23,0,32,24]
; AVX-NEXT: retq
; NOBW-LABEL: foldv4i32u:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} xmm0 = [23,0,32,24]
; NOBW-NEXT: retq
;
; AVX512-LABEL: foldv4i32u:
; AVX512: # BB#0:
; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [23,0,32,24]
; AVX512-NEXT: retq
; AVX512VLBWDQ-LABEL: foldv4i32u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovaps {{.*#+}} xmm0 = [23,0,32,24]
; AVX512VLBWDQ-NEXT: retq
;
; X32-SSE-LABEL: foldv4i32u:
; X32-SSE: # BB#0:
@ -1685,15 +1867,15 @@ define <8 x i16> @foldv8i16() nounwind {
; SSE-NEXT: movaps {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; SSE-NEXT: retq
;
; AVX-LABEL: foldv8i16:
; AVX: # BB#0:
; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; AVX-NEXT: retq
; NOBW-LABEL: foldv8i16:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; NOBW-NEXT: retq
;
; AVX512-LABEL: foldv8i16:
; AVX512: # BB#0:
; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; AVX512-NEXT: retq
; AVX512VLBWDQ-LABEL: foldv8i16:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; AVX512VLBWDQ-NEXT: retq
;
; X32-SSE-LABEL: foldv8i16:
; X32-SSE: # BB#0:
@ -1709,15 +1891,15 @@ define <8 x i16> @foldv8i16u() nounwind {
; SSE-NEXT: movaps {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; SSE-NEXT: retq
;
; AVX-LABEL: foldv8i16u:
; AVX: # BB#0:
; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; AVX-NEXT: retq
; NOBW-LABEL: foldv8i16u:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; NOBW-NEXT: retq
;
; AVX512-LABEL: foldv8i16u:
; AVX512: # BB#0:
; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; AVX512-NEXT: retq
; AVX512VLBWDQ-LABEL: foldv8i16u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm0 = [7,0,16,8,16,13,11,9]
; AVX512VLBWDQ-NEXT: retq
;
; X32-SSE-LABEL: foldv8i16u:
; X32-SSE: # BB#0:
@ -1733,15 +1915,15 @@ define <16 x i8> @foldv16i8() nounwind {
; SSE-NEXT: movaps {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; SSE-NEXT: retq
;
; AVX-LABEL: foldv16i8:
; AVX: # BB#0:
; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; AVX-NEXT: retq
; NOBW-LABEL: foldv16i8:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; NOBW-NEXT: retq
;
; AVX512-LABEL: foldv16i8:
; AVX512: # BB#0:
; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; AVX512-NEXT: retq
; AVX512VLBWDQ-LABEL: foldv16i8:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; AVX512VLBWDQ-NEXT: retq
;
; X32-SSE-LABEL: foldv16i8:
; X32-SSE: # BB#0:
@ -1757,15 +1939,15 @@ define <16 x i8> @foldv16i8u() nounwind {
; SSE-NEXT: movaps {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; SSE-NEXT: retq
;
; AVX-LABEL: foldv16i8u:
; AVX: # BB#0:
; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; AVX-NEXT: retq
; NOBW-LABEL: foldv16i8u:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; NOBW-NEXT: retq
;
; AVX512-LABEL: foldv16i8u:
; AVX512: # BB#0:
; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; AVX512-NEXT: retq
; AVX512VLBWDQ-LABEL: foldv16i8u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} xmm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2]
; AVX512VLBWDQ-NEXT: retq
;
; X32-SSE-LABEL: foldv16i8u:
; X32-SSE: # BB#0:

422
test/CodeGen/X86/vector-lzcnt-256.ll
View File

@ -1,8 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=AVX --check-prefix=AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 --check-prefix=AVX --check-prefix=AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512cd -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=AVX512 --check-prefix=AVX512VLCD
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=X64 --check-prefix=AVX512 --check-prefix=AVX512CD
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX --check-prefix=AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX --check-prefix=AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX512VL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefix=X64 --check-prefix=AVX512VLBWDQ
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512cd -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX512 --check-prefix=AVX512VLCD
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512cd | FileCheck %s --check-prefix=X64 --check-prefix=NOBW --check-prefix=AVX512 --check-prefix=AVX512CD
;
; Just one 32-bit run to make sure we do reasonable things for i64 lzcnt.
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32-AVX
@ -93,6 +95,66 @@ define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
; AVX2-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: testv4i64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VL-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VL-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VL-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VL-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm2
; AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2
; AVX512VL-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; AVX512VL-NEXT: vpcmpeqw %ymm4, %ymm0, %ymm2
; AVX512VL-NEXT: vpsrld $16, %ymm2, %ymm2
; AVX512VL-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VL-NEXT: vpsrld $16, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddd %ymm2, %ymm1, %ymm1
; AVX512VL-NEXT: vpcmpeqd %ymm4, %ymm0, %ymm0
; AVX512VL-NEXT: vpsrlq $32, %ymm0, %ymm0
; AVX512VL-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: vpsrlq $32, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv4i64:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VLBWDQ-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VLBWDQ-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VLBWDQ-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqw %ymm4, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vpsrld $16, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VLBWDQ-NEXT: vpsrld $16, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddd %ymm2, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqd %ymm4, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpsrlq $32, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: vpsrlq $32, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv4i64:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vplzcntq %ymm0, %ymm0
@ -225,6 +287,66 @@ define <4 x i64> @testv4i64u(<4 x i64> %in) nounwind {
; AVX2-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: testv4i64u:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VL-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VL-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VL-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VL-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm2
; AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2
; AVX512VL-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; AVX512VL-NEXT: vpcmpeqw %ymm4, %ymm0, %ymm2
; AVX512VL-NEXT: vpsrld $16, %ymm2, %ymm2
; AVX512VL-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VL-NEXT: vpsrld $16, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddd %ymm2, %ymm1, %ymm1
; AVX512VL-NEXT: vpcmpeqd %ymm4, %ymm0, %ymm0
; AVX512VL-NEXT: vpsrlq $32, %ymm0, %ymm0
; AVX512VL-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: vpsrlq $32, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv4i64u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VLBWDQ-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VLBWDQ-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VLBWDQ-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqw %ymm4, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vpsrld $16, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VLBWDQ-NEXT: vpsrld $16, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddd %ymm2, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqd %ymm4, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpsrlq $32, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: vpsrlq $32, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv4i64u:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vplzcntq %ymm0, %ymm0
@ -342,6 +464,56 @@ define <8 x i32> @testv8i32(<8 x i32> %in) nounwind {
; AVX2-NEXT: vpaddd %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: testv8i32:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VL-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VL-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VL-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VL-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm2
; AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2
; AVX512VL-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; AVX512VL-NEXT: vpcmpeqw %ymm4, %ymm0, %ymm0
; AVX512VL-NEXT: vpsrld $16, %ymm0, %ymm0
; AVX512VL-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: vpsrld $16, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddd %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv8i32:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VLBWDQ-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VLBWDQ-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VLBWDQ-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqw %ymm4, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpsrld $16, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: vpsrld $16, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddd %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv8i32:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vplzcntd %ymm0, %ymm0
@ -454,6 +626,56 @@ define <8 x i32> @testv8i32u(<8 x i32> %in) nounwind {
; AVX2-NEXT: vpaddd %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: testv8i32u:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VL-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VL-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VL-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VL-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm2
; AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2
; AVX512VL-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; AVX512VL-NEXT: vpcmpeqw %ymm4, %ymm0, %ymm0
; AVX512VL-NEXT: vpsrld $16, %ymm0, %ymm0
; AVX512VL-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: vpsrld $16, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddd %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv8i32u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VLBWDQ-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VLBWDQ-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VLBWDQ-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpand %ymm2, %ymm1, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqw %ymm4, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpsrld $16, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: vpsrld $16, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddd %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512VLCD-LABEL: testv8i32u:
; AVX512VLCD: # BB#0:
; AVX512VLCD-NEXT: vplzcntd %ymm0, %ymm0
@ -551,6 +773,46 @@ define <16 x i16> @testv16i16(<16 x i16> %in) nounwind {
; AVX2-NEXT: vpaddw %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: testv16i16:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VL-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VL-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VL-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VL-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm0
; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0
; AVX512VL-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddw %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv16i16:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VLBWDQ-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VLBWDQ-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VLBWDQ-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddw %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512-LABEL: testv16i16:
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
@ -638,6 +900,46 @@ define <16 x i16> @testv16i16u(<16 x i16> %in) nounwind {
; AVX2-NEXT: vpaddw %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: testv16i16u:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VL-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VL-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VL-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VL-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm0
; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0
; AVX512VL-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VL-NEXT: vpaddw %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv16i16u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %ymm0, %ymm4
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm4, %ymm1
; AVX512VLBWDQ-NEXT: vpxor %ymm4, %ymm4, %ymm4
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm5
; AVX512VLBWDQ-NEXT: vpand %ymm5, %ymm2, %ymm2
; AVX512VLBWDQ-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; AVX512VLBWDQ-NEXT: vpaddb %ymm1, %ymm2, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm4, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpand %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: vpsrlw $8, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpaddw %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512-LABEL: testv16i16u:
; AVX512: # BB#0:
; AVX512-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
@ -710,6 +1012,36 @@ define <32 x i8> @testv32i8(<32 x i8> %in) nounwind {
; AVX2-NEXT: vpaddb %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: testv32i8:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm0
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512VL-NEXT: vpxor %ymm1, %ymm1, %ymm1
; AVX512VL-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm1
; AVX512VL-NEXT: vpand %ymm1, %ymm2, %ymm1
; AVX512VL-NEXT: vpshufb %ymm0, %ymm3, %ymm0
; AVX512VL-NEXT: vpaddb %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv32i8:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpxor %ymm1, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm1
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm2, %ymm1
; AVX512VLBWDQ-NEXT: vpshufb %ymm0, %ymm3, %ymm0
; AVX512VLBWDQ-NEXT: vpaddb %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512-LABEL: testv32i8:
; AVX512: # BB#0:
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
@ -784,6 +1116,36 @@ define <32 x i8> @testv32i8u(<32 x i8> %in) nounwind {
; AVX2-NEXT: vpaddb %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: testv32i8u:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm0
; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512VL-NEXT: vpxor %ymm1, %ymm1, %ymm1
; AVX512VL-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm1
; AVX512VL-NEXT: vpand %ymm1, %ymm2, %ymm1
; AVX512VL-NEXT: vpshufb %ymm0, %ymm3, %ymm0
; AVX512VL-NEXT: vpaddb %ymm0, %ymm1, %ymm0
; AVX512VL-NEXT: retq
;
; AVX512VLBWDQ-LABEL: testv32i8u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm2
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm3 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
; AVX512VLBWDQ-NEXT: vpshufb %ymm2, %ymm3, %ymm2
; AVX512VLBWDQ-NEXT: vpsrlw $4, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512VLBWDQ-NEXT: vpxor %ymm1, %ymm1, %ymm1
; AVX512VLBWDQ-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm1
; AVX512VLBWDQ-NEXT: vpand %ymm1, %ymm2, %ymm1
; AVX512VLBWDQ-NEXT: vpshufb %ymm0, %ymm3, %ymm0
; AVX512VLBWDQ-NEXT: vpaddb %ymm0, %ymm1, %ymm0
; AVX512VLBWDQ-NEXT: retq
;
; AVX512-LABEL: testv32i8u:
; AVX512: # BB#0:
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
@ -874,10 +1236,15 @@ define <8 x i32> @foldv8i32u() nounwind {
}
define <16 x i16> @foldv16i16() nounwind {
; X64-LABEL: foldv16i16:
; X64: # BB#0:
; X64-NEXT: vmovaps {{.*#+}} ymm0 = [7,0,16,8,16,13,11,9,0,8,15,14,13,12,11,10]
; X64-NEXT: retq
; NOBW-LABEL: foldv16i16:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} ymm0 = [7,0,16,8,16,13,11,9,0,8,15,14,13,12,11,10]
; NOBW-NEXT: retq
;
; AVX512VLBWDQ-LABEL: foldv16i16:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm0 = [7,0,16,8,16,13,11,9,0,8,15,14,13,12,11,10]
; AVX512VLBWDQ-NEXT: retq
;
; X32-AVX-LABEL: foldv16i16:
; X32-AVX: # BB#0:
@ -888,10 +1255,15 @@ define <16 x i16> @foldv16i16() nounwind {
}
define <16 x i16> @foldv16i16u() nounwind {
; X64-LABEL: foldv16i16u:
; X64: # BB#0:
; X64-NEXT: vmovaps {{.*#+}} ymm0 = [7,0,16,8,16,13,11,9,0,8,15,14,13,12,11,10]
; X64-NEXT: retq
; NOBW-LABEL: foldv16i16u:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} ymm0 = [7,0,16,8,16,13,11,9,0,8,15,14,13,12,11,10]
; NOBW-NEXT: retq
;
; AVX512VLBWDQ-LABEL: foldv16i16u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm0 = [7,0,16,8,16,13,11,9,0,8,15,14,13,12,11,10]
; AVX512VLBWDQ-NEXT: retq
;
; X32-AVX-LABEL: foldv16i16u:
; X32-AVX: # BB#0:
@ -902,10 +1274,15 @@ define <16 x i16> @foldv16i16u() nounwind {
}
define <32 x i8> @foldv32i8() nounwind {
; X64-LABEL: foldv32i8:
; X64: # BB#0:
; X64-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2,1,0,8,8,0,0,0,0,0,0,0,0,6,5,5,1]
; X64-NEXT: retq
; NOBW-LABEL: foldv32i8:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2,1,0,8,8,0,0,0,0,0,0,0,0,6,5,5,1]
; NOBW-NEXT: retq
;
; AVX512VLBWDQ-LABEL: foldv32i8:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2,1,0,8,8,0,0,0,0,0,0,0,0,6,5,5,1]
; AVX512VLBWDQ-NEXT: retq
;
; X32-AVX-LABEL: foldv32i8:
; X32-AVX: # BB#0:
@ -916,10 +1293,15 @@ define <32 x i8> @foldv32i8() nounwind {
}
define <32 x i8> @foldv32i8u() nounwind {
; X64-LABEL: foldv32i8u:
; X64: # BB#0:
; X64-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2,1,0,8,8,0,0,0,0,0,0,0,0,6,5,5,1]
; X64-NEXT: retq
; NOBW-LABEL: foldv32i8u:
; NOBW: # BB#0:
; NOBW-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2,1,0,8,8,0,0,0,0,0,0,0,0,6,5,5,1]
; NOBW-NEXT: retq
;
; AVX512VLBWDQ-LABEL: foldv32i8u:
; AVX512VLBWDQ: # BB#0:
; AVX512VLBWDQ-NEXT: vmovdqu {{.*#+}} ymm0 = [8,0,8,0,8,5,3,1,0,0,7,6,5,4,3,2,1,0,8,8,0,0,0,0,0,0,0,0,6,5,5,1]
; AVX512VLBWDQ-NEXT: retq
;
; X32-AVX-LABEL: foldv32i8u:
; X32-AVX: # BB#0: