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Strip trailing whitespace
llvm-svn: 287492
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@ -3316,11 +3316,11 @@ multiclass avx512_move_scalar_lowering<string InstrStr, SDNode OpNode,
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PatLeaf ZeroFP, X86VectorVTInfo _> {
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def : Pat<(_.VT (OpNode _.RC:$src0,
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(_.VT (scalar_to_vector
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(_.VT (scalar_to_vector
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(_.EltVT (X86selects (i1 (trunc GR32:$mask)),
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(_.EltVT _.FRC:$src1),
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(_.EltVT _.FRC:$src2))))))),
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(COPY_TO_REGCLASS (!cast<Instruction>(InstrStr#rrk)
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(COPY_TO_REGCLASS (!cast<Instruction>(InstrStr#rrk)
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(COPY_TO_REGCLASS _.FRC:$src2, _.RC),
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(COPY_TO_REGCLASS GR32:$mask, VK1WM),
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(_.VT _.RC:$src0),
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@ -3328,11 +3328,11 @@ def : Pat<(_.VT (OpNode _.RC:$src0,
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_.RC)>;
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def : Pat<(_.VT (OpNode _.RC:$src0,
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(_.VT (scalar_to_vector
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(_.VT (scalar_to_vector
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(_.EltVT (X86selects (i1 (trunc GR32:$mask)),
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(_.EltVT _.FRC:$src1),
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(_.EltVT ZeroFP))))))),
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(COPY_TO_REGCLASS (!cast<Instruction>(InstrStr#rrkz)
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(COPY_TO_REGCLASS (!cast<Instruction>(InstrStr#rrkz)
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(COPY_TO_REGCLASS GR32:$mask, VK1WM),
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(_.VT _.RC:$src0),
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(COPY_TO_REGCLASS _.FRC:$src1, _.RC)),
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@ -3344,14 +3344,14 @@ multiclass avx512_store_scalar_lowering<string InstrStr, AVX512VLVectorVTInfo _,
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dag Mask, RegisterClass MaskRC> {
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def : Pat<(masked_store addr:$dst, Mask,
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(_.info512.VT (insert_subvector undef,
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(_.info512.VT (insert_subvector undef,
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(_.info256.VT (insert_subvector undef,
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(_.info128.VT _.info128.RC:$src),
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(i64 0))),
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(i64 0)))),
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(!cast<Instruction>(InstrStr#mrk) addr:$dst,
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(!cast<Instruction>(InstrStr#mrk) addr:$dst,
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(i1 (COPY_TO_REGCLASS MaskRC:$mask, VK1WM)),
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(COPY_TO_REGCLASS _.info128.RC:$src, _.info128.FRC))>;
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(COPY_TO_REGCLASS _.info128.RC:$src, _.info128.FRC))>;
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}
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@ -3360,10 +3360,10 @@ multiclass avx512_load_scalar_lowering<string InstrStr, AVX512VLVectorVTInfo _,
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def : Pat<(_.info128.VT (extract_subvector
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(_.info512.VT (masked_load addr:$srcAddr, Mask,
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(_.info512.VT (bitconvert
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(_.info512.VT (bitconvert
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(v16i32 immAllZerosV))))),
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(i64 0))),
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(!cast<Instruction>(InstrStr#rmkz)
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(!cast<Instruction>(InstrStr#rmkz)
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(i1 (COPY_TO_REGCLASS MaskRC:$mask, VK1WM)),
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addr:$srcAddr)>;
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