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[X86] Regenerate i64 shift legalization tests
llvm-svn: 276691
This commit is contained in:
Simon Pilgrim
parent
885c9b468c
commit
d5c0b55d42
@ -1,72 +1,200 @@
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; RUN: llc -mcpu=generic -mtriple=i686-unknown-unknown < %s | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
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define i64 @test1(i32 %xx, i32 %test) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: # BB#0:
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: andb $7, %cl
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; CHECK-NEXT: movl %edx, %eax
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; CHECK-NEXT: shll %cl, %eax
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; CHECK-NEXT: shrl %edx
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; CHECK-NEXT: xorb $31, %cl
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; CHECK-NEXT: shrl %cl, %edx
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; CHECK-NEXT: retl
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%conv = zext i32 %xx to i64
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%and = and i32 %test, 7
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%sh_prom = zext i32 %and to i64
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%shl = shl i64 %conv, %sh_prom
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ret i64 %shl
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; CHECK-LABEL: test1:
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; CHECK: shll %cl, %eax
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; CHECK: shrl %edx
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; CHECK: xorb $31
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; CHECK: shrl %cl, %edx
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}
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define i64 @test2(i64 %xx, i32 %test) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %ch
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; CHECK-NEXT: andb $7, %ch
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; CHECK-NEXT: movb %ch, %cl
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; CHECK-NEXT: shll %cl, %esi
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shrl %edx
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; CHECK-NEXT: xorb $31, %cl
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; CHECK-NEXT: shrl %cl, %edx
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; CHECK-NEXT: orl %esi, %edx
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; CHECK-NEXT: movb %ch, %cl
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; CHECK-NEXT: shll %cl, %eax
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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%and = and i32 %test, 7
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%sh_prom = zext i32 %and to i64
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%shl = shl i64 %xx, %sh_prom
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ret i64 %shl
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; CHECK-LABEL: test2:
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; CHECK: shll %cl, %esi
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; CHECK: shrl %edx
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; CHECK: xorb $31
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; CHECK: shrl %cl, %edx
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; CHECK: orl %esi, %edx
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; CHECK: shll %cl, %eax
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}
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define i64 @test3(i64 %xx, i32 %test) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %ch
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; CHECK-NEXT: andb $7, %ch
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; CHECK-NEXT: movb %ch, %cl
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; CHECK-NEXT: shrl %cl, %esi
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; CHECK-NEXT: leal (%edx,%edx), %eax
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; CHECK-NEXT: xorb $31, %cl
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; CHECK-NEXT: shll %cl, %eax
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; CHECK-NEXT: orl %esi, %eax
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; CHECK-NEXT: movb %ch, %cl
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; CHECK-NEXT: shrl %cl, %edx
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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%and = and i32 %test, 7
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%sh_prom = zext i32 %and to i64
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%shr = lshr i64 %xx, %sh_prom
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ret i64 %shr
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; CHECK-LABEL: test3:
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; CHECK: shrl %cl, %esi
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; CHECK: leal (%edx,%edx), %eax
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; CHECK: xorb $31, %cl
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; CHECK: shll %cl, %eax
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; CHECK: orl %esi, %eax
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; CHECK: shrl %cl, %edx
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}
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define i64 @test4(i64 %xx, i32 %test) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %ch
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; CHECK-NEXT: andb $7, %ch
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; CHECK-NEXT: movb %ch, %cl
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; CHECK-NEXT: shrl %cl, %esi
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; CHECK-NEXT: leal (%edx,%edx), %eax
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; CHECK-NEXT: xorb $31, %cl
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; CHECK-NEXT: shll %cl, %eax
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; CHECK-NEXT: orl %esi, %eax
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; CHECK-NEXT: movb %ch, %cl
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; CHECK-NEXT: sarl %cl, %edx
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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%and = and i32 %test, 7
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%sh_prom = zext i32 %and to i64
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%shr = ashr i64 %xx, %sh_prom
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ret i64 %shr
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; CHECK-LABEL: test4:
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; CHECK: shrl %cl, %esi
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; CHECK: leal (%edx,%edx), %eax
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; CHECK: xorb $31, %cl
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; CHECK: shll %cl, %eax
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; CHECK: orl %esi, %eax
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; CHECK: sarl %cl, %edx
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}
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; PR14668
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define <2 x i64> @test5(<2 x i64> %A, <2 x i64> %B) {
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; CHECK-LABEL: test5:
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: .Ltmp0:
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: .Ltmp1:
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; CHECK-NEXT: .cfi_def_cfa_offset 12
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: .Ltmp2:
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: .Ltmp3:
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; CHECK-NEXT: .cfi_def_cfa_offset 20
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; CHECK-NEXT: .Ltmp4:
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; CHECK-NEXT: .cfi_offset %esi, -20
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; CHECK-NEXT: .Ltmp5:
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; CHECK-NEXT: .cfi_offset %edi, -16
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; CHECK-NEXT: .Ltmp6:
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; CHECK-NEXT: .cfi_offset %ebx, -12
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; CHECK-NEXT: .Ltmp7:
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; CHECK-NEXT: .cfi_offset %ebp, -8
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: movl %ebx, %edi
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; CHECK-NEXT: shll %cl, %edi
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; CHECK-NEXT: shldl %cl, %ebx, %esi
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; CHECK-NEXT: testb $32, %cl
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; CHECK-NEXT: je .LBB4_2
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; CHECK-NEXT: # BB#1:
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; CHECK-NEXT: movl %edi, %esi
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: .LBB4_2:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movl %edx, %ebx
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
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; CHECK-NEXT: shll %cl, %ebx
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; CHECK-NEXT: shldl %cl, %edx, %ebp
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; CHECK-NEXT: testb $32, %cl
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; CHECK-NEXT: je .LBB4_4
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; CHECK-NEXT: # BB#3:
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; CHECK-NEXT: movl %ebx, %ebp
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; CHECK-NEXT: xorl %ebx, %ebx
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; CHECK-NEXT: .LBB4_4:
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; CHECK-NEXT: movl %ebp, 12(%eax)
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; CHECK-NEXT: movl %ebx, 8(%eax)
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; CHECK-NEXT: movl %esi, 4(%eax)
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; CHECK-NEXT: movl %edi, (%eax)
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: popl %ebx
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: retl $4
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%shl = shl <2 x i64> %A, %B
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ret <2 x i64> %shl
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; CHECK: test5
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; CHECK: shl
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; CHECK: shldl
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; CHECK: shl
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; CHECK: shldl
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}
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; PR16108
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define i32 @test6() {
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; CHECK-LABEL: test6:
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: .Ltmp8:
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: .Ltmp9:
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; CHECK-NEXT: .cfi_offset %ebp, -8
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK-NEXT: .Ltmp10:
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; CHECK-NEXT: .cfi_def_cfa_register %ebp
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; CHECK-NEXT: andl $-8, %esp
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; CHECK-NEXT: subl $16, %esp
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; CHECK-NEXT: movl $1, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl $1, (%esp)
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: shldl $32, %eax, %ecx
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; CHECK-NEXT: movb $32, %dl
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; CHECK-NEXT: testb %dl, %dl
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; CHECK-NEXT: jne .LBB5_2
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; CHECK-NEXT: # BB#1:
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: .LBB5_2:
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; CHECK-NEXT: sete %cl
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; CHECK-NEXT: movzbl %cl, %ecx
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; CHECK-NEXT: xorl $1, %eax
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; CHECK-NEXT: orl %ecx, %eax
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; CHECK-NEXT: je .LBB5_5
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; CHECK-NEXT: # BB#3: # %if.then
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: jmp .LBB5_4
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; CHECK-NEXT: .LBB5_5: # %if.end
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: .LBB5_4: # %if.then
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; CHECK-NEXT: movl %ebp, %esp
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: retl
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%x = alloca i32, align 4
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%t = alloca i64, align 8
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store i32 1, i32* %x, align 4
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@ -85,10 +213,4 @@ if.then: ; preds = %entry
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if.end: ; preds = %entry
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ret i32 0
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; CHECK-LABEL: test6:
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; CHECK-NOT: andb $31
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; CHECK: sete
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; CHECK: movzbl
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; CHECK: xorl $1
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; CHECK: orl
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}
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