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[X86] Remove a bunch of 'else' after returns in reduceVMULWidth. NFC
This reduces indentation and makes it obvious this function always returns something. llvm-svn: 349671
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@ -34866,10 +34866,10 @@ static SDValue reduceVMULWidth(SDNode *N, SelectionDAG &DAG,
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// Generate the lower part of mul: pmullw. For MULU8/MULS8, only the
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// lower part is needed.
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SDValue MulLo = DAG.getNode(ISD::MUL, DL, ReducedVT, NewN0, NewN1);
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if (Mode == MULU8 || Mode == MULS8) {
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if (Mode == MULU8 || Mode == MULS8)
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return DAG.getNode((Mode == MULU8) ? ISD::ZERO_EXTEND : ISD::SIGN_EXTEND,
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DL, VT, MulLo);
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} else {
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MVT ResVT = MVT::getVectorVT(MVT::i32, NumElts / 2);
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// Generate the higher part of mul: pmulhw/pmulhuw. For MULU16/MULS16,
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// the higher part is also needed.
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@ -34897,7 +34897,7 @@ static SDValue reduceVMULWidth(SDNode *N, SelectionDAG &DAG,
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ResHi = DAG.getBitcast(ResVT, ResHi);
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return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, ResLo, ResHi);
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}
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} else {
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// When VT.getVectorNumElements() < OpsVT.getVectorNumElements(), we want
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// to legalize the mul explicitly because implicit legalization for type
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// <4 x i16> to <4 x i32> sometimes involves unnecessary unpack
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@ -34930,7 +34930,8 @@ static SDValue reduceVMULWidth(SDNode *N, SelectionDAG &DAG,
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DL, ResVT, Mul);
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return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Res,
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DAG.getIntPtrConstant(0, DL));
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} else {
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}
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// Generate the lower and higher part of mul: pmulhw/pmulhuw. For
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// MULU16/MULS16, both parts are needed.
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SDValue MulLo = DAG.getNode(ISD::MUL, DL, OpsVT, NewN0, NewN1);
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@ -34944,8 +34945,6 @@ static SDValue reduceVMULWidth(SDNode *N, SelectionDAG &DAG,
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Res = DAG.getBitcast(ResVT, Res);
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return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Res,
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DAG.getIntPtrConstant(0, DL));
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}
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}
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}
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static SDValue combineMulSpecial(uint64_t MulAmt, SDNode *N, SelectionDAG &DAG,
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