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https://github.com/RPCS3/llvm-mirror.git
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LoopVectorize: Preserve debug location info
radar://14169017 llvm-svn: 185122
This commit is contained in:
Arnold Schwaighofer
parent
64654e8350
commit
d6aee045b3
@ -326,6 +326,49 @@ private:
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EdgeMaskCache MaskCache;
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};
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/// \brief Set/reset the debug location in the IR builder using the RAII idiom.
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class DebugLocSetter {
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IRBuilder<> &Builder;
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DebugLoc OldDL;
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DebugLocSetter(const DebugLocSetter&);
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DebugLocSetter &operator=(const DebugLocSetter&);
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public:
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/// \brief Set the debug location in the IRBuilder 'B' using the instruction
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/// 'Inst'.
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DebugLocSetter(IRBuilder<> &B, Instruction *Inst) : Builder(B) {
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OldDL = Builder.getCurrentDebugLocation();
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// Handle null instructions gracefully. This is so we can use a dyn_cast on
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// values without nowing it is an instruction.
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if (Inst)
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Builder.SetCurrentDebugLocation(Inst->getDebugLoc());
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}
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~DebugLocSetter() {
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Builder.SetCurrentDebugLocation(OldDL);
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}
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};
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/// \brief Look for a meaningful debug location on the instruction or it's
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/// operands.
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static Instruction *getDebugLocFromInstOrOperands(Instruction *I) {
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if (!I)
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return I;
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DebugLoc Empty;
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if (I->getDebugLoc() != Empty)
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return I;
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for (User::op_iterator OI = I->op_begin(), OE = I->op_end(); OI != OE; ++OI) {
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if (Instruction *OpInst = dyn_cast<Instruction>(*OI))
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if (OpInst->getDebugLoc() != Empty)
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return OpInst;
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}
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return I;
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}
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/// \brief Check if conditionally executed loads are hoistable.
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///
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/// This class has two functions: isHoistableLoad and canHoistAllLoads.
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@ -1195,6 +1238,7 @@ void InnerLoopVectorizer::vectorizeMemoryInstruction(Instruction *Instr,
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// Handle consecutive loads/stores.
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GetElementPtrInst *Gep = dyn_cast<GetElementPtrInst>(Ptr);
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if (Gep && Legal->isInductionVariable(Gep->getPointerOperand())) {
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DebugLocSetter SetDL(Builder, Gep);
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Value *PtrOperand = Gep->getPointerOperand();
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Value *FirstBasePtr = getVectorValue(PtrOperand)[0];
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FirstBasePtr = Builder.CreateExtractElement(FirstBasePtr, Zero);
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@ -1205,6 +1249,7 @@ void InnerLoopVectorizer::vectorizeMemoryInstruction(Instruction *Instr,
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Gep2->setName("gep.indvar.base");
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Ptr = Builder.Insert(Gep2);
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} else if (Gep) {
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DebugLocSetter SetDL(Builder, Gep);
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assert(SE->isLoopInvariant(SE->getSCEV(Gep->getPointerOperand()),
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OrigLoop) && "Base ptr must be invariant");
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@ -1237,6 +1282,7 @@ void InnerLoopVectorizer::vectorizeMemoryInstruction(Instruction *Instr,
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} else {
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// Use the induction element ptr.
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assert(isa<PHINode>(Ptr) && "Invalid induction ptr");
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DebugLocSetter SetDL(Builder, cast<Instruction>(Ptr));
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VectorParts &PtrVal = getVectorValue(Ptr);
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Ptr = Builder.CreateExtractElement(PtrVal[0], Zero);
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}
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@ -1245,6 +1291,7 @@ void InnerLoopVectorizer::vectorizeMemoryInstruction(Instruction *Instr,
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if (SI) {
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assert(!Legal->isUniform(SI->getPointerOperand()) &&
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"We do not allow storing to uniform addresses");
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DebugLocSetter SetDL(Builder, SI);
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// We don't want to update the value in the map as it might be used in
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// another expression. So don't use a reference type for "StoredVal".
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VectorParts StoredVal = getVectorValue(SI->getValueOperand());
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@ -1269,6 +1316,9 @@ void InnerLoopVectorizer::vectorizeMemoryInstruction(Instruction *Instr,
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return;
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}
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// Handle loads.
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assert(LI && "Must have a load instruction");
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DebugLocSetter SetDL(Builder, LI);
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for (unsigned Part = 0; Part < UF; ++Part) {
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// Calculate the pointer for the specific unroll-part.
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Value *PartPtr = Builder.CreateGEP(Ptr, Builder.getInt32(Part * VF));
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@ -1292,6 +1342,8 @@ void InnerLoopVectorizer::scalarizeInstruction(Instruction *Instr) {
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// Holds vector parameters or scalars, in case of uniform vals.
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SmallVector<VectorParts, 4> Params;
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DebugLocSetter SetDL(Builder, Instr);
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// Find all of the vectorized parameters.
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for (unsigned op = 0, e = Instr->getNumOperands(); op != e; ++op) {
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Value *SrcOp = Instr->getOperand(op);
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@ -1519,6 +1571,7 @@ InnerLoopVectorizer::createEmptyLoop(LoopVectorizationLegality *Legal) {
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Builder.SetInsertPoint(VecBody->getFirstInsertionPt());
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// Generate the induction variable.
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DebugLocSetter SetDL(Builder, getDebugLocFromInstOrOperands(OldInduction));
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Induction = Builder.CreatePHI(IdxTy, 2, "index");
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// The loop step is equal to the vectorization factor (num of SIMD elements)
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// times the unroll factor (num of SIMD instructions).
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@ -1527,6 +1580,8 @@ InnerLoopVectorizer::createEmptyLoop(LoopVectorizationLegality *Legal) {
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// This is the IR builder that we use to add all of the logic for bypassing
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// the new vector loop.
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IRBuilder<> BypassBuilder(BypassBlock->getTerminator());
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DebugLocSetter SetDLByPass(BypassBuilder,
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getDebugLocFromInstOrOperands(OldInduction));
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// We may need to extend the index in case there is a type mismatch.
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// We know that the count starts at zero and does not overflow.
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@ -2066,6 +2121,8 @@ InnerLoopVectorizer::vectorizeLoop(LoopVectorizationLegality *Legal) {
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for (unsigned part = 0; part < UF; ++part) {
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// This PHINode contains the vectorized reduction variable, or
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// the initial value vector, if we bypass the vector loop.
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DebugLocSetter SetDL(Builder, RdxDesc.LoopExitInstr);
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VectorParts &RdxExitVal = getVectorValue(RdxDesc.LoopExitInstr);
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PHINode *NewPhi = Builder.CreatePHI(VecTy, 2, "rdx.vec.exit.phi");
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Value *StartVal = (part == 0) ? VectorStart : Identity;
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@ -2079,6 +2136,8 @@ InnerLoopVectorizer::vectorizeLoop(LoopVectorizationLegality *Legal) {
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Value *ReducedPartRdx = RdxParts[0];
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unsigned Op = getReductionBinOp(RdxDesc.Kind);
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for (unsigned part = 1; part < UF; ++part) {
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DebugLocSetter SetDL(Builder, dyn_cast<Instruction>(RdxParts[part]));
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if (Op != Instruction::ICmp && Op != Instruction::FCmp)
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ReducedPartRdx = Builder.CreateBinOp((Instruction::BinaryOps)Op,
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RdxParts[part], ReducedPartRdx,
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@ -2096,6 +2155,7 @@ InnerLoopVectorizer::vectorizeLoop(LoopVectorizationLegality *Legal) {
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Value *TmpVec = ReducedPartRdx;
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SmallVector<Constant*, 32> ShuffleMask(VF, 0);
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for (unsigned i = VF; i != 1; i >>= 1) {
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DebugLocSetter SetDL(Builder, dyn_cast<Instruction>(ReducedPartRdx));
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// Move the upper half of the vector to the lower half.
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for (unsigned j = 0; j != i/2; ++j)
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ShuffleMask[j] = Builder.getInt32(i/2 + j);
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@ -2118,7 +2178,11 @@ InnerLoopVectorizer::vectorizeLoop(LoopVectorizationLegality *Legal) {
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}
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// The result is in the first element of the vector.
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Value *Scalar0 = Builder.CreateExtractElement(TmpVec, Builder.getInt32(0));
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Value *Scalar0;
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{
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DebugLocSetter SetDL(Builder, dyn_cast<Instruction>(ReducedPartRdx));
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Scalar0 = Builder.CreateExtractElement(TmpVec, Builder.getInt32(0));
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}
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// Now, we need to fix the users of the reduction variable
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// inside and outside of the scalar remainder loop.
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@ -2253,6 +2317,7 @@ InnerLoopVectorizer::vectorizeBlockInLoop(LoopVectorizationLegality *Legal,
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// Check for PHI nodes that are lowered to vector selects.
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if (P->getParent() != OrigLoop->getHeader()) {
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DebugLocSetter SetDL(Builder, P);
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// We know that all PHIs in non header blocks are converted into
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// selects, so we don't have to worry about the insertion order and we
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// can just use the builder.
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@ -2295,6 +2360,8 @@ InnerLoopVectorizer::vectorizeBlockInLoop(LoopVectorizationLegality *Legal,
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LoopVectorizationLegality::InductionInfo II =
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Legal->getInductionVars()->lookup(P);
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DebugLocSetter SetDL(Builder, P);
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switch (II.IK) {
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case LoopVectorizationLegality::IK_NoInduction:
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llvm_unreachable("Unknown induction");
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@ -2402,6 +2469,7 @@ InnerLoopVectorizer::vectorizeBlockInLoop(LoopVectorizationLegality *Legal,
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case Instruction::Xor: {
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// Just widen binops.
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BinaryOperator *BinOp = dyn_cast<BinaryOperator>(it);
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DebugLocSetter SetDL(Builder, BinOp);
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VectorParts &A = getVectorValue(it->getOperand(0));
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VectorParts &B = getVectorValue(it->getOperand(1));
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@ -2428,6 +2496,7 @@ InnerLoopVectorizer::vectorizeBlockInLoop(LoopVectorizationLegality *Legal,
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// instruction with a scalar condition. Otherwise, use vector-select.
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bool InvariantCond = SE->isLoopInvariant(SE->getSCEV(it->getOperand(0)),
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OrigLoop);
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DebugLocSetter SetDL(Builder, it);
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// The condition can be loop invariant but still defined inside the
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// loop. This means that we can't just use the original 'cond' value.
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@ -2452,6 +2521,7 @@ InnerLoopVectorizer::vectorizeBlockInLoop(LoopVectorizationLegality *Legal,
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// Widen compares. Generate vector compares.
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bool FCmp = (it->getOpcode() == Instruction::FCmp);
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CmpInst *Cmp = dyn_cast<CmpInst>(it);
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DebugLocSetter SetDL(Builder, it);
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VectorParts &A = getVectorValue(it->getOperand(0));
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VectorParts &B = getVectorValue(it->getOperand(1));
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for (unsigned Part = 0; Part < UF; ++Part) {
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@ -2482,6 +2552,7 @@ InnerLoopVectorizer::vectorizeBlockInLoop(LoopVectorizationLegality *Legal,
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case Instruction::FPTrunc:
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case Instruction::BitCast: {
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CastInst *CI = dyn_cast<CastInst>(it);
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DebugLocSetter SetDL(Builder, it);
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/// Optimize the special case where the source is the induction
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/// variable. Notice that we can only optimize the 'trunc' case
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/// because: a. FP conversions lose precision, b. sext/zext may wrap,
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@ -2509,6 +2580,8 @@ InnerLoopVectorizer::vectorizeBlockInLoop(LoopVectorizationLegality *Legal,
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if (isa<DbgInfoIntrinsic>(it))
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break;
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DebugLocSetter SetDL(Builder, it);
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Module *M = BB->getParent()->getParent();
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CallInst *CI = cast<CallInst>(it);
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Intrinsic::ID ID = getIntrinsicIDForCall(CI, TLI);
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92
test/Transforms/LoopVectorize/debugloc.ll
Normal file
92
test/Transforms/LoopVectorize/debugloc.ll
Normal file
@ -0,0 +1,92 @@
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; RUN: opt -S < %s -loop-vectorize -force-vector-unroll=1 -force-vector-width=2 | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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; Make sure we are preserving debug info in the vectorized code.
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; CHECK: for.body.lr.ph
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; CHECK: cmp.zero = icmp eq i64 {{.*}}, 0, !dbg !21
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; CHECK: vector.body
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; CHECK: index {{.*}}, !dbg !21
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; CHECK: getelementptr inbounds i32* %a, {{.*}}, !dbg !22
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; CHECK: load <2 x i32>* {{.*}}, !dbg !22
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; CHECK: add <2 x i32> {{.*}}, !dbg !22
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; CHECK: add i64 %index, 2, !dbg !21
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; CHECK: icmp eq i64 %index.next, %end.idx.rnd.down, !dbg !21
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; CHECK: middle.block
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; CHECK: add <2 x i32> %rdx.vec.exit.phi, %rdx.shuf, !dbg !22
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; CHECK: extractelement <2 x i32> %bin.rdx, i32 0, !dbg !22
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define i32 @f(i32* nocapture %a, i32 %size) #0 {
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entry:
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tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13), !dbg !19
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tail call void @llvm.dbg.value(metadata !{i32 %size}, i64 0, metadata !14), !dbg !19
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tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !15), !dbg !20
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tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !16), !dbg !21
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%cmp4 = icmp eq i32 %size, 0, !dbg !21
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br i1 %cmp4, label %for.end, label %for.body.lr.ph, !dbg !21
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for.body.lr.ph: ; preds = %entry
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br label %for.body, !dbg !21
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for.body: ; preds = %for.body.lr.ph, %for.body
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%indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
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%sum.05 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
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%arrayidx = getelementptr inbounds i32* %a, i64 %indvars.iv, !dbg !22
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%0 = load i32* %arrayidx, align 4, !dbg !22, !tbaa !23
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%add = add i32 %0, %sum.05, !dbg !22
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tail call void @llvm.dbg.value(metadata !{i32 %add.lcssa}, i64 0, metadata !15), !dbg !22
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%indvars.iv.next = add i64 %indvars.iv, 1, !dbg !21
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tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !16), !dbg !21
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !21
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%exitcond = icmp ne i32 %lftr.wideiv, %size, !dbg !21
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br i1 %exitcond, label %for.body, label %for.cond.for.end_crit_edge, !dbg !21
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for.cond.for.end_crit_edge: ; preds = %for.body
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%add.lcssa = phi i32 [ %add, %for.body ]
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br label %for.end, !dbg !21
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for.end: ; preds = %entry, %for.cond.for.end_crit_edge
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%sum.0.lcssa = phi i32 [ %add.lcssa, %for.cond.for.end_crit_edge ], [ 0, %entry ]
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ret i32 %sum.0.lcssa, !dbg !26
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}
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; Function Attrs: nounwind readnone
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declare void @llvm.dbg.declare(metadata, metadata) #1
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; Function Attrs: nounwind readnone
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declare void @llvm.dbg.value(metadata, i64, metadata) #1
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attributes #0 = { nounwind readonly ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "unsafe-fp-math"="true" "use-soft-float"="false" }
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attributes #1 = { nounwind readnone }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!18}
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