RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 12:41:49 +01:00
Code Issues Projects Releases Wiki Activity

[X86ISelLowering] combineCMov - cleanup CMOV->LEA codegen. NFCI.

Browse Source 
Only compute the diff once and we don't need the truncation code (assert the bitwidth is correct just to be safe).

llvm-svn: 370583
This commit is contained in:
Simon Pilgrim 2019-08-31 14:18:26 +00:00
parent 33669f6fcc
commit d70b0f4887
1 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
lib/Target/X86/X86ISelLowering.cpp
View File

@ -37537,12 +37537,13 @@ static SDValue combineCMov(SDNode *N, SelectionDAG &DAG,
// Optimize cases that will turn into an LEA instruction. This requires
// an i32 or i64 and an efficient multiplier (1, 2, 3, 4, 5, 8, 9).
if (N->getValueType(0) == MVT::i32 || N->getValueType(0) == MVT::i64) {
uint64_t Diff = TrueC->getZExtValue()-FalseC->getZExtValue();
if (N->getValueType(0) == MVT::i32) Diff = (unsigned)Diff;
APInt Diff = TrueC->getAPIntValue() - FalseC->getAPIntValue();
assert(Diff.getBitWidth() == N->getValueType(0).getSizeInBits() &&
"Implicit constant truncation");
bool isFastMultiplier = false;
if (Diff < 10) {
switch ((unsigned char)Diff) {
if (Diff.ult(10)) {
switch (Diff.getZExtValue()) {
default: break;
case 1: // result = add base, cond
case 2: // result = lea base( , cond*2)
@ -37557,7 +37558,6 @@ static SDValue combineCMov(SDNode *N, SelectionDAG &DAG,
}
if (isFastMultiplier) {
APInt Diff = TrueC->getAPIntValue()-FalseC->getAPIntValue();
Cond = getSETCC(CC, Cond, DL ,DAG);
// Zero extend the condition if needed.
Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, FalseC->getValueType(0),