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[AArch64] Minor code refactoring. NFC.
llvm-svn: 293063
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@ -70,14 +70,10 @@ static bool guaranteesZeroRegInBlock(MachineInstr &MI, MachineBasicBlock *MBB) {
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unsigned Opc = MI.getOpcode();
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// Check if the current basic block is the target block to which the
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// CBZ/CBNZ instruction jumps when its Wt/Xt is zero.
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if ((Opc == AArch64::CBZW || Opc == AArch64::CBZX) &&
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MBB == MI.getOperand(1).getMBB())
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return true;
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else if ((Opc == AArch64::CBNZW || Opc == AArch64::CBNZX) &&
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MBB != MI.getOperand(1).getMBB())
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return true;
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return false;
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return ((Opc == AArch64::CBZW || Opc == AArch64::CBZX) &&
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MBB == MI.getOperand(1).getMBB()) ||
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((Opc == AArch64::CBNZW || Opc == AArch64::CBNZX) &&
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MBB != MI.getOperand(1).getMBB());
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}
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bool AArch64RedundantCopyElimination::optimizeCopy(MachineBasicBlock *MBB) {
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@ -85,9 +81,14 @@ bool AArch64RedundantCopyElimination::optimizeCopy(MachineBasicBlock *MBB) {
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if (MBB->pred_size() != 1)
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return false;
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// Check if the predecessor has two successors, implying the block ends in a
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// conditional branch.
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MachineBasicBlock *PredMBB = *MBB->pred_begin();
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if (PredMBB->succ_size() != 2)
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return false;
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MachineBasicBlock::iterator CompBr = PredMBB->getLastNonDebugInstr();
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if (CompBr == PredMBB->end() || PredMBB->succ_size() != 2)
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if (CompBr == PredMBB->end())
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return false;
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++CompBr;
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