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DebugInfo: add CodeView register mapping for ARM NT

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Add the core registers and NEON registers mapping to the CodeView
register ID.  This is sufficient to compile a basic C program with debug
info using CodeView debug info.

llvm-svn: 370423
This commit is contained in:
Saleem Abdulrasool 2019-08-30 00:16:02 +00:00
parent f73e4af6a5
commit d793e51661
1 changed files with 121 additions and 0 deletions
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121
include/llvm/DebugInfo/CodeView/CodeViewRegisters.def
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@ -366,6 +366,127 @@ CV_REGISTER(AMD64_K7, 765)
#endif // defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_X86)
#if defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_ARM)
// ARM registers
CV_REGISTER(ARM_NOREG, 0)
// General purpose 32-bit integer regisers
CV_REGISTER(ARM_R0, 10)
CV_REGISTER(ARM_R1, 11)
CV_REGISTER(ARM_R2, 12)
CV_REGISTER(ARM_R3, 13)
CV_REGISTER(ARM_R4, 14)
CV_REGISTER(ARM_R5, 15)
CV_REGISTER(ARM_R6, 16)
CV_REGISTER(ARM_R7, 17)
CV_REGISTER(ARM_R8, 18)
CV_REGISTER(ARM_R9, 19)
CV_REGISTER(ARM_R10, 20)
CV_REGISTER(ARM_R11, 21)
CV_REGISTER(ARM_R12, 22)
CV_REGISTER(ARM_SP, 23)
CV_REGISTER(ARM_LR, 24)
CV_REGISTER(ARM_PC, 25)
// Status register
CV_REGISTER(ARM_CPSR, 25)
// ARM VFPv1 registers
CV_REGISTER(ARM_FPSCR, 40)
CV_REGISTER(ARM_FPEXC, 41)
// ARM VFPv3/NEON registers
CV_REGISTER(ARM_FS32, 200)
CV_REGISTER(ARM_FS33, 201)
CV_REGISTER(ARM_FS34, 202)
CV_REGISTER(ARM_FS35, 203)
CV_REGISTER(ARM_FS36, 204)
CV_REGISTER(ARM_FS37, 205)
CV_REGISTER(ARM_FS38, 206)
CV_REGISTER(ARM_FS39, 207)
CV_REGISTER(ARM_FS40, 208)
CV_REGISTER(ARM_FS41, 209)
CV_REGISTER(ARM_FS42, 210)
CV_REGISTER(ARM_FS43, 211)
CV_REGISTER(ARM_FS44, 212)
CV_REGISTER(ARM_FS45, 213)
CV_REGISTER(ARM_FS46, 214)
CV_REGISTER(ARM_FS47, 215)
CV_REGISTER(ARM_FS48, 216)
CV_REGISTER(ARM_FS49, 217)
CV_REGISTER(ARM_FS50, 218)
CV_REGISTER(ARM_FS51, 219)
CV_REGISTER(ARM_FS52, 220)
CV_REGISTER(ARM_FS53, 221)
CV_REGISTER(ARM_FS54, 222)
CV_REGISTER(ARM_FS55, 223)
CV_REGISTER(ARM_FS56, 224)
CV_REGISTER(ARM_FS57, 225)
CV_REGISTER(ARM_FS58, 226)
CV_REGISTER(ARM_FS59, 227)
CV_REGISTER(ARM_FS60, 228)
CV_REGISTER(ARM_FS61, 229)
CV_REGISTER(ARM_FS62, 230)
CV_REGISTER(ARM_FS63, 231)
CV_REGISTER(ARM_ND0, 300)
CV_REGISTER(ARM_ND1, 301)
CV_REGISTER(ARM_ND2, 302)
CV_REGISTER(ARM_ND3, 303)
CV_REGISTER(ARM_ND4, 304)
CV_REGISTER(ARM_ND5, 305)
CV_REGISTER(ARM_ND6, 306)
CV_REGISTER(ARM_ND7, 307)
CV_REGISTER(ARM_ND8, 308)
CV_REGISTER(ARM_ND9, 309)
CV_REGISTER(ARM_ND10, 310)
CV_REGISTER(ARM_ND11, 311)
CV_REGISTER(ARM_ND12, 312)
CV_REGISTER(ARM_ND13, 313)
CV_REGISTER(ARM_ND14, 314)
CV_REGISTER(ARM_ND15, 315)
CV_REGISTER(ARM_ND16, 316)
CV_REGISTER(ARM_ND17, 317)
CV_REGISTER(ARM_ND18, 318)
CV_REGISTER(ARM_ND19, 319)
CV_REGISTER(ARM_ND20, 320)
CV_REGISTER(ARM_ND21, 321)
CV_REGISTER(ARM_ND22, 322)
CV_REGISTER(ARM_ND23, 323)
CV_REGISTER(ARM_ND24, 324)
CV_REGISTER(ARM_ND25, 325)
CV_REGISTER(ARM_ND26, 326)
CV_REGISTER(ARM_ND27, 327)
CV_REGISTER(ARM_ND28, 328)
CV_REGISTER(ARM_ND29, 329)
CV_REGISTER(ARM_ND30, 330)
CV_REGISTER(ARM_ND31, 331)
CV_REGISTER(ARM_NQ0, 400)
CV_REGISTER(ARM_NQ1, 401)
CV_REGISTER(ARM_NQ2, 402)
CV_REGISTER(ARM_NQ3, 403)
CV_REGISTER(ARM_NQ4, 404)
CV_REGISTER(ARM_NQ5, 405)
CV_REGISTER(ARM_NQ6, 406)
CV_REGISTER(ARM_NQ7, 407)
CV_REGISTER(ARM_NQ8, 408)
CV_REGISTER(ARM_NQ9, 409)
CV_REGISTER(ARM_NQ10, 410)
CV_REGISTER(ARM_NQ11, 411)
CV_REGISTER(ARM_NQ12, 412)
CV_REGISTER(ARM_NQ13, 413)
CV_REGISTER(ARM_NQ14, 414)
CV_REGISTER(ARM_NQ15, 415)
#endif // defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_ARM)
#if defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_ARM64)
// ARM64 registers