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I found a better place for this optz'n.
llvm-svn: 54877
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205be593b8
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@ -5241,20 +5241,6 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
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return new ICmpInst(I.getPredicate(), A, B);
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return new ICmpInst(I.getPredicate(), A, B);
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}
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}
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ConstantInt *CI2;
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// (icmp u/s (xor A SignBit), C) -> (icmp s/u A, (xor C SignBit))
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if (!I.isEquality() &&
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match(Op0, m_Xor(m_Value(A), m_ConstantInt(CI2)))) {
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if (CI2->getValue().isSignBit()) {
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const APInt &SignBit = CI2->getValue();
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ICmpInst::Predicate Pred = I.isSignedPredicate()
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? I.getUnsignedPredicate()
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: I.getSignedPredicate();
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return new ICmpInst(Pred, A,
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ConstantInt::get(CI->getValue() ^ SignBit));
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}
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}
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// If we have a icmp le or icmp ge instruction, turn it into the appropriate
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// If we have a icmp le or icmp ge instruction, turn it into the appropriate
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// icmp lt or icmp gt instruction. This allows us to rely on them being
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// icmp lt or icmp gt instruction. This allows us to rely on them being
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// folded in the code below.
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// folded in the code below.
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@ -5822,6 +5808,16 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
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else
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else
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return new ICmpInst(ICmpInst::ICMP_SLT, CompareVal, AddOne(RHS));
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return new ICmpInst(ICmpInst::ICMP_SLT, CompareVal, AddOne(RHS));
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}
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}
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// (icmp u/s (xor A SignBit), C) -> (icmp s/u A, (xor C SignBit))
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if (!ICI.isEquality() && XorCST->getValue().isSignBit()) {
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const APInt &SignBit = XorCST->getValue();
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ICmpInst::Predicate Pred = ICI.isSignedPredicate()
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? ICI.getUnsignedPredicate()
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: ICI.getSignedPredicate();
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return new ICmpInst(Pred, LHSI->getOperand(0),
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ConstantInt::get(RHSV ^ SignBit));
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}
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}
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}
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break;
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break;
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case Instruction::And: // (icmp pred (and X, AndCST), RHS)
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case Instruction::And: // (icmp pred (and X, AndCST), RHS)
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