mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-26 04:32:44 +01:00
Remove arm_apcscc from the test files. It is the default and doing this
matches what llvm-gcc and clang now produce. llvm-svn: 106221
This commit is contained in:
Rafael Espindola
parent
5d2a26361d
commit
d7a63bead9
@ -3,7 +3,7 @@
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%struct.rtunion = type { i64 }
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%struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
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define arm_apcscc void @simplify_unary_real(i8* nocapture %p) nounwind {
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define void @simplify_unary_real(i8* nocapture %p) nounwind {
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entry:
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%tmp121 = load i64* null, align 4 ; <i64> [#uses=1]
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%0 = getelementptr %struct.rtx_def* null, i32 0, i32 3, i32 3, i32 0 ; <i64*> [#uses=1]
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@ -8,11 +8,11 @@
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@"\01LC16" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1]
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@"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1]
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declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
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declare i32 @printf(i8* nocapture, ...) nounwind
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declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
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declare void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
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define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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entry:
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br i1 undef, label %bb5, label %bb
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@ -44,17 +44,17 @@ bb11: ; preds = %bb9
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store i32 0, i32* @no_mat, align 4
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store i32 0, i32* @no_mis, align 4
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%3 = getelementptr i8* %B, i32 %0 ; <i8*> [#uses=1]
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tail call arm_apcscc void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
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tail call void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
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%4 = sitofp i32 undef to double ; <double> [#uses=1]
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%5 = fdiv double %4, 1.000000e+01 ; <double> [#uses=1]
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%6 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @"\01LC12", i32 0, i32 0), double %5) nounwind ; <i32> [#uses=0]
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%6 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @"\01LC12", i32 0, i32 0), double %5) nounwind ; <i32> [#uses=0]
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%7 = load i32* @al_len, align 4 ; <i32> [#uses=1]
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%8 = load i32* @no_mat, align 4 ; <i32> [#uses=1]
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%9 = load i32* @no_mis, align 4 ; <i32> [#uses=1]
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%10 = sub i32 %7, %8 ; <i32> [#uses=1]
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%11 = sub i32 %10, %9 ; <i32> [#uses=1]
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%12 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC16", i32 0, i32 0), i32 %11) nounwind ; <i32> [#uses=0]
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%13 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 undef) nounwind ; <i32> [#uses=0]
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%12 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC16", i32 0, i32 0), i32 %11) nounwind ; <i32> [#uses=0]
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%13 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 undef) nounwind ; <i32> [#uses=0]
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br i1 undef, label %bb15, label %bb12
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bb12: ; preds = %bb11
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@ -6,11 +6,11 @@
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@"\01LC15" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1]
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@"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1]
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declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
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declare i32 @printf(i8* nocapture, ...) nounwind
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declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
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declare void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
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define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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entry:
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br i1 undef, label %bb5, label %bb
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@ -41,11 +41,11 @@ bb11: ; preds = %bb9
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store i32 0, i32* @no_mat, align 4
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store i32 0, i32* @no_mis, align 4
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%4 = getelementptr i8* %B, i32 %0 ; <i8*> [#uses=1]
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tail call arm_apcscc void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwind
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%5 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC11", i32 0, i32 0), i32 %tmp13) nounwind ; <i32> [#uses=0]
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tail call void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwind
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%5 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC11", i32 0, i32 0), i32 %tmp13) nounwind ; <i32> [#uses=0]
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%6 = load i32* @no_mis, align 4 ; <i32> [#uses=1]
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%7 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC15", i32 0, i32 0), i32 %6) nounwind ; <i32> [#uses=0]
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%8 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 %2) nounwind ; <i32> [#uses=0]
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%7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC15", i32 0, i32 0), i32 %6) nounwind ; <i32> [#uses=0]
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%8 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 %2) nounwind ; <i32> [#uses=0]
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br i1 undef, label %bb15, label %bb12
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bb12: ; preds = %bb11
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@ -2,7 +2,7 @@
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@JJ = external global i32* ; <i32**> [#uses=1]
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define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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entry:
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br i1 undef, label %bb5, label %bb
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@ -6,9 +6,9 @@
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@no_mis = external global i32 ; <i32*> [#uses=1]
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@name1 = external global i8* ; <i8**> [#uses=1]
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declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
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declare void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
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define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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entry:
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br i1 undef, label %bb5, label %bb
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@ -35,7 +35,7 @@ bb11: ; preds = %bb9
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store i32 0, i32* @no_mis, align 4
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%1 = getelementptr i8* %A, i32 0 ; <i8*> [#uses=1]
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%2 = getelementptr i8* %B, i32 0 ; <i8*> [#uses=1]
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tail call arm_apcscc void @diff(i8* %1, i8* %2, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
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tail call void @diff(i8* %1, i8* %2, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
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br i1 undef, label %bb15, label %bb12
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bb12: ; preds = %bb11
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@ -2,7 +2,7 @@
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@XX = external global i32* ; <i32**> [#uses=1]
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define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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entry:
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br i1 undef, label %bb5, label %bb
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@ -4,7 +4,7 @@
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@II = external global i32* ; <i32**> [#uses=1]
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@JJ = external global i32* ; <i32**> [#uses=1]
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define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
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entry:
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br i1 undef, label %bb5, label %bb
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@ -8,7 +8,7 @@
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@_2E_str7 = internal constant [21 x i8] c"ERROR: Only 1 point!\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[21 x i8]*> [#uses=1]
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@llvm.used = appending global [1 x i8*] [i8* bitcast (void (%struct.EDGE_PAIR*, %struct.VERTEX*, %struct.VERTEX*)* @build_delaunay to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define arm_apcscc void @build_delaunay(%struct.EDGE_PAIR* noalias nocapture sret %agg.result, %struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind {
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define void @build_delaunay(%struct.EDGE_PAIR* noalias nocapture sret %agg.result, %struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind {
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entry:
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%delright = alloca %struct.EDGE_PAIR, align 8 ; <%struct.EDGE_PAIR*> [#uses=3]
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%delleft = alloca %struct.EDGE_PAIR, align 8 ; <%struct.EDGE_PAIR*> [#uses=3]
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@ -29,10 +29,10 @@ bb1.i: ; preds = %bb1.i, %bb
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br i1 %6, label %get_low.exit, label %bb1.i
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get_low.exit: ; preds = %bb1.i
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call arm_apcscc void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delright, %struct.VERTEX* %2, %struct.VERTEX* %extra) nounwind
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call void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delright, %struct.VERTEX* %2, %struct.VERTEX* %extra) nounwind
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%7 = getelementptr %struct.VERTEX* %tree, i32 0, i32 1 ; <%struct.VERTEX**> [#uses=1]
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%8 = load %struct.VERTEX** %7, align 4 ; <%struct.VERTEX*> [#uses=1]
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call arm_apcscc void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delleft, %struct.VERTEX* %8, %struct.VERTEX* %tree) nounwind
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call void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delleft, %struct.VERTEX* %8, %struct.VERTEX* %tree) nounwind
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%9 = getelementptr %struct.EDGE_PAIR* %delleft, i32 0, i32 0 ; <%struct.edge_rec**> [#uses=1]
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%10 = load %struct.edge_rec** %9, align 8 ; <%struct.edge_rec*> [#uses=2]
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%11 = getelementptr %struct.EDGE_PAIR* %delleft, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
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@ -141,7 +141,7 @@ bb5.i: ; preds = %bb3.i
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%85 = inttoptr i32 %84 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
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%86 = getelementptr %struct.edge_rec* %ldi_addr.0.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
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%87 = load %struct.VERTEX** %86, align 4 ; <%struct.VERTEX*> [#uses=1]
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%88 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=6]
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%88 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=6]
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%89 = getelementptr %struct.edge_rec* %88, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
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store %struct.edge_rec* %88, %struct.edge_rec** %89, align 4
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%90 = getelementptr %struct.edge_rec* %88, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=2]
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@ -780,7 +780,7 @@ bb24.i: ; preds = %bb23.i, %bb21.i
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%592 = and i32 %589, -64 ; <i32> [#uses=1]
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%593 = or i32 %591, %592 ; <i32> [#uses=1]
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%594 = inttoptr i32 %593 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
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%595 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
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%595 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
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%596 = getelementptr %struct.edge_rec* %595, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
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store %struct.edge_rec* %595, %struct.edge_rec** %596, align 4
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%597 = getelementptr %struct.edge_rec* %595, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
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@ -882,7 +882,7 @@ bb25.i: ; preds = %bb23.i, %bb22.i
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%677 = and i32 %674, -64 ; <i32> [#uses=1]
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%678 = or i32 %676, %677 ; <i32> [#uses=1]
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%679 = inttoptr i32 %678 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
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%680 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
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%680 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
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%681 = getelementptr %struct.edge_rec* %680, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=5]
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store %struct.edge_rec* %680, %struct.edge_rec** %681, align 4
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%682 = getelementptr %struct.edge_rec* %680, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
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@ -1005,15 +1005,15 @@ bb7: ; preds = %bb
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%762 = getelementptr %struct.VERTEX* %tree, i32 0, i32 1 ; <%struct.VERTEX**> [#uses=1]
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%763 = load %struct.VERTEX** %762, align 4 ; <%struct.VERTEX*> [#uses=4]
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%764 = icmp eq %struct.VERTEX* %763, null ; <i1> [#uses=1]
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%765 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
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%765 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
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%766 = getelementptr %struct.edge_rec* %765, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
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store %struct.edge_rec* %765, %struct.edge_rec** %766, align 4
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%767 = getelementptr %struct.edge_rec* %765, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=3]
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br i1 %764, label %bb10, label %bb11
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bb8: ; preds = %entry
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%768 = call arm_apcscc i32 @puts(i8* getelementptr ([21 x i8]* @_2E_str7, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
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call arm_apcscc void @exit(i32 -1) noreturn nounwind
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%768 = call i32 @puts(i8* getelementptr ([21 x i8]* @_2E_str7, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
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call void @exit(i32 -1) noreturn nounwind
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unreachable
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bb10: ; preds = %bb7
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@ -1053,7 +1053,7 @@ bb11: ; preds = %bb7
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store %struct.VERTEX* %tree, %struct.VERTEX** %790, align 4
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%791 = getelementptr %struct.edge_rec* %785, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
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store %struct.edge_rec* %783, %struct.edge_rec** %791, align 4
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%792 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
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%792 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
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%793 = getelementptr %struct.edge_rec* %792, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
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store %struct.edge_rec* %792, %struct.edge_rec** %793, align 4
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%794 = getelementptr %struct.edge_rec* %792, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
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@ -1117,7 +1117,7 @@ bb11: ; preds = %bb7
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%843 = or i32 %841, %842 ; <i32> [#uses=1]
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%844 = inttoptr i32 %843 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
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%845 = load %struct.VERTEX** %767, align 4 ; <%struct.VERTEX*> [#uses=1]
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%846 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
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%846 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
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%847 = getelementptr %struct.edge_rec* %846, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=7]
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store %struct.edge_rec* %846, %struct.edge_rec** %847, align 4
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%848 = getelementptr %struct.edge_rec* %846, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
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@ -1316,8 +1316,8 @@ bb15: ; preds = %bb14, %bb13, %bb11, %bb10, %bb6
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ret void
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}
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declare arm_apcscc i32 @puts(i8* nocapture) nounwind
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declare i32 @puts(i8* nocapture) nounwind
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declare arm_apcscc void @exit(i32) noreturn nounwind
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declare void @exit(i32) noreturn nounwind
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declare arm_apcscc %struct.edge_rec* @alloc_edge() nounwind
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declare %struct.edge_rec* @alloc_edge() nounwind
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@ -6,9 +6,9 @@
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%struct.cli_bm_patt = type { i8*, i8*, i16, i16, i8*, i8*, i8, %struct.cli_bm_patt*, i16 }
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%struct.cli_matcher = type { i16, i8, i8*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 }
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declare arm_apcscc i32 @strlen(i8* nocapture) nounwind readonly
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declare i32 @strlen(i8* nocapture) nounwind readonly
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|
||||
define arm_apcscc i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
|
||||
define i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
|
||||
entry:
|
||||
br i1 undef, label %bb126, label %bb1
|
||||
|
||||
@ -86,7 +86,7 @@ bb52: ; preds = %cli_calloc.exit
|
||||
%0 = load i16* undef, align 4 ; <i16> [#uses=1]
|
||||
%1 = icmp eq i16 %0, 0 ; <i1> [#uses=1]
|
||||
%iftmp.20.0 = select i1 %1, i8* %hexsig, i8* null ; <i8*> [#uses=1]
|
||||
%2 = tail call arm_apcscc i32 @strlen(i8* %iftmp.20.0) nounwind readonly ; <i32> [#uses=0]
|
||||
%2 = tail call i32 @strlen(i8* %iftmp.20.0) nounwind readonly ; <i32> [#uses=0]
|
||||
unreachable
|
||||
|
||||
bb126: ; preds = %entry
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
%struct.cli_bm_patt = type { i8*, i8*, i16, i16, i8*, i8*, i8, %struct.cli_bm_patt*, i16 }
|
||||
%struct.cli_matcher = type { i16, i8, i8*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 }
|
||||
|
||||
define arm_apcscc i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
|
||||
define i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
|
||||
entry:
|
||||
br i1 undef, label %bb126, label %bb1
|
||||
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
|
||||
declare double @llvm.exp.f64(double) nounwind readonly
|
||||
|
||||
define arm_apcscc void @findratio(double* nocapture %res1, double* nocapture %res2) nounwind {
|
||||
define void @findratio(double* nocapture %res1, double* nocapture %res2) nounwind {
|
||||
entry:
|
||||
br label %bb
|
||||
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
|
||||
target triple = "armv7-apple-darwin9"
|
||||
|
||||
define arm_apcscc <4 x i32> @scale(<4 x i32> %v, i32 %f) nounwind {
|
||||
define <4 x i32> @scale(<4 x i32> %v, i32 %f) nounwind {
|
||||
entry:
|
||||
%v_addr = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
|
||||
%f_addr = alloca i32 ; <i32*> [#uses=2]
|
||||
|
||||
@ -7,7 +7,7 @@ target triple = "armv7-apple-darwin9"
|
||||
%struct.tree = type { i32, double, double, %struct.tree*, %struct.tree*, %struct.tree*, %struct.tree* }
|
||||
@g = common global %struct.tree* null
|
||||
|
||||
define arm_apcscc %struct.tree* @tsp(%struct.tree* %t, i32 %nproc) nounwind {
|
||||
define %struct.tree* @tsp(%struct.tree* %t, i32 %nproc) nounwind {
|
||||
entry:
|
||||
%t.idx51.val.i = load double* null ; <double> [#uses=1]
|
||||
br i1 undef, label %bb4.i, label %bb.i
|
||||
|
||||
@ -9,7 +9,7 @@ target triple = "armv7-apple-darwin9"
|
||||
%struct.icstruct = type { [3 x i32], i16 }
|
||||
%struct.node = type { i16, double, [3 x double], i32, i32 }
|
||||
|
||||
declare arm_apcscc double @floor(double) nounwind readnone
|
||||
declare double @floor(double) nounwind readnone
|
||||
|
||||
define void @intcoord(%struct.icstruct* noalias nocapture sret %agg.result, i1 %a, double %b) {
|
||||
entry:
|
||||
@ -28,7 +28,7 @@ bb7: ; preds = %bb3
|
||||
br i1 %a, label %bb11, label %bb9
|
||||
|
||||
bb9: ; preds = %bb7
|
||||
%0 = tail call arm_apcscc double @floor(double %b) nounwind readnone ; <double> [#uses=0]
|
||||
%0 = tail call double @floor(double %b) nounwind readnone ; <double> [#uses=0]
|
||||
br label %bb11
|
||||
|
||||
bb11: ; preds = %bb9, %bb7
|
||||
|
||||
@ -9,7 +9,7 @@ target triple = "armv7-apple-darwin9"
|
||||
%struct.Patient = type { i32, i32, i32, %struct.Village* }
|
||||
%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
|
||||
|
||||
define arm_apcscc %struct.Village* @alloc_tree(i32 %level, i32 %label, %struct.Village* %back, i1 %p) nounwind {
|
||||
define %struct.Village* @alloc_tree(i32 %level, i32 %label, %struct.Village* %back, i1 %p) nounwind {
|
||||
entry:
|
||||
br i1 %p, label %bb8, label %bb1
|
||||
|
||||
|
||||
@ -8,19 +8,19 @@ target triple = "armv7-apple-darwin9"
|
||||
@.str1 = external constant [31 x i8], align 1 ; <[31 x i8]*> [#uses=1]
|
||||
@.str2 = external constant [4 x i8], align 1 ; <[4 x i8]*> [#uses=1]
|
||||
|
||||
declare arm_apcscc i32 @getUnknown(i32, ...) nounwind
|
||||
declare i32 @getUnknown(i32, ...) nounwind
|
||||
|
||||
declare void @llvm.va_start(i8*) nounwind
|
||||
|
||||
declare void @llvm.va_end(i8*) nounwind
|
||||
|
||||
declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
|
||||
declare i32 @printf(i8* nocapture, ...) nounwind
|
||||
|
||||
define arm_apcscc i32 @main() nounwind {
|
||||
define i32 @main() nounwind {
|
||||
entry:
|
||||
%0 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 1, i32 1, i32 1, i32 1, i32 1, i32 1) nounwind ; <i32> [#uses=0]
|
||||
%1 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 -128, i32 116, i32 116, i32 -3852, i32 -31232, i32 -1708916736) nounwind ; <i32> [#uses=0]
|
||||
%2 = tail call arm_apcscc i32 (i32, ...)* @getUnknown(i32 undef, i32 116, i32 116, i32 -3852, i32 -31232, i32 30556, i32 -1708916736) nounwind ; <i32> [#uses=1]
|
||||
%3 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @.str2, i32 0, i32 0), i32 %2) nounwind ; <i32> [#uses=0]
|
||||
%0 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 1, i32 1, i32 1, i32 1, i32 1, i32 1) nounwind ; <i32> [#uses=0]
|
||||
%1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 -128, i32 116, i32 116, i32 -3852, i32 -31232, i32 -1708916736) nounwind ; <i32> [#uses=0]
|
||||
%2 = tail call i32 (i32, ...)* @getUnknown(i32 undef, i32 116, i32 116, i32 -3852, i32 -31232, i32 30556, i32 -1708916736) nounwind ; <i32> [#uses=1]
|
||||
%3 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @.str2, i32 0, i32 0), i32 %2) nounwind ; <i32> [#uses=0]
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
@ -10,7 +10,7 @@ target triple = "thumbv7-elf"
|
||||
|
||||
declare <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
|
||||
|
||||
define arm_apcscc void @_ZN6squish10ClusterFit9Compress3EPv(%quuz* %this, i8* %block) {
|
||||
define void @_ZN6squish10ClusterFit9Compress3EPv(%quuz* %this, i8* %block) {
|
||||
entry:
|
||||
%0 = lshr <4 x i32> zeroinitializer, <i32 31, i32 31, i32 31, i32 31> ; <<4 x i32>> [#uses=1]
|
||||
%1 = shufflevector <4 x i32> %0, <4 x i32> undef, <2 x i32> <i32 2, i32 3> ; <<2 x i32>> [#uses=1]
|
||||
|
||||
@ -8,7 +8,7 @@ target triple = "thumbv7-elf"
|
||||
%quux = type { i32 (...)**, %baz*, i32 }
|
||||
%quuz = type { %quux, i32, %bar, [128 x i8], [16 x %foo], %foo, %foo, %foo }
|
||||
|
||||
define arm_apcscc void @aaaa(%quuz* %this, i8* %block) {
|
||||
define void @aaaa(%quuz* %this, i8* %block) {
|
||||
entry:
|
||||
br i1 undef, label %bb.nph269, label %bb201
|
||||
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
|
||||
target triple = "thumbv7-elf"
|
||||
|
||||
define arm_apcscc void @foo() nounwind {
|
||||
define void @foo() nounwind {
|
||||
entry:
|
||||
%0 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> undef, <2 x float> undef) nounwind ; <<2 x float>> [#uses=1]
|
||||
%tmp28 = extractelement <2 x float> %0, i32 0 ; <float> [#uses=1]
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
|
||||
target triple = "thumbv7-elf"
|
||||
|
||||
define arm_apcscc void @aaa() nounwind {
|
||||
define void @aaa() nounwind {
|
||||
entry:
|
||||
%0 = fmul <4 x float> undef, <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02, float 0x3EB0C6F7A0000000> ; <<4 x float>> [#uses=1]
|
||||
%tmp31 = extractelement <4 x float> %0, i32 0 ; <float> [#uses=1]
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
|
||||
%struct.A = type { i32* }
|
||||
|
||||
define arm_apcscc void @"\01-[MyFunction Name:]"() {
|
||||
define void @"\01-[MyFunction Name:]"() {
|
||||
entry:
|
||||
%save_filt.1 = alloca i32 ; <i32*> [#uses=2]
|
||||
%save_eptr.0 = alloca i8* ; <i8**> [#uses=2]
|
||||
@ -10,12 +10,12 @@ entry:
|
||||
%eh_exception = alloca i8* ; <i8**> [#uses=5]
|
||||
%eh_selector = alloca i32 ; <i32*> [#uses=3]
|
||||
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
|
||||
call arm_apcscc void @_ZN1AC1Ev(%struct.A* %a)
|
||||
invoke arm_apcscc void @_Z3barv()
|
||||
call void @_ZN1AC1Ev(%struct.A* %a)
|
||||
invoke void @_Z3barv()
|
||||
to label %invcont unwind label %lpad
|
||||
|
||||
invcont: ; preds = %entry
|
||||
call arm_apcscc void @_ZN1AD1Ev(%struct.A* %a) nounwind
|
||||
call void @_ZN1AD1Ev(%struct.A* %a) nounwind
|
||||
br label %return
|
||||
|
||||
bb: ; preds = %ppad
|
||||
@ -23,7 +23,7 @@ bb: ; preds = %ppad
|
||||
store i32 %eh_select, i32* %save_filt.1, align 4
|
||||
%eh_value = load i8** %eh_exception ; <i8*> [#uses=1]
|
||||
store i8* %eh_value, i8** %save_eptr.0, align 4
|
||||
call arm_apcscc void @_ZN1AD1Ev(%struct.A* %a) nounwind
|
||||
call void @_ZN1AD1Ev(%struct.A* %a) nounwind
|
||||
%0 = load i8** %save_eptr.0, align 4 ; <i8*> [#uses=1]
|
||||
store i8* %0, i8** %eh_exception, align 4
|
||||
%1 = load i32* %save_filt.1, align 4 ; <i32> [#uses=1]
|
||||
@ -46,16 +46,16 @@ ppad: ; preds = %lpad
|
||||
|
||||
Unwind: ; preds = %bb
|
||||
%eh_ptr3 = load i8** %eh_exception ; <i8*> [#uses=1]
|
||||
call arm_apcscc void @_Unwind_SjLj_Resume(i8* %eh_ptr3)
|
||||
call void @_Unwind_SjLj_Resume(i8* %eh_ptr3)
|
||||
unreachable
|
||||
}
|
||||
|
||||
define linkonce_odr arm_apcscc void @_ZN1AC1Ev(%struct.A* %this) {
|
||||
define linkonce_odr void @_ZN1AC1Ev(%struct.A* %this) {
|
||||
entry:
|
||||
%this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2]
|
||||
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
|
||||
store %struct.A* %this, %struct.A** %this_addr
|
||||
%0 = call arm_apcscc i8* @_Znwm(i32 4) ; <i8*> [#uses=1]
|
||||
%0 = call i8* @_Znwm(i32 4) ; <i8*> [#uses=1]
|
||||
%1 = bitcast i8* %0 to i32* ; <i32*> [#uses=1]
|
||||
%2 = load %struct.A** %this_addr, align 4 ; <%struct.A*> [#uses=1]
|
||||
%3 = getelementptr inbounds %struct.A* %2, i32 0, i32 0 ; <i32**> [#uses=1]
|
||||
@ -66,9 +66,9 @@ return: ; preds = %entry
|
||||
ret void
|
||||
}
|
||||
|
||||
declare arm_apcscc i8* @_Znwm(i32)
|
||||
declare i8* @_Znwm(i32)
|
||||
|
||||
define linkonce_odr arm_apcscc void @_ZN1AD1Ev(%struct.A* %this) nounwind {
|
||||
define linkonce_odr void @_ZN1AD1Ev(%struct.A* %this) nounwind {
|
||||
entry:
|
||||
%this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2]
|
||||
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
|
||||
@ -77,7 +77,7 @@ entry:
|
||||
%1 = getelementptr inbounds %struct.A* %0, i32 0, i32 0 ; <i32**> [#uses=1]
|
||||
%2 = load i32** %1, align 4 ; <i32*> [#uses=1]
|
||||
%3 = bitcast i32* %2 to i8* ; <i8*> [#uses=1]
|
||||
call arm_apcscc void @_ZdlPv(i8* %3) nounwind
|
||||
call void @_ZdlPv(i8* %3) nounwind
|
||||
br label %bb
|
||||
|
||||
bb: ; preds = %entry
|
||||
@ -88,9 +88,9 @@ return: ; preds = %bb
|
||||
}
|
||||
;CHECK: L_LSDA_0:
|
||||
|
||||
declare arm_apcscc void @_ZdlPv(i8*) nounwind
|
||||
declare void @_ZdlPv(i8*) nounwind
|
||||
|
||||
declare arm_apcscc void @_Z3barv()
|
||||
declare void @_Z3barv()
|
||||
|
||||
declare i8* @llvm.eh.exception() nounwind
|
||||
|
||||
@ -98,6 +98,6 @@ declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind
|
||||
|
||||
declare i32 @llvm.eh.typeid.for.i32(i8*) nounwind
|
||||
|
||||
declare arm_apcscc i32 @__gxx_personality_sj0(...)
|
||||
declare i32 @__gxx_personality_sj0(...)
|
||||
|
||||
declare arm_apcscc void @_Unwind_SjLj_Resume(i8*)
|
||||
declare void @_Unwind_SjLj_Resume(i8*)
|
||||
|
||||
@ -30,11 +30,11 @@ target triple = "thumbv7-apple-darwin9"
|
||||
@.str218 = private constant [6 x i8] c"%7d%c\00", align 1 ; <[6 x i8]*> [#uses=1]
|
||||
@.str319 = private constant [30 x i8] c"Failed to allocate %u bytes.\0A\00", align 1 ; <[30 x i8]*> [#uses=1]
|
||||
|
||||
declare arm_apcscc i32 @puts(i8* nocapture) nounwind
|
||||
declare i32 @puts(i8* nocapture) nounwind
|
||||
|
||||
declare arm_apcscc i32 @getchar() nounwind
|
||||
declare i32 @getchar() nounwind
|
||||
|
||||
define internal arm_apcscc i32 @transpose() nounwind readonly {
|
||||
define internal i32 @transpose() nounwind readonly {
|
||||
; CHECK: push
|
||||
entry:
|
||||
%0 = load i32* getelementptr inbounds ([128 x i32]* @columns, i32 0, i32 1), align 4 ; <i32> [#uses=1]
|
||||
@ -101,6 +101,6 @@ bb7: ; preds = %bb5
|
||||
ret i32 -128
|
||||
}
|
||||
|
||||
declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
|
||||
declare noalias i8* @calloc(i32, i32) nounwind
|
||||
|
||||
declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
|
||||
target triple = "thumbv7-elf"
|
||||
|
||||
define arm_apcscc void @foo() {
|
||||
define void @foo() {
|
||||
entry:
|
||||
%0 = insertelement <4 x i32> undef, i32 -1, i32 3
|
||||
store <4 x i32> %0, <4 x i32>* undef, align 16
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
|
||||
; pr4926
|
||||
|
||||
define arm_apcscc void @test_vget_lanep16() nounwind {
|
||||
define void @test_vget_lanep16() nounwind {
|
||||
entry:
|
||||
%arg0_poly16x4_t = alloca <4 x i16> ; <<4 x i16>*> [#uses=1]
|
||||
%out_poly16_t = alloca i16 ; <i16*> [#uses=1]
|
||||
|
||||
@ -6,7 +6,7 @@ target triple = "armv7-apple-darwin10"
|
||||
%struct.int16x8_t = type { <8 x i16> }
|
||||
%struct.int16x8x2_t = type { [2 x %struct.int16x8_t] }
|
||||
|
||||
define arm_apcscc void @t(%struct.int16x8x2_t* noalias nocapture sret %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind {
|
||||
define void @t(%struct.int16x8x2_t* noalias nocapture sret %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind {
|
||||
entry:
|
||||
;CHECK: vtrn.16
|
||||
%0 = shufflevector <8 x i16> %tmp.0, <8 x i16> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc -march=arm -mattr=+neon < %s
|
||||
; Radar 7770501: Don't crash on SELECT and SELECT_CC with NEON vector values.
|
||||
|
||||
define arm_apcscc void @vDSP_FFT16_copv(float* nocapture %O, float* nocapture %I, i32 %Direction) nounwind {
|
||||
define void @vDSP_FFT16_copv(float* nocapture %O, float* nocapture %I, i32 %Direction) nounwind {
|
||||
entry:
|
||||
%.22 = select i1 undef, <4 x float> undef, <4 x float> zeroinitializer ; <<4 x float>> [#uses=1]
|
||||
%0 = fadd <4 x float> undef, %.22 ; <<4 x float>> [#uses=1]
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8
|
||||
; Radar 7855014
|
||||
|
||||
define arm_apcscc void @test1(i32 %f0, i32 %f1, i32 %f2, <4 x i32> %f3) nounwind {
|
||||
define void @test1(i32 %f0, i32 %f1, i32 %f2, <4 x i32> %f3) nounwind {
|
||||
entry:
|
||||
unreachable
|
||||
}
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -march=arm -mcpu=arm1136jf-s
|
||||
; Radar 7854640
|
||||
|
||||
define arm_apcscc void @test() nounwind {
|
||||
define void @test() nounwind {
|
||||
bb:
|
||||
br i1 undef, label %bb9, label %bb10
|
||||
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-n32"
|
||||
target triple = "armv4t-apple-darwin10"
|
||||
|
||||
define hidden arm_apcscc i32 @__addvsi3(i32 %a, i32 %b) nounwind {
|
||||
define hidden i32 @__addvsi3(i32 %a, i32 %b) nounwind {
|
||||
entry:
|
||||
tail call void @llvm.dbg.value(metadata !{i32 %b}, i64 0, metadata !0)
|
||||
%0 = add nsw i32 %b, %a, !dbg !9 ; <i32> [#uses=1]
|
||||
|
||||
@ -10,7 +10,7 @@ target triple = "armv6-apple-darwin"
|
||||
|
||||
@.str = external constant [1 x i8] ; <[1 x i8]*> [#uses=1]
|
||||
|
||||
define arm_apcscc void @yy(%struct.q* %qq) nounwind {
|
||||
define void @yy(%struct.q* %qq) nounwind {
|
||||
entry:
|
||||
%vla6 = alloca i8, i32 undef, align 1 ; <i8*> [#uses=1]
|
||||
%vla10 = alloca i8, i32 undef, align 1 ; <i8*> [#uses=1]
|
||||
@ -19,18 +19,18 @@ entry:
|
||||
%tmp21 = load i32* undef ; <i32> [#uses=1]
|
||||
%0 = mul i32 1, %tmp21 ; <i32> [#uses=1]
|
||||
%vla22 = alloca i8, i32 %0, align 1 ; <i8*> [#uses=1]
|
||||
call arm_apcscc void (...)* @zz(i8* getelementptr inbounds ([1 x i8]* @.str, i32 0, i32 0), i32 2, i32 1)
|
||||
call void (...)* @zz(i8* getelementptr inbounds ([1 x i8]* @.str, i32 0, i32 0), i32 2, i32 1)
|
||||
br i1 undef, label %if.then, label %if.end36
|
||||
|
||||
if.then: ; preds = %entry
|
||||
%call = call arm_apcscc i32 (...)* @x(%struct.q* undef, i8* undef, i8* %vla6, i8* %vla10, i32 undef) ; <i32> [#uses=0]
|
||||
%call35 = call arm_apcscc i32 (...)* @x(%struct.q* undef, i8* %vla14, i8* %vla18, i8* %vla22, i32 undef) ; <i32> [#uses=0]
|
||||
%call = call i32 (...)* @x(%struct.q* undef, i8* undef, i8* %vla6, i8* %vla10, i32 undef) ; <i32> [#uses=0]
|
||||
%call35 = call i32 (...)* @x(%struct.q* undef, i8* %vla14, i8* %vla18, i8* %vla22, i32 undef) ; <i32> [#uses=0]
|
||||
unreachable
|
||||
|
||||
if.end36: ; preds = %entry
|
||||
ret void
|
||||
}
|
||||
|
||||
declare arm_apcscc void @zz(...)
|
||||
declare void @zz(...)
|
||||
|
||||
declare arm_apcscc i32 @x(...)
|
||||
declare i32 @x(...)
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
|
||||
%struct.foo = type { i64, i64 }
|
||||
|
||||
define arm_apcscc zeroext i8 @t(%struct.foo* %this) noreturn optsize {
|
||||
define zeroext i8 @t(%struct.foo* %this) noreturn optsize {
|
||||
entry:
|
||||
; ARM: t:
|
||||
; ARM: str r0, [r1], r0
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
|
||||
; Radar 7872877
|
||||
|
||||
define arm_apcscc void @test(float* %fltp, i32 %packedValue, float* %table) nounwind {
|
||||
define void @test(float* %fltp, i32 %packedValue, float* %table) nounwind {
|
||||
entry:
|
||||
%0 = load float* %fltp
|
||||
%1 = insertelement <4 x float> undef, float %0, i32 0
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
|
||||
%struct.__int8x8x2_t = type { [2 x <8 x i8>] }
|
||||
|
||||
define arm_apcscc void @foo(%struct.__int8x8x2_t* nocapture %a, i8* %b) nounwind {
|
||||
define void @foo(%struct.__int8x8x2_t* nocapture %a, i8* %b) nounwind {
|
||||
entry:
|
||||
%0 = bitcast %struct.__int8x8x2_t* %a to i128* ; <i128*> [#uses=1]
|
||||
%srcval = load i128* %0, align 8 ; <i128> [#uses=2]
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
; rdar://8015977
|
||||
; rdar://8020118
|
||||
|
||||
define arm_apcscc i8* @rt0(i32 %x) nounwind readnone {
|
||||
define i8* @rt0(i32 %x) nounwind readnone {
|
||||
entry:
|
||||
; CHECK: rt0:
|
||||
; CHECK: mov r0, lr
|
||||
@ -11,7 +11,7 @@ entry:
|
||||
ret i8* %0
|
||||
}
|
||||
|
||||
define arm_apcscc i8* @rt2() nounwind readnone {
|
||||
define i8* @rt2() nounwind readnone {
|
||||
entry:
|
||||
; CHECK: rt2:
|
||||
; CHECK: ldr r0, [r7]
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; RUN: llc < %s -march=arm -mattr=+vfp3 | FileCheck %s
|
||||
|
||||
define arm_apcscc float @t1(float %x) nounwind readnone optsize {
|
||||
define float @t1(float %x) nounwind readnone optsize {
|
||||
entry:
|
||||
; CHECK: t1:
|
||||
; CHECK: vmov.f32 s1, #4.000000e+00
|
||||
@ -8,7 +8,7 @@ entry:
|
||||
ret float %0
|
||||
}
|
||||
|
||||
define arm_apcscc double @t2(double %x) nounwind readnone optsize {
|
||||
define double @t2(double %x) nounwind readnone optsize {
|
||||
entry:
|
||||
; CHECK: t2:
|
||||
; CHECK: vmov.f64 d1, #3.000000e+00
|
||||
@ -16,7 +16,7 @@ entry:
|
||||
ret double %0
|
||||
}
|
||||
|
||||
define arm_apcscc double @t3(double %x) nounwind readnone optsize {
|
||||
define double @t3(double %x) nounwind readnone optsize {
|
||||
entry:
|
||||
; CHECK: t3:
|
||||
; CHECK: vmov.f64 d1, #-1.300000e+01
|
||||
@ -24,7 +24,7 @@ entry:
|
||||
ret double %0
|
||||
}
|
||||
|
||||
define arm_apcscc float @t4(float %x) nounwind readnone optsize {
|
||||
define float @t4(float %x) nounwind readnone optsize {
|
||||
entry:
|
||||
; CHECK: t4:
|
||||
; CHECK: vmov.f32 s1, #-2.400000e+01
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
@nextaddr = global i8* null ; <i8**> [#uses=2]
|
||||
@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
|
||||
|
||||
define internal arm_apcscc i32 @foo(i32 %i) nounwind {
|
||||
define internal i32 @foo(i32 %i) nounwind {
|
||||
; ARM: foo:
|
||||
; THUMB: foo:
|
||||
; THUMB2: foo:
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
; Radar 7449043
|
||||
%struct.int32x4_t = type { <4 x i32> }
|
||||
|
||||
define arm_apcscc void @t() nounwind {
|
||||
define void @t() nounwind {
|
||||
entry:
|
||||
; CHECK: vmov.I64 q15, #0
|
||||
; CHECK: vmov.32 d30[0], r0
|
||||
@ -16,7 +16,7 @@ entry:
|
||||
; Radar 7457110
|
||||
%struct.int32x2_t = type { <4 x i32> }
|
||||
|
||||
define arm_apcscc void @t2() nounwind {
|
||||
define void @t2() nounwind {
|
||||
entry:
|
||||
; CHECK: vmov d30, d0
|
||||
; CHECK: vmov.32 r0, d30[0]
|
||||
|
||||
@ -40,7 +40,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-
|
||||
%22 = type { void (%0*)*, void (%0*, i8***, i32, i8**, i32)* }
|
||||
%23 = type { void (%0*, i32)*, void (%0*, i8**, i8**, i32)*, void (%0*)*, void (%0*)* }
|
||||
|
||||
define arm_apcscc void @test(%0* nocapture %a0, %11* nocapture %a1, i16* nocapture %a2, i8** nocapture %a3, i32 %a4) nounwind {
|
||||
define void @test(%0* nocapture %a0, %11* nocapture %a1, i16* nocapture %a2, i8** nocapture %a3, i32 %a4) nounwind {
|
||||
bb:
|
||||
%t = alloca [64 x float], align 4
|
||||
%t5 = getelementptr inbounds %0* %a0, i32 0, i32 65
|
||||
@ -393,7 +393,7 @@ bb295:
|
||||
%struct.z_stream = type { i8*, i32, i32, i8*, i32, i32, i8*, %struct.internal_state*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i8*, i32, i32, i32 }
|
||||
%union.anon = type { i16 }
|
||||
|
||||
define arm_apcscc i32 @longest_match(%struct.internal_state* %s, i32 %cur_match) nounwind optsize {
|
||||
define i32 @longest_match(%struct.internal_state* %s, i32 %cur_match) nounwind optsize {
|
||||
entry:
|
||||
%0 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 31 ; <i32*> [#uses=1]
|
||||
%1 = load i32* %0, align 4 ; <i32> [#uses=2]
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
%struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
|
||||
%struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> }
|
||||
|
||||
define arm_apcscc void @t1(i16* %i_ptr, i16* %o_ptr, %struct.int32x4_t* nocapture %vT0ptr, %struct.int32x4_t* nocapture %vT1ptr) nounwind {
|
||||
define void @t1(i16* %i_ptr, i16* %o_ptr, %struct.int32x4_t* nocapture %vT0ptr, %struct.int32x4_t* nocapture %vT1ptr) nounwind {
|
||||
entry:
|
||||
; CHECK: t1:
|
||||
; CHECK: vld1.16
|
||||
@ -41,7 +41,7 @@ entry:
|
||||
ret void
|
||||
}
|
||||
|
||||
define arm_apcscc void @t2(i16* %i_ptr, i16* %o_ptr, %struct.int16x8_t* nocapture %vT0ptr, %struct.int16x8_t* nocapture %vT1ptr) nounwind {
|
||||
define void @t2(i16* %i_ptr, i16* %o_ptr, %struct.int16x8_t* nocapture %vT0ptr, %struct.int16x8_t* nocapture %vT1ptr) nounwind {
|
||||
entry:
|
||||
; CHECK: t2:
|
||||
; CHECK: vld1.16
|
||||
@ -88,7 +88,7 @@ define <8 x i8> @t3(i8* %A, i8* %B) nounwind {
|
||||
ret <8 x i8> %tmp4
|
||||
}
|
||||
|
||||
define arm_apcscc void @t4(i32* %in, i32* %out) nounwind {
|
||||
define void @t4(i32* %in, i32* %out) nounwind {
|
||||
entry:
|
||||
; CHECK: t4:
|
||||
; CHECK: vld2.32
|
||||
@ -163,7 +163,7 @@ define <8 x i8> @t6(i8* %A, <8 x i8>* %B) nounwind {
|
||||
ret <8 x i8> %tmp5
|
||||
}
|
||||
|
||||
define arm_apcscc void @t7(i32* %iptr, i32* %optr) nounwind {
|
||||
define void @t7(i32* %iptr, i32* %optr) nounwind {
|
||||
entry:
|
||||
; CHECK: t7:
|
||||
; CHECK: vld2.32
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -stats -info-output-file - | grep "Number of re-materialization"
|
||||
|
||||
define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind {
|
||||
define i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind {
|
||||
entry:
|
||||
br i1 undef, label %smvp.exit, label %bb.i3
|
||||
|
||||
@ -25,7 +25,7 @@ bb142: ; preds = %bb.nph218.bb.nph218
|
||||
br i1 %14, label %phi1.exit, label %bb.i35
|
||||
|
||||
bb.i35: ; preds = %bb142
|
||||
%5 = call arm_apcscc double @sin(double %15) nounwind readonly ; <double> [#uses=1]
|
||||
%5 = call double @sin(double %15) nounwind readonly ; <double> [#uses=1]
|
||||
%6 = fmul double %5, 0x4031740AFA84AD8A ; <double> [#uses=1]
|
||||
%7 = fsub double 1.000000e+00, undef ; <double> [#uses=1]
|
||||
%8 = fdiv double %7, 6.000000e-01 ; <double> [#uses=1]
|
||||
@ -62,4 +62,4 @@ bb166: ; preds = %bb127
|
||||
unreachable
|
||||
}
|
||||
|
||||
declare arm_apcscc double @sin(double) nounwind readonly
|
||||
declare double @sin(double) nounwind readonly
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM
|
||||
; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=T2
|
||||
|
||||
define arm_apcscc i32 @t1(i32 %c) nounwind readnone {
|
||||
define i32 @t1(i32 %c) nounwind readnone {
|
||||
entry:
|
||||
; ARM: t1:
|
||||
; ARM: mov r1, #101
|
||||
@ -17,7 +17,7 @@ entry:
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
define arm_apcscc i32 @t2(i32 %c) nounwind readnone {
|
||||
define i32 @t2(i32 %c) nounwind readnone {
|
||||
entry:
|
||||
; ARM: t2:
|
||||
; ARM: mov r1, #101
|
||||
@ -33,7 +33,7 @@ entry:
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
define arm_apcscc i32 @t3(i32 %a) nounwind readnone {
|
||||
define i32 @t3(i32 %a) nounwind readnone {
|
||||
entry:
|
||||
; ARM: t3:
|
||||
; ARM: mov r0, #0
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
|
||||
declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
|
||||
|
||||
define arm_apcscc void @aaa(%quuz* %this, i8* %block) {
|
||||
define void @aaa(%quuz* %this, i8* %block) {
|
||||
; CHECK: aaa:
|
||||
; CHECK: bic sp, sp, #15
|
||||
; CHECK: vst1.64 {{.*}}sp, :128
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -march=arm | FileCheck %s
|
||||
; rdar://7961298
|
||||
|
||||
define arm_apcscc void @t() nounwind {
|
||||
define void @t() nounwind {
|
||||
entry:
|
||||
; CHECK: t:
|
||||
; CHECK: trap
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
|
||||
; rdar://7113725
|
||||
|
||||
define arm_apcscc void @t(i8* nocapture %a, i8* nocapture %b) nounwind {
|
||||
define void @t(i8* nocapture %a, i8* nocapture %b) nounwind {
|
||||
entry:
|
||||
; GENERIC: t:
|
||||
; GENERIC: ldrb r2
|
||||
|
||||
@ -244,25 +244,25 @@ define <4 x float> @vduplaneQfloat(<2 x float>* %A) nounwind {
|
||||
ret <4 x float> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <2 x i64> @foo(<2 x i64> %arg0_int64x1_t) nounwind readnone {
|
||||
define <2 x i64> @foo(<2 x i64> %arg0_int64x1_t) nounwind readnone {
|
||||
entry:
|
||||
%0 = shufflevector <2 x i64> %arg0_int64x1_t, <2 x i64> undef, <2 x i32> <i32 1, i32 1>
|
||||
ret <2 x i64> %0
|
||||
}
|
||||
|
||||
define arm_apcscc <2 x i64> @bar(<2 x i64> %arg0_int64x1_t) nounwind readnone {
|
||||
define <2 x i64> @bar(<2 x i64> %arg0_int64x1_t) nounwind readnone {
|
||||
entry:
|
||||
%0 = shufflevector <2 x i64> %arg0_int64x1_t, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
|
||||
ret <2 x i64> %0
|
||||
}
|
||||
|
||||
define arm_apcscc <2 x double> @baz(<2 x double> %arg0_int64x1_t) nounwind readnone {
|
||||
define <2 x double> @baz(<2 x double> %arg0_int64x1_t) nounwind readnone {
|
||||
entry:
|
||||
%0 = shufflevector <2 x double> %arg0_int64x1_t, <2 x double> undef, <2 x i32> <i32 1, i32 1>
|
||||
ret <2 x double> %0
|
||||
}
|
||||
|
||||
define arm_apcscc <2 x double> @qux(<2 x double> %arg0_int64x1_t) nounwind readnone {
|
||||
define <2 x double> @qux(<2 x double> %arg0_int64x1_t) nounwind readnone {
|
||||
entry:
|
||||
%0 = shufflevector <2 x double> %arg0_int64x1_t, <2 x double> undef, <2 x i32> <i32 0, i32 0>
|
||||
ret <2 x double> %0
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
|
||||
|
||||
define arm_apcscc <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
|
||||
define <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
|
||||
;CHECK: test_vextd:
|
||||
;CHECK: vext
|
||||
%tmp1 = load <8 x i8>* %A
|
||||
@ -9,7 +9,7 @@ define arm_apcscc <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
|
||||
ret <8 x i8> %tmp3
|
||||
}
|
||||
|
||||
define arm_apcscc <8 x i8> @test_vextRd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
|
||||
define <8 x i8> @test_vextRd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
|
||||
;CHECK: test_vextRd:
|
||||
;CHECK: vext
|
||||
%tmp1 = load <8 x i8>* %A
|
||||
@ -18,7 +18,7 @@ define arm_apcscc <8 x i8> @test_vextRd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
|
||||
ret <8 x i8> %tmp3
|
||||
}
|
||||
|
||||
define arm_apcscc <16 x i8> @test_vextq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
|
||||
define <16 x i8> @test_vextq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
|
||||
;CHECK: test_vextq:
|
||||
;CHECK: vext
|
||||
%tmp1 = load <16 x i8>* %A
|
||||
@ -27,7 +27,7 @@ define arm_apcscc <16 x i8> @test_vextq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
|
||||
ret <16 x i8> %tmp3
|
||||
}
|
||||
|
||||
define arm_apcscc <16 x i8> @test_vextRq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
|
||||
define <16 x i8> @test_vextRq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
|
||||
;CHECK: test_vextRq:
|
||||
;CHECK: vext
|
||||
%tmp1 = load <16 x i8>* %A
|
||||
@ -36,7 +36,7 @@ define arm_apcscc <16 x i8> @test_vextRq(<16 x i8>* %A, <16 x i8>* %B) nounwind
|
||||
ret <16 x i8> %tmp3
|
||||
}
|
||||
|
||||
define arm_apcscc <4 x i16> @test_vextd16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
|
||||
define <4 x i16> @test_vextd16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
|
||||
;CHECK: test_vextd16:
|
||||
;CHECK: vext
|
||||
%tmp1 = load <4 x i16>* %A
|
||||
@ -45,7 +45,7 @@ define arm_apcscc <4 x i16> @test_vextd16(<4 x i16>* %A, <4 x i16>* %B) nounwind
|
||||
ret <4 x i16> %tmp3
|
||||
}
|
||||
|
||||
define arm_apcscc <4 x i32> @test_vextq32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
|
||||
define <4 x i32> @test_vextq32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
|
||||
;CHECK: test_vextq32:
|
||||
;CHECK: vext
|
||||
%tmp1 = load <4 x i32>* %A
|
||||
|
||||
@ -136,7 +136,7 @@ define <2 x i64> @v_movQi64() nounwind {
|
||||
|
||||
; Check for correct assembler printing for immediate values.
|
||||
%struct.int8x8_t = type { <8 x i8> }
|
||||
define arm_apcscc void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
|
||||
define void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
|
||||
entry:
|
||||
;CHECK: vdupn128:
|
||||
;CHECK: vmov.i8 d0, #0x80
|
||||
@ -145,7 +145,7 @@ entry:
|
||||
ret void
|
||||
}
|
||||
|
||||
define arm_apcscc void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
|
||||
define void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
|
||||
entry:
|
||||
;CHECK: vdupnneg75:
|
||||
;CHECK: vmov.i8 d0, #0xB5
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
|
||||
|
||||
define arm_apcscc <8 x i8> @test_vrev64D8(<8 x i8>* %A) nounwind {
|
||||
define <8 x i8> @test_vrev64D8(<8 x i8>* %A) nounwind {
|
||||
;CHECK: test_vrev64D8:
|
||||
;CHECK: vrev64.8
|
||||
%tmp1 = load <8 x i8>* %A
|
||||
@ -8,7 +8,7 @@ define arm_apcscc <8 x i8> @test_vrev64D8(<8 x i8>* %A) nounwind {
|
||||
ret <8 x i8> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <4 x i16> @test_vrev64D16(<4 x i16>* %A) nounwind {
|
||||
define <4 x i16> @test_vrev64D16(<4 x i16>* %A) nounwind {
|
||||
;CHECK: test_vrev64D16:
|
||||
;CHECK: vrev64.16
|
||||
%tmp1 = load <4 x i16>* %A
|
||||
@ -16,7 +16,7 @@ define arm_apcscc <4 x i16> @test_vrev64D16(<4 x i16>* %A) nounwind {
|
||||
ret <4 x i16> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <2 x i32> @test_vrev64D32(<2 x i32>* %A) nounwind {
|
||||
define <2 x i32> @test_vrev64D32(<2 x i32>* %A) nounwind {
|
||||
;CHECK: test_vrev64D32:
|
||||
;CHECK: vrev64.32
|
||||
%tmp1 = load <2 x i32>* %A
|
||||
@ -24,7 +24,7 @@ define arm_apcscc <2 x i32> @test_vrev64D32(<2 x i32>* %A) nounwind {
|
||||
ret <2 x i32> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <2 x float> @test_vrev64Df(<2 x float>* %A) nounwind {
|
||||
define <2 x float> @test_vrev64Df(<2 x float>* %A) nounwind {
|
||||
;CHECK: test_vrev64Df:
|
||||
;CHECK: vrev64.32
|
||||
%tmp1 = load <2 x float>* %A
|
||||
@ -32,7 +32,7 @@ define arm_apcscc <2 x float> @test_vrev64Df(<2 x float>* %A) nounwind {
|
||||
ret <2 x float> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <16 x i8> @test_vrev64Q8(<16 x i8>* %A) nounwind {
|
||||
define <16 x i8> @test_vrev64Q8(<16 x i8>* %A) nounwind {
|
||||
;CHECK: test_vrev64Q8:
|
||||
;CHECK: vrev64.8
|
||||
%tmp1 = load <16 x i8>* %A
|
||||
@ -40,7 +40,7 @@ define arm_apcscc <16 x i8> @test_vrev64Q8(<16 x i8>* %A) nounwind {
|
||||
ret <16 x i8> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <8 x i16> @test_vrev64Q16(<8 x i16>* %A) nounwind {
|
||||
define <8 x i16> @test_vrev64Q16(<8 x i16>* %A) nounwind {
|
||||
;CHECK: test_vrev64Q16:
|
||||
;CHECK: vrev64.16
|
||||
%tmp1 = load <8 x i16>* %A
|
||||
@ -48,7 +48,7 @@ define arm_apcscc <8 x i16> @test_vrev64Q16(<8 x i16>* %A) nounwind {
|
||||
ret <8 x i16> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <4 x i32> @test_vrev64Q32(<4 x i32>* %A) nounwind {
|
||||
define <4 x i32> @test_vrev64Q32(<4 x i32>* %A) nounwind {
|
||||
;CHECK: test_vrev64Q32:
|
||||
;CHECK: vrev64.32
|
||||
%tmp1 = load <4 x i32>* %A
|
||||
@ -56,7 +56,7 @@ define arm_apcscc <4 x i32> @test_vrev64Q32(<4 x i32>* %A) nounwind {
|
||||
ret <4 x i32> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <4 x float> @test_vrev64Qf(<4 x float>* %A) nounwind {
|
||||
define <4 x float> @test_vrev64Qf(<4 x float>* %A) nounwind {
|
||||
;CHECK: test_vrev64Qf:
|
||||
;CHECK: vrev64.32
|
||||
%tmp1 = load <4 x float>* %A
|
||||
@ -64,7 +64,7 @@ define arm_apcscc <4 x float> @test_vrev64Qf(<4 x float>* %A) nounwind {
|
||||
ret <4 x float> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <8 x i8> @test_vrev32D8(<8 x i8>* %A) nounwind {
|
||||
define <8 x i8> @test_vrev32D8(<8 x i8>* %A) nounwind {
|
||||
;CHECK: test_vrev32D8:
|
||||
;CHECK: vrev32.8
|
||||
%tmp1 = load <8 x i8>* %A
|
||||
@ -72,7 +72,7 @@ define arm_apcscc <8 x i8> @test_vrev32D8(<8 x i8>* %A) nounwind {
|
||||
ret <8 x i8> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <4 x i16> @test_vrev32D16(<4 x i16>* %A) nounwind {
|
||||
define <4 x i16> @test_vrev32D16(<4 x i16>* %A) nounwind {
|
||||
;CHECK: test_vrev32D16:
|
||||
;CHECK: vrev32.16
|
||||
%tmp1 = load <4 x i16>* %A
|
||||
@ -80,7 +80,7 @@ define arm_apcscc <4 x i16> @test_vrev32D16(<4 x i16>* %A) nounwind {
|
||||
ret <4 x i16> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <16 x i8> @test_vrev32Q8(<16 x i8>* %A) nounwind {
|
||||
define <16 x i8> @test_vrev32Q8(<16 x i8>* %A) nounwind {
|
||||
;CHECK: test_vrev32Q8:
|
||||
;CHECK: vrev32.8
|
||||
%tmp1 = load <16 x i8>* %A
|
||||
@ -88,7 +88,7 @@ define arm_apcscc <16 x i8> @test_vrev32Q8(<16 x i8>* %A) nounwind {
|
||||
ret <16 x i8> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <8 x i16> @test_vrev32Q16(<8 x i16>* %A) nounwind {
|
||||
define <8 x i16> @test_vrev32Q16(<8 x i16>* %A) nounwind {
|
||||
;CHECK: test_vrev32Q16:
|
||||
;CHECK: vrev32.16
|
||||
%tmp1 = load <8 x i16>* %A
|
||||
@ -96,7 +96,7 @@ define arm_apcscc <8 x i16> @test_vrev32Q16(<8 x i16>* %A) nounwind {
|
||||
ret <8 x i16> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <8 x i8> @test_vrev16D8(<8 x i8>* %A) nounwind {
|
||||
define <8 x i8> @test_vrev16D8(<8 x i8>* %A) nounwind {
|
||||
;CHECK: test_vrev16D8:
|
||||
;CHECK: vrev16.8
|
||||
%tmp1 = load <8 x i8>* %A
|
||||
@ -104,7 +104,7 @@ define arm_apcscc <8 x i8> @test_vrev16D8(<8 x i8>* %A) nounwind {
|
||||
ret <8 x i8> %tmp2
|
||||
}
|
||||
|
||||
define arm_apcscc <16 x i8> @test_vrev16Q8(<16 x i8>* %A) nounwind {
|
||||
define <16 x i8> @test_vrev16Q8(<16 x i8>* %A) nounwind {
|
||||
;CHECK: test_vrev16Q8:
|
||||
;CHECK: vrev16.8
|
||||
%tmp1 = load <16 x i8>* %A
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
|
||||
@.str = private constant [1 x i8] c" "
|
||||
|
||||
define arm_apcscc void @t(%0) nounwind {
|
||||
define void @t(%0) nounwind {
|
||||
entry:
|
||||
%arg0 = alloca %union.T0
|
||||
%1 = bitcast %union.T0* %arg0 to %0*
|
||||
@ -14,4 +14,4 @@ entry:
|
||||
ret void
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @printf(i8*, ...)
|
||||
declare i32 @printf(i8*, ...)
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -mtriple=thumbv6-elf | not grep "subs sp"
|
||||
; PR4567
|
||||
|
||||
define arm_apcscc i8* @__gets_chk(i8* %s, i32 %slen) nounwind {
|
||||
define i8* @__gets_chk(i8* %s, i32 %slen) nounwind {
|
||||
entry:
|
||||
br i1 undef, label %bb, label %bb1
|
||||
|
||||
@ -23,11 +23,11 @@ bb4: ; preds = %bb3, %bb2
|
||||
br i1 undef, label %bb5, label %bb6
|
||||
|
||||
bb5: ; preds = %bb4
|
||||
%2 = call arm_apcscc i8* @gets(i8* %s) nounwind ; <i8*> [#uses=1]
|
||||
%2 = call i8* @gets(i8* %s) nounwind ; <i8*> [#uses=1]
|
||||
ret i8* %2
|
||||
|
||||
bb6: ; preds = %bb4
|
||||
unreachable
|
||||
}
|
||||
|
||||
declare arm_apcscc i8* @gets(i8*) nounwind
|
||||
declare i8* @gets(i8*) nounwind
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
|
||||
@Time.2535 = external global i64 ; <i64*> [#uses=2]
|
||||
|
||||
define arm_apcscc i64 @millisecs() nounwind {
|
||||
define i64 @millisecs() nounwind {
|
||||
entry:
|
||||
%0 = load i64* @Time.2535, align 4 ; <i64> [#uses=2]
|
||||
%1 = add i64 %0, 1 ; <i64> [#uses=1]
|
||||
|
||||
@ -4,10 +4,10 @@
|
||||
%struct.List = type { i32, i32* }
|
||||
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @main to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
|
||||
|
||||
define arm_apcscc i32 @main() nounwind {
|
||||
define i32 @main() nounwind {
|
||||
entry:
|
||||
%ll = alloca %struct.LinkList*, align 4 ; <%struct.LinkList**> [#uses=1]
|
||||
%0 = call arm_apcscc i32 @ReadList(%struct.LinkList** %ll, %struct.List** null) nounwind ; <i32> [#uses=1]
|
||||
%0 = call i32 @ReadList(%struct.LinkList** %ll, %struct.List** null) nounwind ; <i32> [#uses=1]
|
||||
switch i32 %0, label %bb5 [
|
||||
i32 7, label %bb4
|
||||
i32 42, label %bb3
|
||||
@ -23,4 +23,4 @@ bb5: ; preds = %entry
|
||||
ret i32 1
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @ReadList(%struct.LinkList** nocapture, %struct.List** nocapture) nounwind
|
||||
declare i32 @ReadList(%struct.LinkList** nocapture, %struct.List** nocapture) nounwind
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
|
||||
%struct.BF_KEY = type { [18 x i32], [1024 x i32] }
|
||||
|
||||
define arm_apcscc void @BF_encrypt(i32* nocapture %data, %struct.BF_KEY* nocapture %key, i32 %encrypt) nounwind {
|
||||
define void @BF_encrypt(i32* nocapture %data, %struct.BF_KEY* nocapture %key, i32 %encrypt) nounwind {
|
||||
entry:
|
||||
%0 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 0; <i32*> [#uses=2]
|
||||
%1 = load i32* %data, align 4 ; <i32> [#uses=2]
|
||||
|
||||
@ -3,15 +3,15 @@
|
||||
%struct.vorbis_comment = type { i8**, i32*, i32, i8* }
|
||||
@.str16 = external constant [2 x i8], align 1 ; <[2 x i8]*> [#uses=1]
|
||||
|
||||
declare arm_apcscc i8* @__strcpy_chk(i8*, i8*, i32) nounwind
|
||||
declare i8* @__strcpy_chk(i8*, i8*, i32) nounwind
|
||||
|
||||
declare arm_apcscc i8* @__strcat_chk(i8*, i8*, i32) nounwind
|
||||
declare i8* @__strcat_chk(i8*, i8*, i32) nounwind
|
||||
|
||||
define arm_apcscc i8* @vorbis_comment_query(%struct.vorbis_comment* nocapture %vc, i8* %tag, i32 %count) nounwind {
|
||||
define i8* @vorbis_comment_query(%struct.vorbis_comment* nocapture %vc, i8* %tag, i32 %count) nounwind {
|
||||
entry:
|
||||
%0 = alloca i8, i32 undef, align 4 ; <i8*> [#uses=2]
|
||||
%1 = call arm_apcscc i8* @__strcpy_chk(i8* %0, i8* %tag, i32 -1) nounwind; <i8*> [#uses=0]
|
||||
%2 = call arm_apcscc i8* @__strcat_chk(i8* %0, i8* getelementptr ([2 x i8]* @.str16, i32 0, i32 0), i32 -1) nounwind; <i8*> [#uses=0]
|
||||
%1 = call i8* @__strcpy_chk(i8* %0, i8* %tag, i32 -1) nounwind; <i8*> [#uses=0]
|
||||
%2 = call i8* @__strcat_chk(i8* %0, i8* getelementptr ([2 x i8]* @.str16, i32 0, i32 0), i32 -1) nounwind; <i8*> [#uses=0]
|
||||
%3 = getelementptr %struct.vorbis_comment* %vc, i32 0, i32 0; <i8***> [#uses=1]
|
||||
br label %bb11
|
||||
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
|
||||
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.asl_file_t*, i64, i64*)* @t to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
|
||||
|
||||
define arm_apcscc i32 @t(%struct.asl_file_t* %s, i64 %off, i64* %out) nounwind optsize {
|
||||
define i32 @t(%struct.asl_file_t* %s, i64 %off, i64* %out) nounwind optsize {
|
||||
; CHECK: t:
|
||||
; CHECK: adds r0, #8
|
||||
entry:
|
||||
@ -32,7 +32,7 @@ bb3: ; preds = %bb1
|
||||
br i1 %8, label %bb13, label %bb5
|
||||
|
||||
bb5: ; preds = %bb3
|
||||
%9 = call arm_apcscc i32 @fseeko(%struct.FILE* %2, i64 %off, i32 0) nounwind ; <i32> [#uses=1]
|
||||
%9 = call i32 @fseeko(%struct.FILE* %2, i64 %off, i32 0) nounwind ; <i32> [#uses=1]
|
||||
%10 = icmp eq i32 %9, 0 ; <i1> [#uses=1]
|
||||
br i1 %10, label %bb7, label %bb13
|
||||
|
||||
@ -40,7 +40,7 @@ bb7: ; preds = %bb5
|
||||
store i64 0, i64* %val, align 4
|
||||
%11 = load %struct.FILE** %1, align 4 ; <%struct.FILE*> [#uses=1]
|
||||
%val8 = bitcast i64* %val to i8* ; <i8*> [#uses=1]
|
||||
%12 = call arm_apcscc i32 @fread(i8* noalias %val8, i32 8, i32 1, %struct.FILE* noalias %11) nounwind ; <i32> [#uses=1]
|
||||
%12 = call i32 @fread(i8* noalias %val8, i32 8, i32 1, %struct.FILE* noalias %11) nounwind ; <i32> [#uses=1]
|
||||
%13 = icmp eq i32 %12, 1 ; <i1> [#uses=1]
|
||||
br i1 %13, label %bb10, label %bb13
|
||||
|
||||
@ -50,7 +50,7 @@ bb10: ; preds = %bb7
|
||||
|
||||
bb11: ; preds = %bb10
|
||||
%15 = load i64* %val, align 4 ; <i64> [#uses=1]
|
||||
%16 = call arm_apcscc i64 @asl_core_ntohq(i64 %15) nounwind ; <i64> [#uses=1]
|
||||
%16 = call i64 @asl_core_ntohq(i64 %15) nounwind ; <i64> [#uses=1]
|
||||
store i64 %16, i64* %out, align 4
|
||||
ret i32 0
|
||||
|
||||
@ -59,8 +59,8 @@ bb13: ; preds = %bb10, %bb7, %bb5, %
|
||||
ret i32 %.0
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @fseeko(%struct.FILE* nocapture, i64, i32) nounwind
|
||||
declare i32 @fseeko(%struct.FILE* nocapture, i64, i32) nounwind
|
||||
|
||||
declare arm_apcscc i32 @fread(i8* noalias nocapture, i32, i32, %struct.FILE* noalias nocapture) nounwind
|
||||
declare i32 @fread(i8* noalias nocapture, i32, i32, %struct.FILE* noalias nocapture) nounwind
|
||||
|
||||
declare arm_apcscc i64 @asl_core_ntohq(i64)
|
||||
declare i64 @asl_core_ntohq(i64)
|
||||
|
||||
@ -10,7 +10,7 @@ target triple = "thumbv7-apple-darwin10"
|
||||
@codetable.2928 = internal constant [5 x i8*] [i8* blockaddress(@interpret_threaded, %RETURN), i8* blockaddress(@interpret_threaded, %INCREMENT), i8* blockaddress(@interpret_threaded, %DECREMENT), i8* blockaddress(@interpret_threaded, %DOUBLE), i8* blockaddress(@interpret_threaded, %SWAPWORD)] ; <[5 x i8*]*> [#uses=5]
|
||||
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i8*)* @interpret_threaded to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
|
||||
|
||||
define arm_apcscc i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
|
||||
define i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
|
||||
entry:
|
||||
%0 = load i8* %opcodes, align 1 ; <i8> [#uses=1]
|
||||
%1 = zext i8 %0 to i32 ; <i32> [#uses=1]
|
||||
|
||||
@ -4,10 +4,10 @@ target triple = "thumbv6-apple-darwin10"
|
||||
|
||||
@fred = internal global i32 0 ; <i32*> [#uses=1]
|
||||
|
||||
define arm_apcscc void @foo() nounwind {
|
||||
define void @foo() nounwind {
|
||||
entry:
|
||||
; CHECK: str r0, [sp
|
||||
%0 = call arm_apcscc i32 (...)* @bar() nounwind ; <i32> [#uses=1]
|
||||
%0 = call i32 (...)* @bar() nounwind ; <i32> [#uses=1]
|
||||
; CHECK: blx _bar
|
||||
; CHECK: ldr r1, [sp
|
||||
store i32 %0, i32* @fred, align 4
|
||||
@ -17,4 +17,4 @@ return: ; preds = %entry
|
||||
ret void
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @bar(...)
|
||||
declare i32 @bar(...)
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
@__stderrp = external global %struct.FILE* ; <%struct.FILE**> [#uses=1]
|
||||
@.str1 = private constant [28 x i8] c"Final valprev=%d, index=%d\0A\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[28 x i8]*> [#uses=1]
|
||||
|
||||
define arm_apcscc void @adpcm_coder(i16* nocapture %indata, i8* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
|
||||
define void @adpcm_coder(i16* nocapture %indata, i8* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
|
||||
entry:
|
||||
%0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0 ; <i16*> [#uses=2]
|
||||
%1 = load i16* %0, align 2 ; <i16> [#uses=1]
|
||||
@ -138,7 +138,7 @@ bb29: ; preds = %bb28, %bb27
|
||||
ret void
|
||||
}
|
||||
|
||||
define arm_apcscc void @adpcm_decoder(i8* nocapture %indata, i16* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
|
||||
define void @adpcm_decoder(i8* nocapture %indata, i16* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
|
||||
entry:
|
||||
%0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0 ; <i16*> [#uses=2]
|
||||
%1 = load i16* %0, align 2 ; <i16> [#uses=1]
|
||||
@ -245,17 +245,17 @@ bb22: ; preds = %bb20, %entry
|
||||
ret void
|
||||
}
|
||||
|
||||
define arm_apcscc i32 @main() nounwind {
|
||||
define i32 @main() nounwind {
|
||||
entry:
|
||||
br label %bb
|
||||
|
||||
bb: ; preds = %bb3, %entry
|
||||
%0 = tail call arm_apcscc i32 (...)* @read(i32 0, i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i32 500) nounwind ; <i32> [#uses=4]
|
||||
%0 = tail call i32 (...)* @read(i32 0, i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i32 500) nounwind ; <i32> [#uses=4]
|
||||
%1 = icmp slt i32 %0, 0 ; <i1> [#uses=1]
|
||||
br i1 %1, label %bb1, label %bb2
|
||||
|
||||
bb1: ; preds = %bb
|
||||
tail call arm_apcscc void @perror(i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0)) nounwind
|
||||
tail call void @perror(i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0)) nounwind
|
||||
ret i32 1
|
||||
|
||||
bb2: ; preds = %bb
|
||||
@ -264,9 +264,9 @@ bb2: ; preds = %bb
|
||||
|
||||
bb3: ; preds = %bb2
|
||||
%3 = shl i32 %0, 1 ; <i32> [#uses=1]
|
||||
tail call arm_apcscc void @adpcm_decoder(i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %3, %struct.adpcm_state* @state) nounwind
|
||||
tail call void @adpcm_decoder(i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %3, %struct.adpcm_state* @state) nounwind
|
||||
%4 = shl i32 %0, 2 ; <i32> [#uses=1]
|
||||
%5 = tail call arm_apcscc i32 (...)* @write(i32 1, i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %4) nounwind ; <i32> [#uses=0]
|
||||
%5 = tail call i32 (...)* @write(i32 1, i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %4) nounwind ; <i32> [#uses=0]
|
||||
br label %bb
|
||||
|
||||
bb4: ; preds = %bb2
|
||||
@ -275,14 +275,14 @@ bb4: ; preds = %bb2
|
||||
%8 = sext i16 %7 to i32 ; <i32> [#uses=1]
|
||||
%9 = load i8* getelementptr (%struct.adpcm_state* @state, i32 0, i32 1), align 2 ; <i8> [#uses=1]
|
||||
%10 = sext i8 %9 to i32 ; <i32> [#uses=1]
|
||||
%11 = tail call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %6, i8* getelementptr ([28 x i8]* @.str1, i32 0, i32 0), i32 %8, i32 %10) nounwind ; <i32> [#uses=0]
|
||||
%11 = tail call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %6, i8* getelementptr ([28 x i8]* @.str1, i32 0, i32 0), i32 %8, i32 %10) nounwind ; <i32> [#uses=0]
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @read(...)
|
||||
declare i32 @read(...)
|
||||
|
||||
declare arm_apcscc void @perror(i8* nocapture) nounwind
|
||||
declare void @perror(i8* nocapture) nounwind
|
||||
|
||||
declare arm_apcscc i32 @write(...)
|
||||
declare i32 @write(...)
|
||||
|
||||
declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
|
||||
declare i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
|
||||
@GV = external global i32 ; <i32*> [#uses=2]
|
||||
|
||||
define arm_apcscc void @t(i32* nocapture %vals, i32 %c) nounwind {
|
||||
define void @t(i32* nocapture %vals, i32 %c) nounwind {
|
||||
entry:
|
||||
; CHECK: t:
|
||||
%0 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s
|
||||
; rdar://7268481
|
||||
|
||||
define arm_apcscc void @t(i8* %a, ...) nounwind {
|
||||
define void @t(i8* %a, ...) nounwind {
|
||||
; CHECK: t:
|
||||
; CHECK: pop {r3}
|
||||
; CHECK-NEXT: add sp, #12
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-fp-elim | FileCheck %s
|
||||
; rdar://7268481
|
||||
|
||||
define arm_apcscc void @t() nounwind {
|
||||
define void @t() nounwind {
|
||||
; CHECK: t:
|
||||
; CHECK-NEXT : push {r7}
|
||||
entry:
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -march=thumb | FileCheck %s
|
||||
; rdar://7961298
|
||||
|
||||
define arm_apcscc void @t() nounwind {
|
||||
define void @t() nounwind {
|
||||
entry:
|
||||
; CHECK: t:
|
||||
; CHECK: trap
|
||||
|
||||
@ -4,9 +4,9 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-
|
||||
target triple = "thumbv6t2-elf"
|
||||
%struct.dwarf_cie = type <{ i32, i32, i8, [0 x i8], [3 x i8] }>
|
||||
|
||||
declare arm_apcscc i8* @read_sleb128(i8*, i32* nocapture) nounwind
|
||||
declare i8* @read_sleb128(i8*, i32* nocapture) nounwind
|
||||
|
||||
define arm_apcscc i32 @get_cie_encoding(%struct.dwarf_cie* %cie) nounwind {
|
||||
define i32 @get_cie_encoding(%struct.dwarf_cie* %cie) nounwind {
|
||||
entry:
|
||||
br i1 undef, label %bb1, label %bb13
|
||||
|
||||
@ -27,7 +27,7 @@ read_uleb128.exit: ; preds = %bb.i
|
||||
%.sum40 = add i32 %indvar.i, undef ; <i32> [#uses=1]
|
||||
%.sum31 = add i32 %.sum40, 2 ; <i32> [#uses=1]
|
||||
%scevgep.i = getelementptr %struct.dwarf_cie* %cie, i32 0, i32 3, i32 %.sum31 ; <i8*> [#uses=1]
|
||||
%3 = call arm_apcscc i8* @read_sleb128(i8* %scevgep.i, i32* undef) ; <i8*> [#uses=0]
|
||||
%3 = call i8* @read_sleb128(i8* %scevgep.i, i32* undef) ; <i8*> [#uses=0]
|
||||
unreachable
|
||||
|
||||
bb13: ; preds = %entry
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
|
||||
@"\01LC" = external constant [36 x i8], align 1 ; <[36 x i8]*> [#uses=1]
|
||||
|
||||
define arm_apcscc i32 @t(i32, ...) nounwind {
|
||||
define i32 @t(i32, ...) nounwind {
|
||||
entry:
|
||||
; CHECK: t:
|
||||
; CHECK: add r7, sp, #12
|
||||
@ -24,7 +24,7 @@ entry:
|
||||
%15 = sext i8 %6 to i32 ; <i32> [#uses=2]
|
||||
%16 = sext i16 %10 to i32 ; <i32> [#uses=2]
|
||||
%17 = sext i16 %13 to i32 ; <i32> [#uses=2]
|
||||
%18 = call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([36 x i8]* @"\01LC", i32 0, i32 0), i32 -128, i32 0, i32 %15, i32 %16, i32 %17, i32 0, i32 %14) nounwind ; <i32> [#uses=0]
|
||||
%18 = call i32 (i8*, ...)* @printf(i8* getelementptr ([36 x i8]* @"\01LC", i32 0, i32 0), i32 -128, i32 0, i32 %15, i32 %16, i32 %17, i32 0, i32 %14) nounwind ; <i32> [#uses=0]
|
||||
%19 = add i32 0, %15 ; <i32> [#uses=1]
|
||||
%20 = add i32 %19, %16 ; <i32> [#uses=1]
|
||||
%21 = add i32 %20, %14 ; <i32> [#uses=1]
|
||||
@ -33,4 +33,4 @@ entry:
|
||||
ret i32 %23
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
|
||||
declare i32 @printf(i8* nocapture, ...) nounwind
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+vfp2,+thumb2
|
||||
; rdar://7083961
|
||||
|
||||
define arm_apcscc i32 @value(i64 %b1, i64 %b2) nounwind readonly {
|
||||
define i32 @value(i64 %b1, i64 %b2) nounwind readonly {
|
||||
entry:
|
||||
%0 = icmp eq i32 undef, 0 ; <i1> [#uses=1]
|
||||
%mod.0.ph.ph = select i1 %0, float -1.000000e+00, float 1.000000e+00 ; <float> [#uses=1]
|
||||
|
||||
@ -28,7 +28,7 @@
|
||||
%struct.jvirt_barray_control = type { [64 x i16]**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_barray_control*, %struct.backing_store_info }
|
||||
%struct.jvirt_sarray_control = type { i8**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_sarray_control*, %struct.backing_store_info }
|
||||
|
||||
define arm_apcscc void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
|
||||
define void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
|
||||
entry:
|
||||
%workspace = alloca [64 x float], align 4 ; <[64 x float]*> [#uses=11]
|
||||
%0 = load i8** undef, align 4 ; <i8*> [#uses=5]
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
@lefline = external global [100 x [20 x i32]] ; <[100 x [20 x i32]]*> [#uses=1]
|
||||
@sep = external global [20 x i32] ; <[20 x i32]*> [#uses=1]
|
||||
|
||||
define arm_apcscc void @main(i32 %argc, i8** %argv) noreturn nounwind {
|
||||
define void @main(i32 %argc, i8** %argv) noreturn nounwind {
|
||||
; CHECK: main:
|
||||
; CHECK: ldrb
|
||||
entry:
|
||||
|
||||
@ -22,9 +22,9 @@
|
||||
%"struct.xalanc_1_8::XalanDOMString" = type { %"struct.std::vector<short unsigned int,std::allocator<short unsigned int> >", i32 }
|
||||
%"struct.xalanc_1_8::XalanOutputStream" = type { i32 (...)**, i32, %"struct.std::basic_ostream<char,std::char_traits<char> >.base"*, i32, %"struct.std::vector<short unsigned int,std::allocator<short unsigned int> >", %"struct.xalanc_1_8::XalanDOMString", i8, i8, %"struct.std::CharVectorType" }
|
||||
|
||||
declare arm_apcscc void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"*)
|
||||
declare void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"*)
|
||||
|
||||
define arm_apcscc void @_ZN10xalanc_1_814FormatterToXML5cdataEPKtj(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length) {
|
||||
define void @_ZN10xalanc_1_814FormatterToXML5cdataEPKtj(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length) {
|
||||
entry:
|
||||
%0 = getelementptr %"struct.xalanc_1_8::FormatterToXML"* %this, i32 0, i32 13 ; <i8*> [#uses=1]
|
||||
br i1 undef, label %bb4, label %bb
|
||||
@ -36,11 +36,11 @@ bb: ; preds = %entry
|
||||
%3 = getelementptr i32 (...)** %2, i32 11 ; <i32 (...)**> [#uses=1]
|
||||
%4 = load i32 (...)** %3, align 4 ; <i32 (...)*> [#uses=1]
|
||||
%5 = bitcast i32 (...)* %4 to void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32)* ; <void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32)*> [#uses=1]
|
||||
tail call arm_apcscc void %5(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length)
|
||||
tail call void %5(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length)
|
||||
ret void
|
||||
|
||||
bb4: ; preds = %entry
|
||||
tail call arm_apcscc void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"* %this)
|
||||
tail call arm_apcscc void undef(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 0, i32 %length, i8 zeroext undef)
|
||||
tail call void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"* %this)
|
||||
tail call void undef(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 0, i32 %length, i8 zeroext undef)
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -28,17 +28,17 @@
|
||||
@.str1822946 = external constant [8 x i8], align 1 ; <[8 x i8]*> [#uses=1]
|
||||
@.str1842948 = external constant [11 x i8], align 1 ; <[11 x i8]*> [#uses=1]
|
||||
|
||||
declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
|
||||
declare i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
|
||||
|
||||
declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*)
|
||||
declare i32 @"\01_fwrite"(i8*, i32, i32, i8*)
|
||||
|
||||
declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
|
||||
declare %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
|
||||
|
||||
declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
|
||||
declare void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
|
||||
|
||||
declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
|
||||
declare i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
|
||||
|
||||
define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
|
||||
define void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
|
||||
entry:
|
||||
br label %bb5
|
||||
|
||||
@ -49,7 +49,7 @@ bb5: ; preds = %bb5, %entry
|
||||
br i1 undef, label %bb5, label %bb6
|
||||
|
||||
bb6: ; preds = %bb5
|
||||
%0 = call arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext 0, %struct.rec** undef, %struct.FILE_POS* null, i32* undef) nounwind ; <%struct.FILE*> [#uses=1]
|
||||
%0 = call %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext 0, %struct.rec** undef, %struct.FILE_POS* null, i32* undef) nounwind ; <%struct.FILE*> [#uses=1]
|
||||
br i1 false, label %bb.i, label %FontHalfXHeight.exit
|
||||
|
||||
bb.i: ; preds = %bb6
|
||||
@ -67,22 +67,22 @@ FontSize.exit: ; preds = %bb.i1, %FontHalfXHeight.exit
|
||||
br i1 %2, label %bb.i5, label %FontName.exit
|
||||
|
||||
bb.i5: ; preds = %FontSize.exit
|
||||
call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
|
||||
call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
|
||||
br label %FontName.exit
|
||||
|
||||
FontName.exit: ; preds = %bb.i5, %FontSize.exit
|
||||
%3 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %1, i8* undef) nounwind ; <i32> [#uses=0]
|
||||
%4 = call arm_apcscc i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; <i32> [#uses=0]
|
||||
%3 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %1, i8* undef) nounwind ; <i32> [#uses=0]
|
||||
%4 = call i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; <i32> [#uses=0]
|
||||
%5 = sub i32 %colmark, undef ; <i32> [#uses=1]
|
||||
%6 = sub i32 %rowmark, undef ; <i32> [#uses=1]
|
||||
%7 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
|
||||
%8 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %7, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %5, i32 %6) nounwind ; <i32> [#uses=0]
|
||||
%8 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %7, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %5, i32 %6) nounwind ; <i32> [#uses=0]
|
||||
store i32 0, i32* @cpexists, align 4
|
||||
%9 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 1 ; <i32*> [#uses=1]
|
||||
%10 = load i32* %9, align 4 ; <i32> [#uses=1]
|
||||
%11 = sub i32 0, %10 ; <i32> [#uses=1]
|
||||
%12 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
|
||||
%13 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %12, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %11) nounwind ; <i32> [#uses=0]
|
||||
%13 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %12, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %11) nounwind ; <i32> [#uses=0]
|
||||
store i32 0, i32* @cpexists, align 4
|
||||
br label %bb100.outer.outer
|
||||
|
||||
@ -132,7 +132,7 @@ bb2.i41: ; preds = %bb2.i41, %StringBeginsWith.exit55
|
||||
br label %bb2.i41
|
||||
|
||||
bb2.i.i15.critedge: ; preds = %bb.i47
|
||||
%16 = call arm_apcscc i8* @fgets(i8* undef, i32 512, %struct.FILE* %0) nounwind ; <i8*> [#uses=0]
|
||||
%16 = call i8* @fgets(i8* undef, i32 512, %struct.FILE* %0) nounwind ; <i8*> [#uses=0]
|
||||
%iftmp.560.0 = select i1 undef, i32 2, i32 0 ; <i32> [#uses=1]
|
||||
br label %bb100.outer
|
||||
|
||||
|
||||
@ -55,25 +55,25 @@
|
||||
@.str1872951 = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1]
|
||||
@.str1932957 = external constant [26 x i8], align 1 ; <[26 x i8]*> [#uses=1]
|
||||
|
||||
declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
|
||||
declare i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
|
||||
|
||||
declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*)
|
||||
declare i32 @"\01_fwrite"(i8*, i32, i32, i8*)
|
||||
|
||||
declare arm_apcscc i32 @remove(i8* nocapture) nounwind
|
||||
declare i32 @remove(i8* nocapture) nounwind
|
||||
|
||||
declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
|
||||
declare %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
|
||||
|
||||
declare arm_apcscc %struct.rec* @MakeWord(i32, i8* nocapture, %struct.FILE_POS*) nounwind
|
||||
declare %struct.rec* @MakeWord(i32, i8* nocapture, %struct.FILE_POS*) nounwind
|
||||
|
||||
declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
|
||||
declare void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
|
||||
|
||||
declare arm_apcscc i32 @"\01_fputs"(i8*, %struct.FILE*)
|
||||
declare i32 @"\01_fputs"(i8*, %struct.FILE*)
|
||||
|
||||
declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
|
||||
declare noalias i8* @calloc(i32, i32) nounwind
|
||||
|
||||
declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
|
||||
declare i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
|
||||
|
||||
define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
|
||||
define void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
|
||||
entry:
|
||||
%buff = alloca [512 x i8], align 4 ; <[512 x i8]*> [#uses=5]
|
||||
%0 = getelementptr %struct.rec* %x, i32 0, i32 0, i32 1, i32 0, i32 0 ; <i8*> [#uses=2]
|
||||
@ -94,7 +94,7 @@ bb1: ; preds = %bb, %entry
|
||||
br i1 %8, label %bb2, label %bb3
|
||||
|
||||
bb2: ; preds = %bb1
|
||||
call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([40 x i8]* @.str1802944, i32 0, i32 0)) nounwind
|
||||
call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([40 x i8]* @.str1802944, i32 0, i32 0)) nounwind
|
||||
br label %bb3
|
||||
|
||||
bb3: ; preds = %bb2, %bb1
|
||||
@ -108,7 +108,7 @@ bb5: ; preds = %bb5, %bb3
|
||||
bb6: ; preds = %bb5
|
||||
%10 = load i8* %0, align 4 ; <i8> [#uses=1]
|
||||
%11 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 1, i32 0 ; <%struct.FILE_POS*> [#uses=1]
|
||||
%12 = call arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext %10, %struct.rec** null, %struct.FILE_POS* %11, i32* undef) nounwind ; <%struct.FILE*> [#uses=4]
|
||||
%12 = call %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext %10, %struct.rec** null, %struct.FILE_POS* %11, i32* undef) nounwind ; <%struct.FILE*> [#uses=4]
|
||||
br i1 false, label %bb7, label %bb8
|
||||
|
||||
bb7: ; preds = %bb6
|
||||
@ -124,7 +124,7 @@ bb9: ; preds = %bb8
|
||||
br i1 %15, label %bb.i, label %FontHalfXHeight.exit
|
||||
|
||||
bb.i: ; preds = %bb9
|
||||
call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([17 x i8]* @.str111875, i32 0, i32 0)) nounwind
|
||||
call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([17 x i8]* @.str111875, i32 0, i32 0)) nounwind
|
||||
%.pre186 = load i32* @currentfont, align 4 ; <i32> [#uses=1]
|
||||
br label %FontHalfXHeight.exit
|
||||
|
||||
@ -139,7 +139,7 @@ bb1.i: ; preds = %bb.i1, %FontHalfXHeight.exit
|
||||
br i1 undef, label %bb2.i, label %FontSize.exit
|
||||
|
||||
bb2.i: ; preds = %bb1.i
|
||||
call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 37, i32 61, i8* getelementptr ([30 x i8]* @.str101874, i32 0, i32 0), i32 1, %struct.FILE_POS* null) nounwind
|
||||
call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 37, i32 61, i8* getelementptr ([30 x i8]* @.str101874, i32 0, i32 0), i32 1, %struct.FILE_POS* null) nounwind
|
||||
unreachable
|
||||
|
||||
FontSize.exit: ; preds = %bb1.i
|
||||
@ -151,35 +151,35 @@ FontSize.exit: ; preds = %bb1.i
|
||||
br i1 %21, label %bb.i5, label %FontName.exit
|
||||
|
||||
bb.i5: ; preds = %FontSize.exit
|
||||
call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
|
||||
call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
|
||||
br label %FontName.exit
|
||||
|
||||
FontName.exit: ; preds = %bb.i5, %FontSize.exit
|
||||
%22 = phi %struct.FONT_INFO* [ undef, %bb.i5 ], [ undef, %FontSize.exit ] ; <%struct.FONT_INFO*> [#uses=1]
|
||||
%23 = getelementptr %struct.FONT_INFO* %22, i32 %19, i32 5 ; <%struct.rec**> [#uses=0]
|
||||
%24 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %18, i8* null) nounwind ; <i32> [#uses=0]
|
||||
%24 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %18, i8* null) nounwind ; <i32> [#uses=0]
|
||||
br label %bb10
|
||||
|
||||
bb10: ; preds = %FontName.exit, %bb8
|
||||
%25 = call arm_apcscc i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; <i32> [#uses=0]
|
||||
%25 = call i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; <i32> [#uses=0]
|
||||
%26 = sub i32 %rowmark, undef ; <i32> [#uses=1]
|
||||
%27 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
|
||||
%28 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %27, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %26) nounwind ; <i32> [#uses=0]
|
||||
%28 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %27, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %26) nounwind ; <i32> [#uses=0]
|
||||
store i32 0, i32* @cpexists, align 4
|
||||
%29 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([17 x i8]* @.str192782, i32 0, i32 0), double 2.000000e+01, double 2.000000e+01) nounwind ; <i32> [#uses=0]
|
||||
%29 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([17 x i8]* @.str192782, i32 0, i32 0), double 2.000000e+01, double 2.000000e+01) nounwind ; <i32> [#uses=0]
|
||||
%30 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
|
||||
%31 = load i32* %30, align 4 ; <i32> [#uses=1]
|
||||
%32 = sub i32 0, %31 ; <i32> [#uses=1]
|
||||
%33 = load i32* undef, align 4 ; <i32> [#uses=1]
|
||||
%34 = sub i32 0, %33 ; <i32> [#uses=1]
|
||||
%35 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
|
||||
%36 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %35, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %32, i32 %34) nounwind ; <i32> [#uses=0]
|
||||
%36 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %35, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %32, i32 %34) nounwind ; <i32> [#uses=0]
|
||||
store i32 0, i32* @cpexists, align 4
|
||||
%37 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1]
|
||||
%38 = getelementptr %struct.rec* %37, i32 0, i32 0, i32 4 ; <%struct.FOURTH_UNION*> [#uses=1]
|
||||
%39 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([23 x i8]* @.str1852949, i32 0, i32 0), %struct.FOURTH_UNION* %38) nounwind ; <i32> [#uses=0]
|
||||
%39 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([23 x i8]* @.str1852949, i32 0, i32 0), %struct.FOURTH_UNION* %38) nounwind ; <i32> [#uses=0]
|
||||
%buff14 = getelementptr [512 x i8]* %buff, i32 0, i32 0 ; <i8*> [#uses=5]
|
||||
%40 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=0]
|
||||
%40 = call i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=0]
|
||||
%iftmp.506.0 = select i1 undef, i32 2, i32 0 ; <i32> [#uses=1]
|
||||
%41 = getelementptr [512 x i8]* %buff, i32 0, i32 26 ; <i8*> [#uses=1]
|
||||
br label %bb100.outer.outer
|
||||
@ -230,7 +230,7 @@ bb3.i77: ; preds = %bb2.i75, %StringBeginsWith.exit88
|
||||
br i1 %50, label %bb24, label %bb2.i.i68
|
||||
|
||||
bb24: ; preds = %bb3.i77
|
||||
%51 = call arm_apcscc %struct.rec* @MakeWord(i32 11, i8* %41, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=0]
|
||||
%51 = call %struct.rec* @MakeWord(i32 11, i8* %41, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=0]
|
||||
%52 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4 ; <i8> [#uses=1]
|
||||
%53 = zext i8 %52 to i32 ; <i32> [#uses=2]
|
||||
%54 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %53 ; <%struct.rec**> [#uses=2]
|
||||
@ -245,7 +245,7 @@ bb.i56: ; preds = %bb27
|
||||
br i1 undef, label %bb1.i58, label %bb2.i60
|
||||
|
||||
bb1.i58: ; preds = %bb.i56
|
||||
call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
|
||||
call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
|
||||
br label %bb2.i60
|
||||
|
||||
bb2.i60: ; preds = %bb1.i58, %bb.i56
|
||||
@ -287,7 +287,7 @@ bb37: ; preds = %bb35
|
||||
br label %bb41
|
||||
|
||||
bb41: ; preds = %bb37, %bb35
|
||||
%61 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=1]
|
||||
%61 = call i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=1]
|
||||
%62 = icmp eq i8* %61, null ; <i1> [#uses=1]
|
||||
%iftmp.554.0 = select i1 %62, i32 2, i32 1 ; <i32> [#uses=1]
|
||||
br label %bb100.outer
|
||||
@ -342,11 +342,11 @@ bb2.i6.i26: ; preds = %bb2.i6.i26, %StringBeginsWith.exit.i20
|
||||
br i1 undef, label %bb2.i6.i26, label %bb55
|
||||
|
||||
bb55: ; preds = %bb2.i6.i26
|
||||
%69 = call arm_apcscc i32 @"\01_fputs"(i8* %buff14, %struct.FILE* undef) nounwind ; <i32> [#uses=0]
|
||||
%69 = call i32 @"\01_fputs"(i8* %buff14, %struct.FILE* undef) nounwind ; <i32> [#uses=0]
|
||||
unreachable
|
||||
|
||||
bb58: ; preds = %StringBeginsWith.exit.i20
|
||||
%70 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=0]
|
||||
%70 = call i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=0]
|
||||
%iftmp.560.0 = select i1 undef, i32 2, i32 0 ; <i32> [#uses=1]
|
||||
br label %bb100.outer
|
||||
|
||||
@ -367,7 +367,7 @@ StringBeginsWith.exit: ; preds = %StringBeginsWith.exitthread-split, %bb3.i
|
||||
br i1 %phitmp93, label %bb66, label %bb2.i.i
|
||||
|
||||
bb66: ; preds = %StringBeginsWith.exit
|
||||
%71 = call arm_apcscc %struct.rec* @MakeWord(i32 11, i8* undef, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=4]
|
||||
%71 = call %struct.rec* @MakeWord(i32 11, i8* undef, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=4]
|
||||
%72 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4 ; <i8> [#uses=1]
|
||||
%73 = zext i8 %72 to i32 ; <i32> [#uses=2]
|
||||
%74 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %73 ; <%struct.rec**> [#uses=2]
|
||||
@ -379,13 +379,13 @@ bb69: ; preds = %bb66
|
||||
br i1 undef, label %bb.i2, label %GetMemory.exit
|
||||
|
||||
bb.i2: ; preds = %bb69
|
||||
%77 = call arm_apcscc noalias i8* @calloc(i32 1020, i32 4) nounwind ; <i8*> [#uses=1]
|
||||
%77 = call noalias i8* @calloc(i32 1020, i32 4) nounwind ; <i8*> [#uses=1]
|
||||
%78 = bitcast i8* %77 to i8** ; <i8**> [#uses=3]
|
||||
store i8** %78, i8*** @next_free.4772, align 4
|
||||
br i1 undef, label %bb1.i3, label %bb2.i4
|
||||
|
||||
bb1.i3: ; preds = %bb.i2
|
||||
call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
|
||||
call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
|
||||
br label %bb2.i4
|
||||
|
||||
bb2.i4: ; preds = %bb1.i3, %bb.i2
|
||||
@ -482,7 +482,7 @@ bb91: ; preds = %strip_out.exit, %bb.i2.i
|
||||
unreachable
|
||||
|
||||
bb94: ; preds = %strip_out.exit, %StringBeginsWith.exit.i
|
||||
%96 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=0]
|
||||
%96 = call i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=0]
|
||||
unreachable
|
||||
|
||||
bb100.outer: ; preds = %bb58, %bb41, %bb100.outer.outer
|
||||
@ -497,12 +497,12 @@ bb101.split: ; preds = %bb100.outer
|
||||
br i1 %97, label %bb103, label %bb102
|
||||
|
||||
bb102: ; preds = %bb101.split
|
||||
%98 = call arm_apcscc i32 @remove(i8* getelementptr ([9 x i8]* @.str19294, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
|
||||
%98 = call i32 @remove(i8* getelementptr ([9 x i8]* @.str19294, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
|
||||
unreachable
|
||||
|
||||
bb103: ; preds = %bb101.split
|
||||
%99 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
|
||||
%100 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %99, i8* getelementptr ([26 x i8]* @.str1932957, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
|
||||
%100 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %99, i8* getelementptr ([26 x i8]* @.str1932957, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
|
||||
store i32 0, i32* @wordcount, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
%struct.Results = type { float, float, float }
|
||||
%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
|
||||
|
||||
define arm_apcscc void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
|
||||
define void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
|
||||
entry:
|
||||
br i1 undef, label %bb, label %bb6.preheader
|
||||
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
%struct.Patient = type { i32, i32, i32, %struct.Village* }
|
||||
%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
|
||||
|
||||
define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
|
||||
define %struct.List* @sim(%struct.Village* %village) nounwind {
|
||||
entry:
|
||||
br i1 undef, label %bb14, label %bb3.preheader
|
||||
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
%struct.Patient = type { i32, i32, i32, %struct.Village* }
|
||||
%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
|
||||
|
||||
define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
|
||||
define %struct.List* @sim(%struct.Village* %village) nounwind {
|
||||
entry:
|
||||
br i1 undef, label %bb14, label %bb3.preheader
|
||||
|
||||
|
||||
@ -28,7 +28,7 @@
|
||||
%struct.jvirt_barray_control = type { [64 x i16]**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_barray_control*, %struct.backing_store_info }
|
||||
%struct.jvirt_sarray_control = type { i8**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_sarray_control*, %struct.backing_store_info }
|
||||
|
||||
define arm_apcscc void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
|
||||
define void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
|
||||
entry:
|
||||
br label %bb
|
||||
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+vfp2
|
||||
|
||||
define arm_apcscc float @t1(i32 %v0) nounwind {
|
||||
define float @t1(i32 %v0) nounwind {
|
||||
entry:
|
||||
store i32 undef, i32* undef, align 4
|
||||
%0 = load [4 x i8]** undef, align 4 ; <[4 x i8]*> [#uses=1]
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
|
||||
@getNeighbour = external global void (i32, i32, i32, i32, %struct.pix_pos*)*, align 4 ; <void (i32, i32, i32, i32, %struct.pix_pos*)**> [#uses=2]
|
||||
|
||||
define arm_apcscc void @t() nounwind {
|
||||
define void @t() nounwind {
|
||||
; CHECK: t:
|
||||
; CHECK: it eq
|
||||
; CHECK-NEXT: cmpeq
|
||||
@ -47,12 +47,12 @@ if.then1992: ; preds = %for.body1940
|
||||
%tmp14.i302 = load i32* undef ; <i32> [#uses=4]
|
||||
%add.i307452 = or i32 %shl1959, 1 ; <i32> [#uses=1]
|
||||
%sub.i308 = add i32 %shl, -1 ; <i32> [#uses=4]
|
||||
call arm_apcscc void undef(i32 %tmp14.i302, i32 %sub.i308, i32 %shl1959, i32 0, %struct.pix_pos* undef) nounwind
|
||||
call void undef(i32 %tmp14.i302, i32 %sub.i308, i32 %shl1959, i32 0, %struct.pix_pos* undef) nounwind
|
||||
%tmp49.i309 = load void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; <void (i32, i32, i32, i32, %struct.pix_pos*)*> [#uses=1]
|
||||
call arm_apcscc void %tmp49.i309(i32 %tmp14.i302, i32 %sub.i308, i32 %add.i307452, i32 0, %struct.pix_pos* null) nounwind
|
||||
call void %tmp49.i309(i32 %tmp14.i302, i32 %sub.i308, i32 %add.i307452, i32 0, %struct.pix_pos* null) nounwind
|
||||
%tmp49.1.i = load void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; <void (i32, i32, i32, i32, %struct.pix_pos*)*> [#uses=1]
|
||||
call arm_apcscc void %tmp49.1.i(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.2.i) nounwind
|
||||
call arm_apcscc void undef(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.3.i) nounwind
|
||||
call void %tmp49.1.i(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.2.i) nounwind
|
||||
call void undef(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.3.i) nounwind
|
||||
unreachable
|
||||
|
||||
if.else2003: ; preds = %for.body1940
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8
|
||||
|
||||
define arm_apcscc void @get_initial_mb16x16_cost() nounwind {
|
||||
define void @get_initial_mb16x16_cost() nounwind {
|
||||
entry:
|
||||
br i1 undef, label %bb4, label %bb1
|
||||
|
||||
|
||||
@ -3,9 +3,9 @@
|
||||
%struct.OP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i32, i16, i16, i8, i8 }
|
||||
%struct.SV = type { i8*, i32, i32 }
|
||||
|
||||
declare arm_apcscc void @Perl_mg_set(%struct.SV*) nounwind
|
||||
declare void @Perl_mg_set(%struct.SV*) nounwind
|
||||
|
||||
define arm_apcscc %struct.OP* @Perl_pp_complement() nounwind {
|
||||
define %struct.OP* @Perl_pp_complement() nounwind {
|
||||
entry:
|
||||
%0 = load %struct.SV** null, align 4 ; <%struct.SV*> [#uses=2]
|
||||
br i1 undef, label %bb21, label %bb5
|
||||
@ -23,7 +23,7 @@ bb7: ; preds = %bb6
|
||||
%4 = bitcast i8* %3 to i32* ; <i32*> [#uses=1]
|
||||
%5 = load i32* %4, align 4 ; <i32> [#uses=1]
|
||||
%storemerge5 = xor i32 %5, -1 ; <i32> [#uses=1]
|
||||
call arm_apcscc void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
|
||||
call void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
|
||||
%6 = getelementptr inbounds %struct.SV* undef, i32 0, i32 2 ; <i32*> [#uses=1]
|
||||
%7 = load i32* %6, align 4 ; <i32> [#uses=1]
|
||||
%8 = and i32 %7, 16384 ; <i32> [#uses=1]
|
||||
@ -34,7 +34,7 @@ bb8: ; preds = %bb6
|
||||
unreachable
|
||||
|
||||
bb11: ; preds = %bb7
|
||||
call arm_apcscc void @Perl_mg_set(%struct.SV* undef) nounwind
|
||||
call void @Perl_mg_set(%struct.SV* undef) nounwind
|
||||
br label %bb12
|
||||
|
||||
bb12: ; preds = %bb11, %bb7
|
||||
@ -42,11 +42,11 @@ bb12: ; preds = %bb11, %bb7
|
||||
br label %bb44
|
||||
|
||||
bb13: ; preds = %bb5
|
||||
%10 = call arm_apcscc i32 @Perl_sv_2uv(%struct.SV* %0) nounwind ; <i32> [#uses=0]
|
||||
%10 = call i32 @Perl_sv_2uv(%struct.SV* %0) nounwind ; <i32> [#uses=0]
|
||||
br i1 undef, label %bb.i, label %bb1.i
|
||||
|
||||
bb.i: ; preds = %bb13
|
||||
call arm_apcscc void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwind
|
||||
call void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwind
|
||||
br label %Perl_sv_setuv.exit
|
||||
|
||||
bb1.i: ; preds = %bb13
|
||||
@ -60,7 +60,7 @@ Perl_sv_setuv.exit: ; preds = %bb1.i, %bb.i
|
||||
br i1 %14, label %bb20, label %bb19
|
||||
|
||||
bb19: ; preds = %Perl_sv_setuv.exit
|
||||
call arm_apcscc void @Perl_mg_set(%struct.SV* undef) nounwind
|
||||
call void @Perl_mg_set(%struct.SV* undef) nounwind
|
||||
br label %bb20
|
||||
|
||||
bb20: ; preds = %bb19, %Perl_sv_setuv.exit
|
||||
@ -80,6 +80,6 @@ bb44: ; preds = %bb20, %bb12
|
||||
ret %struct.OP* undef
|
||||
}
|
||||
|
||||
declare arm_apcscc void @Perl_sv_setiv(%struct.SV*, i32) nounwind
|
||||
declare void @Perl_sv_setiv(%struct.SV*, i32) nounwind
|
||||
|
||||
declare arm_apcscc i32 @Perl_sv_2uv(%struct.SV*) nounwind
|
||||
declare i32 @Perl_sv_2uv(%struct.SV*) nounwind
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -mtriple=thumbv7-apple-darwin10
|
||||
; rdar://7394794
|
||||
|
||||
define arm_apcscc void @lshift_double(i64 %l1, i64 %h1, i64 %count, i32 %prec, i64* nocapture %lv, i64* nocapture %hv, i32 %arith) nounwind {
|
||||
define void @lshift_double(i64 %l1, i64 %h1, i64 %count, i32 %prec, i64* nocapture %lv, i64* nocapture %hv, i32 %arith) nounwind {
|
||||
entry:
|
||||
%..i = select i1 false, i64 0, i64 0 ; <i64> [#uses=1]
|
||||
br i1 undef, label %bb11.i, label %bb6.i
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: opt < %s -std-compile-opts | \
|
||||
; RUN: llc -mtriple=thumbv7-apple-darwin10 -mattr=+neon | FileCheck %s
|
||||
|
||||
define arm_apcscc void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
|
||||
define void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
|
||||
entry:
|
||||
; -- The loop following the load should only use a single add-literation
|
||||
; instruction.
|
||||
@ -45,7 +45,7 @@ entry:
|
||||
store i8* %bp, i8** %bp_addr
|
||||
%0 = load i8** %in_addr, align 4 ; <i8*> [#uses=1]
|
||||
store i8* %0, i8** %out, align 4
|
||||
%1 = call arm_apcscc i32 (...)* @foo() nounwind ; <i32> [#uses=1]
|
||||
%1 = call i32 (...)* @foo() nounwind ; <i32> [#uses=1]
|
||||
store i32 %1, i32* %i, align 4
|
||||
%2 = load i32* %three_by_three_addr, align 4 ; <i32> [#uses=1]
|
||||
%3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
|
||||
@ -76,7 +76,7 @@ bb3: ; preds = %bb2, %bb
|
||||
%15 = load i32* %n_max, align 4 ; <i32> [#uses=1]
|
||||
%16 = load i32* %n_max, align 4 ; <i32> [#uses=1]
|
||||
%17 = mul i32 %15, %16 ; <i32> [#uses=1]
|
||||
%18 = call arm_apcscc noalias i8* @malloc(i32 %17) nounwind ; <i8*> [#uses=1]
|
||||
%18 = call noalias i8* @malloc(i32 %17) nounwind ; <i8*> [#uses=1]
|
||||
store i8* %18, i8** %dp, align 4
|
||||
%19 = load i8** %dp, align 4 ; <i8*> [#uses=1]
|
||||
store i8* %19, i8** %dpt, align 4
|
||||
@ -123,6 +123,6 @@ return: ; preds = %bb6
|
||||
ret void
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @foo(...)
|
||||
declare i32 @foo(...)
|
||||
|
||||
declare arm_apcscc noalias i8* @malloc(i32) nounwind
|
||||
declare noalias i8* @malloc(i32) nounwind
|
||||
|
||||
@ -17,14 +17,14 @@ target triple = "thumbv7-apple-darwin10"
|
||||
@_ZN3WTFL12thread_heapsE = internal global %"struct.WTF::TCMalloc_ThreadCache"* null ; <%"struct.WTF::TCMalloc_ThreadCache"**> [#uses=1]
|
||||
@llvm.used = appending global [1 x i8*] [i8* bitcast (%"struct.WTF::TCMalloc_ThreadCache"* ()* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
|
||||
|
||||
define arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv() nounwind {
|
||||
define %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv() nounwind {
|
||||
entry:
|
||||
%0 = tail call arm_apcscc i32 @pthread_mutex_lock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
|
||||
%0 = tail call i32 @pthread_mutex_lock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
|
||||
%.b24 = load i1* @_ZN3WTFL10tsd_initedE.b, align 4 ; <i1> [#uses=1]
|
||||
br i1 %.b24, label %bb5, label %bb6
|
||||
|
||||
bb5: ; preds = %entry
|
||||
%1 = tail call arm_apcscc %struct._opaque_pthread_t* @pthread_self() nounwind
|
||||
%1 = tail call %struct._opaque_pthread_t* @pthread_self() nounwind
|
||||
br label %bb6
|
||||
|
||||
bb6: ; preds = %bb5, %entry
|
||||
@ -34,7 +34,7 @@ bb6: ; preds = %bb5, %entry
|
||||
bb7: ; preds = %bb11
|
||||
%2 = getelementptr inbounds %"struct.WTF::TCMalloc_ThreadCache"* %h.0, i32 0, i32 1
|
||||
%3 = load %struct._opaque_pthread_t** %2, align 4
|
||||
%4 = tail call arm_apcscc i32 @pthread_equal(%struct._opaque_pthread_t* %3, %struct._opaque_pthread_t* %me.0) nounwind
|
||||
%4 = tail call i32 @pthread_equal(%struct._opaque_pthread_t* %3, %struct._opaque_pthread_t* %me.0) nounwind
|
||||
%5 = icmp eq i32 %4, 0
|
||||
br i1 %5, label %bb10, label %bb14
|
||||
|
||||
@ -49,12 +49,12 @@ bb11: ; preds = %bb10, %bb6
|
||||
br i1 %7, label %bb13, label %bb7
|
||||
|
||||
bb13: ; preds = %bb11
|
||||
%8 = tail call arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t* %me.0) nounwind
|
||||
%8 = tail call %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t* %me.0) nounwind
|
||||
br label %bb14
|
||||
|
||||
bb14: ; preds = %bb13, %bb7
|
||||
%heap.1 = phi %"struct.WTF::TCMalloc_ThreadCache"* [ %8, %bb13 ], [ %h.0, %bb7 ] ; <%"struct.WTF::TCMalloc_ThreadCache"*> [#uses=4]
|
||||
%9 = tail call arm_apcscc i32 @pthread_mutex_unlock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
|
||||
%9 = tail call i32 @pthread_mutex_unlock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
|
||||
%10 = getelementptr inbounds %"struct.WTF::TCMalloc_ThreadCache"* %heap.1, i32 0, i32 2
|
||||
%11 = load i8* %10, align 4
|
||||
%toBool15not = icmp eq i8 %11, 0 ; <i1> [#uses=1]
|
||||
@ -68,22 +68,22 @@ bb21: ; preds = %bb19
|
||||
store i8 1, i8* %10, align 4
|
||||
%12 = load i32* @_ZN3WTFL8heap_keyE, align 4
|
||||
%13 = bitcast %"struct.WTF::TCMalloc_ThreadCache"* %heap.1 to i8*
|
||||
%14 = tail call arm_apcscc i32 @pthread_setspecific(i32 %12, i8* %13) nounwind
|
||||
%14 = tail call i32 @pthread_setspecific(i32 %12, i8* %13) nounwind
|
||||
ret %"struct.WTF::TCMalloc_ThreadCache"* %heap.1
|
||||
|
||||
bb22: ; preds = %bb19, %bb14
|
||||
ret %"struct.WTF::TCMalloc_ThreadCache"* %heap.1
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @pthread_mutex_lock(%struct.PlatformMutex*)
|
||||
declare i32 @pthread_mutex_lock(%struct.PlatformMutex*)
|
||||
|
||||
declare arm_apcscc i32 @pthread_mutex_unlock(%struct.PlatformMutex*)
|
||||
declare i32 @pthread_mutex_unlock(%struct.PlatformMutex*)
|
||||
|
||||
declare hidden arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t*) nounwind
|
||||
declare hidden %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t*) nounwind
|
||||
|
||||
declare arm_apcscc i32 @pthread_setspecific(i32, i8*)
|
||||
declare i32 @pthread_setspecific(i32, i8*)
|
||||
|
||||
declare arm_apcscc %struct._opaque_pthread_t* @pthread_self()
|
||||
declare %struct._opaque_pthread_t* @pthread_self()
|
||||
|
||||
declare arm_apcscc i32 @pthread_equal(%struct._opaque_pthread_t*, %struct._opaque_pthread_t*)
|
||||
declare i32 @pthread_equal(%struct._opaque_pthread_t*, %struct._opaque_pthread_t*)
|
||||
|
||||
|
||||
@ -6,16 +6,16 @@
|
||||
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
|
||||
target triple = "thumbv7-apple-darwin10"
|
||||
|
||||
declare arm_apcscc void @etoe53(i16* nocapture, i16* nocapture) nounwind
|
||||
declare void @etoe53(i16* nocapture, i16* nocapture) nounwind
|
||||
|
||||
define arm_apcscc void @earith(double* nocapture %value, i32 %icode, double* nocapture %r1, double* nocapture %r2) nounwind {
|
||||
define void @earith(double* nocapture %value, i32 %icode, double* nocapture %r1, double* nocapture %r2) nounwind {
|
||||
entry:
|
||||
%v = alloca [6 x i16], align 4 ; <[6 x i16]*> [#uses=1]
|
||||
br i1 undef, label %bb2.i, label %bb5
|
||||
|
||||
bb2.i: ; preds = %entry
|
||||
%0 = bitcast double* %value to i16* ; <i16*> [#uses=1]
|
||||
call arm_apcscc void @etoe53(i16* null, i16* %0) nounwind
|
||||
call void @etoe53(i16* null, i16* %0) nounwind
|
||||
ret void
|
||||
|
||||
bb5: ; preds = %entry
|
||||
@ -48,6 +48,6 @@ bb35: ; preds = %bb5
|
||||
bb46: ; preds = %bb26, %bb10
|
||||
%1 = bitcast double* %value to i16* ; <i16*> [#uses=1]
|
||||
%v47 = getelementptr inbounds [6 x i16]* %v, i32 0, i32 0 ; <i16*> [#uses=1]
|
||||
call arm_apcscc void @etoe53(i16* %v47, i16* %1) nounwind
|
||||
call void @etoe53(i16* %v47, i16* %1) nounwind
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
|
||||
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
|
||||
|
||||
define arm_apcscc i32 @test(i32 %n) nounwind {
|
||||
define i32 @test(i32 %n) nounwind {
|
||||
; CHECK: test:
|
||||
; CHECK-NOT: mov
|
||||
; CHECK: return
|
||||
@ -16,11 +16,11 @@ bb.nph: ; preds = %entry
|
||||
bb: ; preds = %bb.nph, %bb
|
||||
%indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=1]
|
||||
%u.05 = phi i64 [ undef, %bb.nph ], [ %ins, %bb ] ; <i64> [#uses=1]
|
||||
%1 = tail call arm_apcscc i32 @f() nounwind ; <i32> [#uses=1]
|
||||
%1 = tail call i32 @f() nounwind ; <i32> [#uses=1]
|
||||
%tmp4 = zext i32 %1 to i64 ; <i64> [#uses=1]
|
||||
%mask = and i64 %u.05, -4294967296 ; <i64> [#uses=1]
|
||||
%ins = or i64 %tmp4, %mask ; <i64> [#uses=2]
|
||||
tail call arm_apcscc void @g(i64 %ins) nounwind
|
||||
tail call void @g(i64 %ins) nounwind
|
||||
%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
|
||||
%exitcond = icmp eq i32 %indvar.next, %tmp ; <i1> [#uses=1]
|
||||
br i1 %exitcond, label %return, label %bb
|
||||
@ -29,7 +29,7 @@ return: ; preds = %bb, %entry
|
||||
ret i32 undef
|
||||
}
|
||||
|
||||
define arm_apcscc i32 @test_dead_cycle(i32 %n) nounwind {
|
||||
define i32 @test_dead_cycle(i32 %n) nounwind {
|
||||
; CHECK: test_dead_cycle:
|
||||
; CHECK: blx
|
||||
; CHECK-NOT: mov
|
||||
@ -50,11 +50,11 @@ bb: ; preds = %bb.nph, %bb2
|
||||
br i1 %1, label %bb1, label %bb2
|
||||
|
||||
bb1: ; preds = %bb
|
||||
%2 = tail call arm_apcscc i32 @f() nounwind ; <i32> [#uses=1]
|
||||
%2 = tail call i32 @f() nounwind ; <i32> [#uses=1]
|
||||
%tmp6 = zext i32 %2 to i64 ; <i64> [#uses=1]
|
||||
%mask = and i64 %u.17, -4294967296 ; <i64> [#uses=1]
|
||||
%ins = or i64 %tmp6, %mask ; <i64> [#uses=1]
|
||||
tail call arm_apcscc void @g(i64 %ins) nounwind
|
||||
tail call void @g(i64 %ins) nounwind
|
||||
br label %bb2
|
||||
|
||||
bb2: ; preds = %bb1, %bb
|
||||
@ -71,6 +71,6 @@ return: ; preds = %bb2, %entry
|
||||
ret i32 undef
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @f()
|
||||
declare i32 @f()
|
||||
|
||||
declare arm_apcscc void @g(i64)
|
||||
declare void @g(i64)
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
|
||||
target triple = "thumbv7-apple-darwin3.0.0-iphoneos"
|
||||
|
||||
define arm_apcscc void @FindMin(double* %panelTDEL, i8* %dclOfRow, i32 %numRows, i32 %numCols, double* %retMin_RES_TDEL) {
|
||||
define void @FindMin(double* %panelTDEL, i8* %dclOfRow, i32 %numRows, i32 %numCols, double* %retMin_RES_TDEL) {
|
||||
entry:
|
||||
%panelTDEL.addr = alloca double*, align 4 ; <double**> [#uses=1]
|
||||
%panelResTDEL = alloca [2560 x double], align 4 ; <[2560 x double]*> [#uses=0]
|
||||
|
||||
@ -2,13 +2,13 @@
|
||||
|
||||
@.str41196 = external constant [2 x i8], align 4 ; <[2 x i8]*> [#uses=1]
|
||||
|
||||
declare arm_apcscc void @syStopraw(i32) nounwind
|
||||
declare void @syStopraw(i32) nounwind
|
||||
|
||||
declare arm_apcscc i32 @SyFopen(i8*, i8*) nounwind
|
||||
declare i32 @SyFopen(i8*, i8*) nounwind
|
||||
|
||||
declare arm_apcscc i8* @SyFgets(i8*, i32) nounwind
|
||||
declare i8* @SyFgets(i8*, i32) nounwind
|
||||
|
||||
define arm_apcscc void @SyHelp(i8* nocapture %topic, i32 %fin) nounwind {
|
||||
define void @SyHelp(i8* nocapture %topic, i32 %fin) nounwind {
|
||||
entry:
|
||||
%line = alloca [256 x i8], align 4 ; <[256 x i8]*> [#uses=1]
|
||||
%secname = alloca [1024 x i8], align 4 ; <[1024 x i8]*> [#uses=0]
|
||||
@ -70,7 +70,7 @@ bb163: ; preds = %bb162, %bb161
|
||||
unreachable
|
||||
|
||||
bb224: ; preds = %bb162
|
||||
%0 = call arm_apcscc i32 @SyFopen(i8* undef, i8* getelementptr inbounds ([2 x i8]* @.str41196, i32 0, i32 0)) nounwind ; <i32> [#uses=2]
|
||||
%0 = call i32 @SyFopen(i8* undef, i8* getelementptr inbounds ([2 x i8]* @.str41196, i32 0, i32 0)) nounwind ; <i32> [#uses=2]
|
||||
br i1 false, label %bb297, label %bb300
|
||||
|
||||
bb297: ; preds = %bb224
|
||||
@ -177,7 +177,7 @@ bb369: ; preds = %bb368, %bb356
|
||||
br i1 undef, label %bb373, label %bb388
|
||||
|
||||
bb373: ; preds = %bb383, %bb369
|
||||
%7 = call arm_apcscc i8* @SyFgets(i8* undef, i32 %0) nounwind ; <i8*> [#uses=1]
|
||||
%7 = call i8* @SyFgets(i8* undef, i32 %0) nounwind ; <i8*> [#uses=1]
|
||||
%8 = icmp eq i8* %7, null ; <i1> [#uses=1]
|
||||
br i1 %8, label %bb375, label %bb383
|
||||
|
||||
@ -241,7 +241,7 @@ bb405: ; preds = %bb404, %bb403
|
||||
br i1 undef, label %return, label %bb406
|
||||
|
||||
bb406: ; preds = %bb405
|
||||
call arm_apcscc void @syStopraw(i32 %fin) nounwind
|
||||
call void @syStopraw(i32 %fin) nounwind
|
||||
ret void
|
||||
|
||||
bb407: ; preds = %bb404
|
||||
@ -255,7 +255,7 @@ bb428: ; preds = %bb407
|
||||
br label %bb440
|
||||
|
||||
bb440: ; preds = %bb428, %bb300
|
||||
%13 = call arm_apcscc i8* @SyFgets(i8* undef, i32 %0) nounwind ; <i8*> [#uses=0]
|
||||
%13 = call i8* @SyFgets(i8* undef, i32 %0) nounwind ; <i8*> [#uses=0]
|
||||
br i1 false, label %bb442, label %bb308
|
||||
|
||||
bb442: ; preds = %bb440
|
||||
|
||||
@ -13,7 +13,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-
|
||||
; CHECK: InlineAsm End
|
||||
; CHECK: cmp
|
||||
; CHECK: beq
|
||||
define arm_apcscc void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind {
|
||||
define void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind {
|
||||
entry:
|
||||
%tmp1 = getelementptr inbounds %s1* %this, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0
|
||||
volatile store i32 1, i32* %tmp1, align 4
|
||||
@ -32,9 +32,9 @@ entry:
|
||||
%tmp19 = getelementptr inbounds %s1* %this, i32 0, i32 10
|
||||
store i64 0, i64* %tmp19, align 4
|
||||
%tmp20 = getelementptr inbounds %s1* %this, i32 0, i32 0
|
||||
tail call arm_apcscc void @f1(%s3* %tmp20, i32* %s) nounwind
|
||||
tail call void @f1(%s3* %tmp20, i32* %s) nounwind
|
||||
%tmp21 = shl i32 %format, 6
|
||||
%tmp22 = tail call arm_apcscc zeroext i8 @f2(i32 %format) nounwind
|
||||
%tmp22 = tail call zeroext i8 @f2(i32 %format) nounwind
|
||||
%toBoolnot = icmp eq i8 %tmp22, 0
|
||||
%tmp23 = zext i1 %toBoolnot to i32
|
||||
%flags.0 = or i32 %tmp23, %tmp21
|
||||
@ -59,5 +59,5 @@ return:
|
||||
ret void
|
||||
}
|
||||
|
||||
declare arm_apcscc void @f1(%s3*, i32*)
|
||||
declare arm_apcscc zeroext i8 @f2(i32)
|
||||
declare void @f1(%s3*, i32*)
|
||||
declare zeroext i8 @f2(i32)
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
; Make sure the result of the first dynamic_alloc isn't copied back to sp more
|
||||
; than once. We'll deal with poor codegen later.
|
||||
|
||||
define arm_apcscc void @t() nounwind ssp {
|
||||
define void @t() nounwind ssp {
|
||||
entry:
|
||||
; CHECK: t:
|
||||
; CHECK: mov r0, sp
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
|
||||
target triple = "thumbv7-apple-darwin10"
|
||||
|
||||
define arm_apcscc void @test(i32 %mode) nounwind optsize noinline {
|
||||
define void @test(i32 %mode) nounwind optsize noinline {
|
||||
entry:
|
||||
br i1 undef, label %return, label %bb3
|
||||
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
; Radar 8017376: Missing 's' suffix for t2RSBS instructions.
|
||||
; CHECK: rsbs
|
||||
|
||||
define arm_apcscc i64 @test(i64 %x) nounwind readnone {
|
||||
define i64 @test(i64 %x) nounwind readnone {
|
||||
entry:
|
||||
%0 = sub nsw i64 1, %x ; <i64> [#uses=1]
|
||||
ret i64 %0
|
||||
|
||||
@ -12,7 +12,7 @@ target triple = "thumbv7-apple-darwin10"
|
||||
|
||||
@.str = private constant [7 x i8] c"%g %g\0A\00", align 4 ; <[7 x i8]*> [#uses=1]
|
||||
|
||||
define arm_apcscc i32 @main(i32 %argc, i8** nocapture %Argv) nounwind {
|
||||
define i32 @main(i32 %argc, i8** nocapture %Argv) nounwind {
|
||||
entry:
|
||||
%0 = icmp eq i32 %argc, 2123 ; <i1> [#uses=1]
|
||||
%U.0 = select i1 %0, double 3.282190e+01, double 8.731834e+02 ; <double> [#uses=2]
|
||||
@ -31,11 +31,11 @@ entry:
|
||||
%tmp7 = extractelement <2 x double> %5, i32 0 ; <double> [#uses=1]
|
||||
%tmp5 = extractelement <2 x double> %5, i32 1 ; <double> [#uses=1]
|
||||
; CHECK: printf
|
||||
%7 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp7, double %tmp5) nounwind ; <i32> [#uses=0]
|
||||
%7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp7, double %tmp5) nounwind ; <i32> [#uses=0]
|
||||
%tmp3 = extractelement <2 x double> %6, i32 0 ; <double> [#uses=1]
|
||||
%tmp1 = extractelement <2 x double> %6, i32 1 ; <double> [#uses=1]
|
||||
%8 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp3, double %tmp1) nounwind ; <i32> [#uses=0]
|
||||
%8 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp3, double %tmp1) nounwind ; <i32> [#uses=0]
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
|
||||
declare i32 @printf(i8* nocapture, ...) nounwind
|
||||
|
||||
@ -4,9 +4,9 @@
|
||||
%struct.__sFILEX = type opaque
|
||||
%struct.__sbuf = type { i8*, i32 }
|
||||
|
||||
declare arm_apcscc i32 @fgetc(%struct.FILE* nocapture) nounwind
|
||||
declare i32 @fgetc(%struct.FILE* nocapture) nounwind
|
||||
|
||||
define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
|
||||
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
|
||||
entry:
|
||||
br i1 undef, label %bb, label %bb1
|
||||
|
||||
@ -20,7 +20,7 @@ bb.i1: ; preds = %bb1
|
||||
unreachable
|
||||
|
||||
bb1.i2: ; preds = %bb1
|
||||
%0 = call arm_apcscc i32 @fgetc(%struct.FILE* undef) nounwind ; <i32> [#uses=0]
|
||||
%0 = call i32 @fgetc(%struct.FILE* undef) nounwind ; <i32> [#uses=0]
|
||||
br i1 undef, label %bb2.i3, label %bb3.i4
|
||||
|
||||
bb2.i3: ; preds = %bb1.i2
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 1
|
||||
|
||||
define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind {
|
||||
define void @fht(float* nocapture %fz, i16 signext %n) nounwind {
|
||||
entry:
|
||||
br label %bb5
|
||||
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -disable-fp-elim | not grep mov
|
||||
; RUN: llc < %s -mtriple=thumbv7-linux -disable-fp-elim | not grep mov
|
||||
|
||||
define arm_apcscc void @t() nounwind readnone {
|
||||
define void @t() nounwind readnone {
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
%struct.noise3 = type { [3 x [17 x i32]] }
|
||||
%struct.noiseguard = type { i32, i32, i32 }
|
||||
|
||||
define arm_apcscc void @vorbis_encode_noisebias_setup(i8* nocapture %vi.0.7.val, double %s, i32 %block, i32* nocapture %suppress, %struct.noise3* nocapture %in, %struct.noiseguard* nocapture %guard, double %userbias) nounwind {
|
||||
define void @vorbis_encode_noisebias_setup(i8* nocapture %vi.0.7.val, double %s, i32 %block, i32* nocapture %suppress, %struct.noise3* nocapture %in, %struct.noiseguard* nocapture %guard, double %userbias) nounwind {
|
||||
entry:
|
||||
%0 = getelementptr %struct.noiseguard* %guard, i32 %block, i32 2; <i32*> [#uses=1]
|
||||
%1 = load i32* %0, align 4 ; <i32> [#uses=1]
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
@a = common global float 0.000000e+00 ; <float*> [#uses=2]
|
||||
@b = common global float 0.000000e+00 ; <float*> [#uses=1]
|
||||
|
||||
define arm_apcscc float @t(i32 %c) nounwind {
|
||||
define float @t(i32 %c) nounwind {
|
||||
entry:
|
||||
%0 = icmp sgt i32 %c, 1 ; <i1> [#uses=1]
|
||||
%1 = load float* @a, align 4 ; <float> [#uses=2]
|
||||
|
||||
@ -20,7 +20,7 @@
|
||||
@zz_hold = external global %union.rec* ; <%union.rec**> [#uses=2]
|
||||
@zz_res = external global %union.rec* ; <%union.rec**> [#uses=1]
|
||||
|
||||
define arm_apcscc %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind {
|
||||
define %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind {
|
||||
entry:
|
||||
; CHECK: ldr.w r9, [r7, #28]
|
||||
%xgaps.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0]
|
||||
@ -56,7 +56,7 @@ bb420: ; preds = %bb20, %bb20
|
||||
store %union.rec* null, %union.rec** @zz_hold, align 4
|
||||
store %union.rec* null, %union.rec** @zz_res, align 4
|
||||
store %union.rec* %x, %union.rec** @zz_hold, align 4
|
||||
%0 = call arm_apcscc %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0]
|
||||
%0 = call %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0]
|
||||
unreachable
|
||||
|
||||
bb438: ; preds = %bb20, %bb20
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
@G = external global i32 ; <i32*> [#uses=2]
|
||||
@array = external global i32* ; <i32**> [#uses=1]
|
||||
|
||||
define arm_apcscc void @t() nounwind optsize {
|
||||
define void @t() nounwind optsize {
|
||||
; CHECK: t:
|
||||
; CHECK: mov.w r2, #1000
|
||||
entry:
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
@GV = external global i32 ; <i32*> [#uses=2]
|
||||
|
||||
define arm_apcscc void @t1(i32* nocapture %vals, i32 %c) nounwind {
|
||||
define void @t1(i32* nocapture %vals, i32 %c) nounwind {
|
||||
entry:
|
||||
; CHECK: t1:
|
||||
; CHECK: cbz
|
||||
@ -52,7 +52,7 @@ return: ; preds = %bb, %entry
|
||||
}
|
||||
|
||||
; rdar://8001136
|
||||
define arm_apcscc void @t2(i8* %ptr1, i8* %ptr2) nounwind {
|
||||
define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
|
||||
entry:
|
||||
; CHECK: t2:
|
||||
; CHECK: adr r{{.}}, #LCPI1_0
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
@__dso_handle = external global { } ; <{ }*> [#uses=1]
|
||||
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (void ()*)* @atexit to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
|
||||
|
||||
define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind {
|
||||
define hidden i32 @atexit(void ()* %func) nounwind {
|
||||
entry:
|
||||
; CHECK: atexit:
|
||||
; CHECK: add r0, pc
|
||||
@ -14,8 +14,8 @@ entry:
|
||||
store void ()* %func, void ()** %0, align 4
|
||||
%1 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 1 ; <i32*> [#uses=1]
|
||||
store i32 0, i32* %1, align 4
|
||||
%2 = call arm_apcscc i32 @atexit_common(%struct.one_atexit_routine* %r, i8* bitcast ({ }* @__dso_handle to i8*)) nounwind ; <i32> [#uses=1]
|
||||
%2 = call i32 @atexit_common(%struct.one_atexit_routine* %r, i8* bitcast ({ }* @__dso_handle to i8*)) nounwind ; <i32> [#uses=1]
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
declare arm_apcscc i32 @atexit_common(%struct.one_atexit_routine*, i8*) nounwind
|
||||
declare i32 @atexit_common(%struct.one_atexit_routine*, i8*) nounwind
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
|
||||
target triple = "thumbv7-apple-darwin10"
|
||||
|
||||
define arm_apcscc i32 @f1(i16* %ptr) nounwind {
|
||||
define i32 @f1(i16* %ptr) nounwind {
|
||||
; CHECK-A8: f1
|
||||
; CHECK-A8: sxth
|
||||
; CHECK-M3: f1
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user