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Re-apply 89011. It's not to be blamed.

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llvm-svn: 89081
This commit is contained in:
Evan Cheng 2009-11-17 09:51:18 +00:00
parent e36c429c3b
commit d7cf6167f1
2 changed files with 7 additions and 4 deletions
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5
lib/Target/X86/X86InstrInfo.cpp
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@ -869,10 +869,13 @@ X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,
case X86::MOVSDrm: case X86::MOVSDrm:
case X86::MOVAPSrm: case X86::MOVAPSrm:
case X86::MOVUPSrm: case X86::MOVUPSrm:
case X86::MOVUPSrm_Int:
case X86::MOVAPDrm: case X86::MOVAPDrm:
case X86::MOVDQArm: case X86::MOVDQArm:
case X86::MMX_MOVD64rm: case X86::MMX_MOVD64rm:
case X86::MMX_MOVQ64rm: { case X86::MMX_MOVQ64rm:
case X86::FsMOVAPSrm:
case X86::FsMOVAPDrm: {
// Loads from constant pools are trivially rematerializable. // Loads from constant pools are trivially rematerializable.
if (MI->getOperand(1).isReg() && if (MI->getOperand(1).isReg() &&
MI->getOperand(2).isImm() && MI->getOperand(2).isImm() &&

6
lib/Target/X86/X86InstrSSE.td
View File

@ -497,7 +497,7 @@ def FsMOVAPSrr : PSI<0x28, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src),
// Alias instruction to load FR32 from f128mem using movaps. Upper bits are // Alias instruction to load FR32 from f128mem using movaps. Upper bits are
// disregarded. // disregarded.
let canFoldAsLoad = 1 in let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in
def FsMOVAPSrm : PSI<0x28, MRMSrcMem, (outs FR32:$dst), (ins f128mem:$src), def FsMOVAPSrm : PSI<0x28, MRMSrcMem, (outs FR32:$dst), (ins f128mem:$src),
"movaps\t{$src, $dst|$dst, $src}", "movaps\t{$src, $dst|$dst, $src}",
[(set FR32:$dst, (alignedloadfsf32 addr:$src))]>; [(set FR32:$dst, (alignedloadfsf32 addr:$src))]>;
@ -715,7 +715,7 @@ def MOVUPSmr : PSI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
[(store (v4f32 VR128:$src), addr:$dst)]>; [(store (v4f32 VR128:$src), addr:$dst)]>;
// Intrinsic forms of MOVUPS load and store // Intrinsic forms of MOVUPS load and store
let canFoldAsLoad = 1 in let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in
def MOVUPSrm_Int : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), def MOVUPSrm_Int : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
"movups\t{$src, $dst|$dst, $src}", "movups\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, (int_x86_sse_loadu_ps addr:$src))]>; [(set VR128:$dst, (int_x86_sse_loadu_ps addr:$src))]>;
@ -1256,7 +1256,7 @@ def FsMOVAPDrr : PDI<0x28, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src),
// Alias instruction to load FR64 from f128mem using movapd. Upper bits are // Alias instruction to load FR64 from f128mem using movapd. Upper bits are
// disregarded. // disregarded.
let canFoldAsLoad = 1 in let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in
def FsMOVAPDrm : PDI<0x28, MRMSrcMem, (outs FR64:$dst), (ins f128mem:$src), def FsMOVAPDrm : PDI<0x28, MRMSrcMem, (outs FR64:$dst), (ins f128mem:$src),
"movapd\t{$src, $dst|$dst, $src}", "movapd\t{$src, $dst|$dst, $src}",
[(set FR64:$dst, (alignedloadfsf64 addr:$src))]>; [(set FR64:$dst, (alignedloadfsf64 addr:$src))]>;