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Define function MipsMCInstLower::LowerOperand.
llvm-svn: 137707
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@ -83,36 +83,39 @@ MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
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Ctx));
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}
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void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
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OutMI.setOpcode(MI->getOpcode());
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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MCOperand MCOp;
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MCOperand MipsMCInstLower::LowerOperand(const MachineOperand& MO) const {
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MachineOperandType MOTy = MO.getType();
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switch (MOTy) {
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default:
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MI->dump();
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llvm_unreachable("unknown operand type");
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assert(0 && "unknown operand type");
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break;
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case MachineOperand::MO_Register:
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// Ignore all implicit register operands.
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if (MO.isImplicit()) continue;
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MCOp = MCOperand::CreateReg(MO.getReg());
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break;
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if (MO.isImplicit()) break;
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return MCOperand::CreateReg(MO.getReg());
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case MachineOperand::MO_Immediate:
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MCOp = MCOperand::CreateImm(MO.getImm());
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break;
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return MCOperand::CreateImm(MO.getImm());
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_GlobalAddress:
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case MachineOperand::MO_ExternalSymbol:
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case MachineOperand::MO_JumpTableIndex:
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case MachineOperand::MO_ConstantPoolIndex:
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case MachineOperand::MO_BlockAddress:
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MCOp = LowerSymbolOperand(MO, MOTy, 0);
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break;
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return LowerSymbolOperand(MO, MOTy, 0);
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}
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return MCOperand();
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}
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void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
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OutMI.setOpcode(MI->getOpcode());
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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MCOperand MCOp = LowerOperand(MO);
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if (MCOp.isValid())
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OutMI.addOperand(MCOp);
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}
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}
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@ -37,6 +37,7 @@ public:
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private:
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MCOperand LowerSymbolOperand(const MachineOperand &MO,
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MachineOperandType MOTy, unsigned Offset) const;
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MCOperand LowerOperand(const MachineOperand& MO) const;
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};
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}
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