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[AArch64][x86] add tests for unsigned subtract with overflow; NFC
llvm-svn: 353178
This commit is contained in:
Sanjay Patel
parent
7069843067
commit
d8f3430e74
197
test/CodeGen/AArch64/cgp-usubo.ll
Normal file
197
test/CodeGen/AArch64/cgp-usubo.ll
Normal file
@ -0,0 +1,197 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
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; CodeGenPrepare is expected to form overflow intrinsics to improve DAG/isel.
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define i1 @usubo_ult_i64(i64 %x, i64 %y, i64* %p) nounwind {
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; CHECK-LABEL: usubo_ult_i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: subs x8, x0, x1
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: str x8, [x2]
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; CHECK-NEXT: ret
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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%ov = icmp ult i64 %x, %y
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ret i1 %ov
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}
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; Verify insertion point for single-BB. Toggle predicate.
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define i1 @usubo_ugt_i32(i32 %x, i32 %y, i32* %p) nounwind {
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; CHECK-LABEL: usubo_ugt_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp w1, w0
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; CHECK-NEXT: cset w8, hi
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; CHECK-NEXT: sub w9, w0, w1
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: str w9, [x2]
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; CHECK-NEXT: ret
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%ov = icmp ugt i32 %y, %x
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%s = sub i32 %x, %y
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store i32 %s, i32* %p
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ret i1 %ov
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}
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; Constant operand should match.
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define i1 @usubo_ugt_constant_op0_i8(i8 %x, i8* %p) nounwind {
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; CHECK-LABEL: usubo_ugt_constant_op0_i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and w8, w0, #0xff
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; CHECK-NEXT: mov w9, #42
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; CHECK-NEXT: cmp w8, #42 // =42
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; CHECK-NEXT: sub w9, w9, w0
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: strb w9, [x1]
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; CHECK-NEXT: ret
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%s = sub i8 42, %x
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%ov = icmp ugt i8 %x, 42
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store i8 %s, i8* %p
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ret i1 %ov
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}
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; Compare with constant operand 0 is canonicalized by commuting, but verify match for non-canonical form.
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define i1 @usubo_ult_constant_op0_i16(i16 %x, i16* %p) nounwind {
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; CHECK-LABEL: usubo_ult_constant_op0_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and w8, w0, #0xffff
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; CHECK-NEXT: mov w9, #43
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; CHECK-NEXT: cmp w8, #43 // =43
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; CHECK-NEXT: sub w9, w9, w0
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: strh w9, [x1]
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; CHECK-NEXT: ret
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%s = sub i16 43, %x
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%ov = icmp ult i16 43, %x
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store i16 %s, i16* %p
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ret i1 %ov
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}
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; Subtract with constant operand 1 is canonicalized to add.
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define i1 @usubo_ult_constant_op1_i16(i16 %x, i16* %p) nounwind {
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; CHECK-LABEL: usubo_ult_constant_op1_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and w8, w0, #0xffff
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; CHECK-NEXT: cmp w8, #44 // =44
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; CHECK-NEXT: sub w9, w0, #44 // =44
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: strh w9, [x1]
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; CHECK-NEXT: ret
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%s = add i16 %x, -44
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%ov = icmp ult i16 %x, 44
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store i16 %s, i16* %p
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ret i1 %ov
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}
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define i1 @usubo_ugt_constant_op1_i8(i8 %x, i8* %p) nounwind {
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; CHECK-LABEL: usubo_ugt_constant_op1_i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and w8, w0, #0xff
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; CHECK-NEXT: cmp w8, #45 // =45
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; CHECK-NEXT: cset w8, lo
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; CHECK-NEXT: sub w9, w0, #45 // =45
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: strb w9, [x1]
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; CHECK-NEXT: ret
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%ov = icmp ugt i8 45, %x
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%s = add i8 %x, -45
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store i8 %s, i8* %p
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ret i1 %ov
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}
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; Special-case: subtract 1 changes the compare predicate and constant.
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define i1 @usubo_eq_constant1_op1_i32(i32 %x, i32* %p) nounwind {
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; CHECK-LABEL: usubo_eq_constant1_op1_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp w0, #0 // =0
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; CHECK-NEXT: sub w8, w0, #1 // =1
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: str w8, [x1]
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; CHECK-NEXT: ret
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%s = add i32 %x, -1
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%ov = icmp eq i32 %x, 0
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store i32 %s, i32* %p
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ret i1 %ov
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}
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; Verify insertion point for multi-BB.
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declare void @call(i1)
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define i1 @usubo_ult_sub_dominates_i64(i64 %x, i64 %y, i64* %p, i1 %cond) nounwind {
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; CHECK-LABEL: usubo_ult_sub_dominates_i64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: tbz w3, #0, .LBB7_2
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; CHECK-NEXT: // %bb.1: // %t
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; CHECK-NEXT: subs x8, x0, x1
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: str x8, [x2]
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB7_2: // %f
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; CHECK-NEXT: and w0, w3, #0x1
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; CHECK-NEXT: ret
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entry:
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br i1 %cond, label %t, label %f
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t:
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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br i1 %cond, label %end, label %f
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f:
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ret i1 %cond
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end:
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%ov = icmp ult i64 %x, %y
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ret i1 %ov
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}
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define i1 @usubo_ult_cmp_dominates_i64(i64 %x, i64 %y, i64* %p, i1 %cond) nounwind {
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; CHECK-LABEL: usubo_ult_cmp_dominates_i64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: str x22, [sp, #-48]! // 8-byte Folded Spill
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; CHECK-NEXT: stp x21, x20, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: mov w20, w3
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; CHECK-NEXT: stp x19, x30, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: tbz w3, #0, .LBB8_3
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; CHECK-NEXT: // %bb.1: // %t
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; CHECK-NEXT: cmp x0, x1
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; CHECK-NEXT: mov x22, x0
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: mov x19, x2
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; CHECK-NEXT: mov x21, x1
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; CHECK-NEXT: bl call
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; CHECK-NEXT: subs x8, x22, x21
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; CHECK-NEXT: b.hs .LBB8_3
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; CHECK-NEXT: // %bb.2: // %end
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: str x8, [x19]
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; CHECK-NEXT: b .LBB8_4
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; CHECK-NEXT: .LBB8_3: // %f
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; CHECK-NEXT: and w0, w20, #0x1
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; CHECK-NEXT: .LBB8_4: // %f
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; CHECK-NEXT: ldp x19, x30, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldp x21, x20, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x22, [sp], #48 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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br i1 %cond, label %t, label %f
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t:
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%ov = icmp ult i64 %x, %y
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call void @call(i1 %ov)
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br i1 %ov, label %end, label %f
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f:
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ret i1 %cond
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end:
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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ret i1 %ov
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}
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205
test/CodeGen/X86/cgp-usubo.ll
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205
test/CodeGen/X86/cgp-usubo.ll
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@ -0,0 +1,205 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
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; CodeGenPrepare is expected to form overflow intrinsics to improve DAG/isel.
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define i1 @usubo_ult_i64(i64 %x, i64 %y, i64* %p) nounwind {
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; CHECK-LABEL: usubo_ult_i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq %rsi, %rdi
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; CHECK-NEXT: movq %rdi, (%rdx)
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: retq
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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%ov = icmp ult i64 %x, %y
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ret i1 %ov
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}
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; Verify insertion point for single-BB. Toggle predicate.
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define i1 @usubo_ugt_i32(i32 %x, i32 %y, i32* %p) nounwind {
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; CHECK-LABEL: usubo_ugt_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpl %edi, %esi
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; CHECK-NEXT: seta %al
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; CHECK-NEXT: subl %esi, %edi
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; CHECK-NEXT: movl %edi, (%rdx)
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; CHECK-NEXT: retq
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%ov = icmp ugt i32 %y, %x
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%s = sub i32 %x, %y
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store i32 %s, i32* %p
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ret i1 %ov
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}
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; Constant operand should match.
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define i1 @usubo_ugt_constant_op0_i8(i8 %x, i8* %p) nounwind {
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; CHECK-LABEL: usubo_ugt_constant_op0_i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movb $42, %cl
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; CHECK-NEXT: subb %dil, %cl
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; CHECK-NEXT: cmpb $42, %dil
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; CHECK-NEXT: seta %al
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; CHECK-NEXT: movb %cl, (%rsi)
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; CHECK-NEXT: retq
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%s = sub i8 42, %x
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%ov = icmp ugt i8 %x, 42
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store i8 %s, i8* %p
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ret i1 %ov
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}
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; Compare with constant operand 0 is canonicalized by commuting, but verify match for non-canonical form.
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define i1 @usubo_ult_constant_op0_i16(i16 %x, i16* %p) nounwind {
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; CHECK-LABEL: usubo_ult_constant_op0_i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl $43, %ecx
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; CHECK-NEXT: subl %edi, %ecx
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; CHECK-NEXT: cmpw $43, %di
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; CHECK-NEXT: seta %al
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; CHECK-NEXT: movw %cx, (%rsi)
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; CHECK-NEXT: retq
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%s = sub i16 43, %x
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%ov = icmp ult i16 43, %x
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store i16 %s, i16* %p
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ret i1 %ov
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}
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; Subtract with constant operand 1 is canonicalized to add.
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define i1 @usubo_ult_constant_op1_i16(i16 %x, i16* %p) nounwind {
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; CHECK-LABEL: usubo_ult_constant_op1_i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %ecx
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; CHECK-NEXT: addl $-44, %ecx
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; CHECK-NEXT: cmpw $44, %di
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movw %cx, (%rsi)
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; CHECK-NEXT: retq
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%s = add i16 %x, -44
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%ov = icmp ult i16 %x, 44
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store i16 %s, i16* %p
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ret i1 %ov
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}
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define i1 @usubo_ugt_constant_op1_i8(i8 %x, i8* %p) nounwind {
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; CHECK-LABEL: usubo_ugt_constant_op1_i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpb $45, %dil
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: addb $-45, %dil
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; CHECK-NEXT: movb %dil, (%rsi)
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; CHECK-NEXT: retq
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%ov = icmp ugt i8 45, %x
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%s = add i8 %x, -45
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store i8 %s, i8* %p
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ret i1 %ov
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}
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; Special-case: subtract 1 changes the compare predicate and constant.
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define i1 @usubo_eq_constant1_op1_i32(i32 %x, i32* %p) nounwind {
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; CHECK-LABEL: usubo_eq_constant1_op1_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: leal -1(%rdi), %ecx
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: movl %ecx, (%rsi)
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; CHECK-NEXT: retq
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%s = add i32 %x, -1
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%ov = icmp eq i32 %x, 0
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store i32 %s, i32* %p
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ret i1 %ov
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}
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; Verify insertion point for multi-BB.
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declare void @call(i1)
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define i1 @usubo_ult_sub_dominates_i64(i64 %x, i64 %y, i64* %p, i1 %cond) nounwind {
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; CHECK-LABEL: usubo_ult_sub_dominates_i64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: testb $1, %cl
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; CHECK-NEXT: je .LBB7_2
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; CHECK-NEXT: # %bb.1: # %t
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: subq %rsi, %rax
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; CHECK-NEXT: movq %rax, (%rdx)
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; CHECK-NEXT: testb $1, %cl
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; CHECK-NEXT: je .LBB7_2
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; CHECK-NEXT: # %bb.3: # %end
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; CHECK-NEXT: cmpq %rsi, %rdi
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB7_2: # %f
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %t, label %f
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t:
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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br i1 %cond, label %end, label %f
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f:
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ret i1 %cond
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end:
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%ov = icmp ult i64 %x, %y
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ret i1 %ov
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}
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define i1 @usubo_ult_cmp_dominates_i64(i64 %x, i64 %y, i64* %p, i1 %cond) nounwind {
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; CHECK-LABEL: usubo_ult_cmp_dominates_i64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbp
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; CHECK-NEXT: pushq %r15
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; CHECK-NEXT: pushq %r14
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: movl %ecx, %ebp
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; CHECK-NEXT: testb $1, %bpl
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; CHECK-NEXT: je .LBB8_2
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; CHECK-NEXT: # %bb.1: # %t
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; CHECK-NEXT: movq %rdx, %r14
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; CHECK-NEXT: movq %rsi, %r15
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; CHECK-NEXT: movq %rdi, %rbx
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: cmpq %rsi, %rbx
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; CHECK-NEXT: setb %dil
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; CHECK-NEXT: callq call
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; CHECK-NEXT: subq %r15, %rbx
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; CHECK-NEXT: jae .LBB8_2
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; CHECK-NEXT: # %bb.4: # %end
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movq %rbx, (%r14)
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; CHECK-NEXT: jmp .LBB8_3
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; CHECK-NEXT: .LBB8_2: # %f
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; CHECK-NEXT: movl %ebp, %eax
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; CHECK-NEXT: .LBB8_3: # %f
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; CHECK-NEXT: addq $8, %rsp
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: popq %r14
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; CHECK-NEXT: popq %r15
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; CHECK-NEXT: popq %rbp
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %t, label %f
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t:
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%ov = icmp ult i64 %x, %y
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call void @call(i1 %ov)
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br i1 %ov, label %end, label %f
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f:
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ret i1 %cond
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end:
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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ret i1 %ov
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}
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