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Declare register classes as const. Fix a couple pointers to register classes that weren't already const.
llvm-svn: 151138
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@ -2269,7 +2269,7 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) {
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// On x86-32, only the ABCD registers have 8-bit subregisters.
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if (!Subtarget->is64Bit()) {
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TargetRegisterClass *TRC = 0;
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const TargetRegisterClass *TRC;
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switch (N0.getValueType().getSimpleVT().SimpleTy) {
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case MVT::i32: TRC = &X86::GR32_ABCDRegClass; break;
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case MVT::i16: TRC = &X86::GR16_ABCDRegClass; break;
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@ -2298,7 +2298,7 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) {
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SDValue Reg = N0.getNode()->getOperand(0);
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// Put the value in an ABCD register.
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TargetRegisterClass *TRC = 0;
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const TargetRegisterClass *TRC;
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switch (N0.getValueType().getSimpleVT().SimpleTy) {
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case MVT::i64: TRC = &X86::GR64_ABCDRegClass; break;
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case MVT::i32: TRC = &X86::GR32_ABCDRegClass; break;
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@ -480,7 +480,7 @@ RegisterInfoEmitter::runTargetHeader(raw_ostream &OS, CodeGenTarget &Target,
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OS << " };\n";
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// Output the extern for the instance.
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OS << " extern " << Name << "Class\t" << Name << "RegClass;\n";
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OS << " extern const " << Name << "Class " << Name << "RegClass;\n";
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// Output the extern for the pointer to the instance (should remove).
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OS << " static const TargetRegisterClass * const " << Name
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<< "RegisterClass = &" << Name << "RegClass;\n";
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@ -548,8 +548,9 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
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OS << "namespace " << RegisterClasses[0]->Namespace
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<< " { // Register class instances\n";
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for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
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OS << " " << RegisterClasses[i]->getName() << "Class\t"
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<< RegisterClasses[i]->getName() << "RegClass;\n";
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OS << " extern const " << RegisterClasses[i]->getName() << "Class "
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<< RegisterClasses[i]->getName() << "RegClass = "
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<< RegisterClasses[i]->getName() << "Class();\n";
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std::map<unsigned, std::set<unsigned> > SuperRegClassMap;
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