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[PowerPC] Exploit vnmsubfp instruction
On PowerPC, we have vnmsubfp Altivec instruction for fnmsub operation on v4f32 type. Default pattern for this instruction never works since we don't have legal fneg for v4f32 when VSX disabled. Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D80617
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@ -16287,8 +16287,7 @@ SDValue PPCTargetLowering::combineFMALike(SDNode *N,
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SDLoc Loc(N);
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// TODO: QPX subtarget is deprecated. No transformation here.
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if (Subtarget.hasQPX() || !isOperationLegal(ISD::FMA, VT) ||
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(VT.isVector() && !Subtarget.hasVSX()))
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if (Subtarget.hasQPX() || !isOperationLegal(ISD::FMA, VT))
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return SDValue();
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// Allowing transformation to FNMSUB may change sign of zeroes when ab-c=0
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@ -1024,6 +1024,9 @@ def : Pat<(fmul v4f32:$vA, v4f32:$vB),
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(VMADDFP $vA, $vB,
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(v4i32 (VSLW (v4i32 (V_SETALLONES)), (v4i32 (V_SETALLONES)))))>;
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def : Pat<(PPCfnmsub v4f32:$A, v4f32:$B, v4f32:$C),
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(VNMSUBFP $A, $B, $C)>;
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def : Pat<(int_ppc_altivec_vmaddfp v4f32:$A, v4f32:$B, v4f32:$C),
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(VMADDFP $A, $B, $C)>;
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def : Pat<(int_ppc_altivec_vnmsubfp v4f32:$A, v4f32:$B, v4f32:$C),
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@ -304,10 +304,7 @@ define <4 x float> @test_fast_neg_fma_v4f32(<4 x float> %a, <4 x float> %b,
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;
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; NO-VSX-LABEL: test_fast_neg_fma_v4f32:
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; NO-VSX: # %bb.0: # %entry
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; NO-VSX-NEXT: vspltisb 5, -1
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; NO-VSX-NEXT: vslw 5, 5, 5
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; NO-VSX-NEXT: vsubfp 2, 5, 2
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; NO-VSX-NEXT: vmaddfp 2, 2, 3, 4
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; NO-VSX-NEXT: vnmsubfp 2, 2, 3, 4
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; NO-VSX-NEXT: blr
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<4 x float> %c) {
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entry:
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@ -679,12 +679,9 @@ define <4 x float> @hoo2_fmf(<4 x float> %a, <4 x float> %b) nounwind {
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; CHECK-P7: # %bb.0:
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; CHECK-P7-NEXT: vspltisw 4, -1
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; CHECK-P7-NEXT: vrefp 5, 3
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; CHECK-P7-NEXT: vspltisb 0, -1
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; CHECK-P7-NEXT: vslw 0, 0, 0
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; CHECK-P7-NEXT: vslw 4, 4, 4
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; CHECK-P7-NEXT: vsubfp 3, 0, 3
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; CHECK-P7-NEXT: vmaddfp 4, 2, 5, 4
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; CHECK-P7-NEXT: vmaddfp 2, 3, 4, 2
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; CHECK-P7-NEXT: vnmsubfp 2, 3, 4, 2
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; CHECK-P7-NEXT: vmaddfp 2, 5, 2, 4
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; CHECK-P7-NEXT: blr
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;
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