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Use SmallVectorImpl instead of SmallVector for iterators and references to avoid specifying the vector size unnecessarily.
llvm-svn: 185512
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cb5bf5d646
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@ -72,7 +72,8 @@ private:
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class SDDbgInfo {
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SmallVector<SDDbgValue*, 32> DbgValues;
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SmallVector<SDDbgValue*, 32> ByvalParmDbgValues;
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DenseMap<const SDNode*, SmallVector<SDDbgValue*, 2> > DbgValMap;
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typedef DenseMap<const SDNode*, SmallVector<SDDbgValue*, 2> > DbgValMapType;
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DbgValMapType DbgValMap;
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void operator=(const SDDbgInfo&) LLVM_DELETED_FUNCTION;
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SDDbgInfo(const SDDbgInfo&) LLVM_DELETED_FUNCTION;
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@ -98,14 +99,13 @@ public:
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}
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ArrayRef<SDDbgValue*> getSDDbgValues(const SDNode *Node) {
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DenseMap<const SDNode*, SmallVector<SDDbgValue*, 2> >::iterator I =
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DbgValMap.find(Node);
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DbgValMapType::iterator I = DbgValMap.find(Node);
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if (I != DbgValMap.end())
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return I->second;
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return ArrayRef<SDDbgValue*>();
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}
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typedef SmallVector<SDDbgValue*,32>::iterator DbgIterator;
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typedef SmallVectorImpl<SDDbgValue*>::iterator DbgIterator;
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DbgIterator DbgBegin() { return DbgValues.begin(); }
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DbgIterator DbgEnd() { return DbgValues.end(); }
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DbgIterator ByvalParmDbgBegin() { return ByvalParmDbgValues.begin(); }
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@ -388,7 +388,7 @@ findSuitableFreeRegister(RegRefIter RegRefBegin,
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continue;
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// If NewReg overlaps any of the forbidden registers, we can't use it.
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bool Forbidden = false;
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for (SmallVector<unsigned, 2>::iterator it = Forbid.begin(),
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for (SmallVectorImpl<unsigned>::iterator it = Forbid.begin(),
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ite = Forbid.end(); it != ite; ++it)
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if (TRI->regsOverlap(NewReg, *it)) {
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Forbidden = true;
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@ -573,7 +573,7 @@ void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
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// Kill off any remaining uses that don't match available, and build a list of
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// incoming DomainValues that we want to merge.
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SmallVector<LiveReg, 4> Regs;
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for (SmallVector<int, 4>::iterator i=used.begin(), e=used.end(); i!=e; ++i) {
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for (SmallVectorImpl<int>::iterator i=used.begin(), e=used.end(); i!=e; ++i) {
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int rx = *i;
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const LiveReg &LR = LiveRegs[rx];
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// This useless DomainValue could have been missed above.
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@ -583,7 +583,7 @@ void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
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}
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// Sorted insertion.
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bool Inserted = false;
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for (SmallVector<LiveReg, 4>::iterator i = Regs.begin(), e = Regs.end();
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for (SmallVectorImpl<LiveReg>::iterator i = Regs.begin(), e = Regs.end();
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i != e && !Inserted; ++i) {
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if (LR.Def < i->Def) {
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Inserted = true;
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@ -614,7 +614,7 @@ void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
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continue;
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// If latest didn't merge, it is useless now. Kill all registers using it.
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for (SmallVector<int,4>::iterator i=used.begin(), e=used.end(); i != e; ++i)
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for (SmallVectorImpl<int>::iterator i=used.begin(), e=used.end(); i!=e; ++i)
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if (LiveRegs[*i].Value == Latest)
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kill(*i);
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}
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@ -609,9 +609,9 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
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// if they have PHI nodes, and if so, we simulate an assignment at the end
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// of the current block.
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if (!PHIVarInfo[MBB->getNumber()].empty()) {
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SmallVector<unsigned, 4>& VarInfoVec = PHIVarInfo[MBB->getNumber()];
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SmallVectorImpl<unsigned> &VarInfoVec = PHIVarInfo[MBB->getNumber()];
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for (SmallVector<unsigned, 4>::iterator I = VarInfoVec.begin(),
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for (SmallVectorImpl<unsigned>::iterator I = VarInfoVec.begin(),
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E = VarInfoVec.end(); I != E; ++I)
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// Mark it alive only in the block we are representing.
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MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(),
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@ -537,8 +537,8 @@ MachineBasicBlock *MachineSinking::FindSuccToSinkTo(MachineInstr *MI,
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// We give successors with smaller loop depth higher priority.
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SmallVector<MachineBasicBlock*, 4> Succs(MBB->succ_begin(), MBB->succ_end());
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std::stable_sort(Succs.begin(), Succs.end(), SuccessorSorter(LI));
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for (SmallVector<MachineBasicBlock*, 4>::iterator SI = Succs.begin(),
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E = Succs.end(); SI != E; ++SI) {
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for (SmallVectorImpl<MachineBasicBlock *>::iterator SI = Succs.begin(),
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E = Succs.end(); SI != E; ++SI) {
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MachineBasicBlock *SuccBlock = *SI;
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bool LocalUse = false;
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if (AllUsesDominatedByBlock(Reg, SuccBlock, MBB,
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@ -697,7 +697,7 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
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++MachineBasicBlock::iterator(MI));
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// Move debug values.
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for (SmallVector<MachineInstr *, 2>::iterator DBI = DbgValuesToSink.begin(),
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for (SmallVectorImpl<MachineInstr *>::iterator DBI = DbgValuesToSink.begin(),
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DBE = DbgValuesToSink.end(); DBI != DBE; ++DBI) {
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MachineInstr *DbgMI = *DBI;
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SuccToSinkTo->splice(InsertPos, ParentBlock, DbgMI,
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@ -331,7 +331,7 @@ AnalysisID TargetPassConfig::addPass(AnalysisID PassID) {
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addPass(P); // Ends the lifetime of P.
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// Add the passes after the pass P if there is any.
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for (SmallVector<std::pair<AnalysisID, IdentifyingPassPtr>, 4>::iterator
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for (SmallVectorImpl<std::pair<AnalysisID, IdentifyingPassPtr> >::iterator
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I = Impl->InsertedPasses.begin(), E = Impl->InsertedPasses.end();
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I != E; ++I) {
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if ((*I).first == PassID) {
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@ -564,8 +564,8 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
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!RegInfo->needsStackRealignment(Fn)) {
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SmallVector<int, 2> SFIs;
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RS->getScavengingFrameIndices(SFIs);
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for (SmallVector<int, 2>::iterator I = SFIs.begin(),
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IE = SFIs.end(); I != IE; ++I)
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for (SmallVectorImpl<int>::iterator I = SFIs.begin(),
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IE = SFIs.end(); I != IE; ++I)
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AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
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}
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@ -649,8 +649,8 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
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!RegInfo->useFPForScavengingIndex(Fn))) {
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SmallVector<int, 2> SFIs;
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RS->getScavengingFrameIndices(SFIs);
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for (SmallVector<int, 2>::iterator I = SFIs.begin(),
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IE = SFIs.end(); I != IE; ++I)
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for (SmallVectorImpl<int>::iterator I = SFIs.begin(),
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IE = SFIs.end(); I != IE; ++I)
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AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
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}
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@ -44,8 +44,8 @@ bool RegScavenger::isAliasUsed(unsigned Reg) const {
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}
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void RegScavenger::initRegState() {
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for (SmallVector<ScavengedInfo, 2>::iterator I = Scavenged.begin(),
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IE = Scavenged.end(); I != IE; ++I) {
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for (SmallVectorImpl<ScavengedInfo>::iterator I = Scavenged.begin(),
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IE = Scavenged.end(); I != IE; ++I) {
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I->Reg = 0;
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I->Restore = NULL;
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}
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@ -181,8 +181,8 @@ void RegScavenger::forward() {
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MachineInstr *MI = MBBI;
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for (SmallVector<ScavengedInfo, 2>::iterator I = Scavenged.begin(),
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IE = Scavenged.end(); I != IE; ++I) {
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for (SmallVectorImpl<ScavengedInfo>::iterator I = Scavenged.begin(),
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IE = Scavenged.end(); I != IE; ++I) {
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if (I->Restore != MI)
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continue;
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@ -64,8 +64,8 @@ const MCInstrDesc *ScheduleDAG::getNodeDesc(const SDNode *Node) const {
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/// specified node.
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bool SUnit::addPred(const SDep &D, bool Required) {
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// If this node already has this depenence, don't add a redundant one.
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for (SmallVector<SDep, 4>::iterator I = Preds.begin(), E = Preds.end();
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I != E; ++I) {
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for (SmallVectorImpl<SDep>::iterator I = Preds.begin(), E = Preds.end();
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I != E; ++I) {
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// Zero-latency weak edges may be added purely for heuristic ordering. Don't
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// add them if another kind of edge already exists.
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if (!Required && I->getSUnit() == D.getSUnit())
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@ -77,7 +77,7 @@ bool SUnit::addPred(const SDep &D, bool Required) {
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// Find the corresponding successor in N.
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SDep ForwardD = *I;
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ForwardD.setSUnit(this);
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for (SmallVector<SDep, 4>::iterator II = PredSU->Succs.begin(),
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for (SmallVectorImpl<SDep>::iterator II = PredSU->Succs.begin(),
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EE = PredSU->Succs.end(); II != EE; ++II) {
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if (*II == ForwardD) {
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II->setLatency(D.getLatency());
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@ -132,8 +132,8 @@ bool SUnit::addPred(const SDep &D, bool Required) {
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/// the specified node.
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void SUnit::removePred(const SDep &D) {
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// Find the matching predecessor.
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for (SmallVector<SDep, 4>::iterator I = Preds.begin(), E = Preds.end();
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I != E; ++I)
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for (SmallVectorImpl<SDep>::iterator I = Preds.begin(), E = Preds.end();
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I != E; ++I)
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if (*I == D) {
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// Find the corresponding successor in N.
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SDep P = D;
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@ -98,7 +98,7 @@ static void getUnderlyingObjects(const Value *V,
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SmallVector<Value *, 4> Objs;
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GetUnderlyingObjects(const_cast<Value *>(V), Objs);
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for (SmallVector<Value *, 4>::iterator I = Objs.begin(), IE = Objs.end();
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for (SmallVectorImpl<Value *>::iterator I = Objs.begin(), IE = Objs.end();
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I != IE; ++I) {
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V = *I;
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if (!Visited.insert(V))
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@ -137,8 +137,8 @@ static void getUnderlyingObjectsForInstr(const MachineInstr *MI,
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SmallVector<Value *, 4> Objs;
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getUnderlyingObjects(V, Objs);
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for (SmallVector<Value *, 4>::iterator I = Objs.begin(), IE = Objs.end();
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I != IE; ++I) {
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for (SmallVectorImpl<Value *>::iterator I = Objs.begin(), IE = Objs.end();
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I != IE; ++I) {
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bool MayAlias = true;
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V = *I;
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@ -465,8 +465,8 @@ static inline bool isUnsafeMemoryObject(MachineInstr *MI,
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SmallVector<Value *, 4> Objs;
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getUnderlyingObjects(V, Objs);
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for (SmallVector<Value *, 4>::iterator I = Objs.begin(),
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IE = Objs.end(); I != IE; ++I) {
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for (SmallVectorImpl<Value *>::iterator I = Objs.begin(),
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IE = Objs.end(); I != IE; ++I) {
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V = *I;
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if (const PseudoSourceValue *PSV = dyn_cast<PseudoSourceValue>(V)) {
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@ -5896,7 +5896,7 @@ void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
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ClonedDVs.push_back(Clone);
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}
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}
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for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
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for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
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E = ClonedDVs.end(); I != E; ++I)
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AddDbgValue(*I, ToNode, false);
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}
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@ -5178,8 +5178,8 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
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SmallVector<Value *, 4> Allocas;
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GetUnderlyingObjects(I.getArgOperand(1), Allocas, TD);
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for (SmallVector<Value*, 4>::iterator Object = Allocas.begin(),
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E = Allocas.end(); Object != E; ++Object) {
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for (SmallVectorImpl<Value*>::iterator Object = Allocas.begin(),
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E = Allocas.end(); Object != E; ++Object) {
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AllocaInst *LifetimeObject = dyn_cast_or_null<AllocaInst>(*Object);
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// Could not find an Alloca.
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@ -310,9 +310,9 @@ void StackColoring::calculateLocalLiveness() {
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SmallPtrSet<const MachineBasicBlock*, 8> NextBBSet;
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for (SmallVector<const MachineBasicBlock*, 8>::iterator
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PI = BasicBlockNumbering.begin(), PE = BasicBlockNumbering.end();
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PI != PE; ++PI) {
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for (SmallVectorImpl<const MachineBasicBlock *>::iterator
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PI = BasicBlockNumbering.begin(), PE = BasicBlockNumbering.end();
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PI != PE; ++PI) {
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const MachineBasicBlock *BB = *PI;
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if (!BBSet.count(BB)) continue;
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@ -197,7 +197,7 @@ void StackSlotColoring::InitializeSlots() {
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/// LiveIntervals that have already been assigned to the specified color.
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bool
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StackSlotColoring::OverlapWithAssignments(LiveInterval *li, int Color) const {
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const SmallVector<LiveInterval*,4> &OtherLIs = Assignments[Color];
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const SmallVectorImpl<LiveInterval *> &OtherLIs = Assignments[Color];
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for (unsigned i = 0, e = OtherLIs.size(); i != e; ++i) {
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LiveInterval *OtherLI = OtherLIs[i];
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if (OtherLI->overlaps(*li))
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@ -297,7 +297,7 @@ bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
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if (NewFI == -1 || (NewFI == (int)SS))
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continue;
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SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
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SmallVectorImpl<MachineInstr*> &RefMIs = SSRefs[SS];
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for (unsigned i = 0, e = RefMIs.size(); i != e; ++i)
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RewriteInstruction(RefMIs[i], SS, NewFI, MF);
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}
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@ -378,7 +378,7 @@ bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
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++I;
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}
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for (SmallVector<MachineInstr*, 4>::iterator I = toErase.begin(),
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for (SmallVectorImpl<MachineInstr *>::iterator I = toErase.begin(),
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E = toErase.end(); I != E; ++I)
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(*I)->eraseFromParent();
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