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Remove -unwind-tables-optional everywhere, since

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this is now the default.

llvm-svn: 49667
This commit is contained in:
Dale Johannesen 2008-04-14 17:56:54 +00:00
parent 8d46278998
commit d9a9c746d8
16 changed files with 21 additions and 21 deletions
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2
test/CodeGen/PowerPC/compare-fcmp-ord.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=ppc32 -unwind-tables-optional | grep or | count 3 ; RUN: llvm-as < %s | llc -march=ppc32 | grep or | count 3
; This should produce one 'or' or 'cror' instruction per function. ; This should produce one 'or' or 'cror' instruction per function.
define i32 @test(double %x, double %y) nounwind { define i32 @test(double %x, double %y) nounwind {

2
test/CodeGen/PowerPC/fold-li.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=ppc32 -unwind-tables-optional | \ ; RUN: llvm-as < %s | llc -march=ppc32 | \
; RUN: grep -v align | not grep li ; RUN: grep -v align | not grep li
;; Test that immediates are folded into these instructions correctly. ;; Test that immediates are folded into these instructions correctly.

2
test/CodeGen/PowerPC/reg-coalesce-simple.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=ppc32 -unwind-tables-optional | not grep or ; RUN: llvm-as < %s | llc -march=ppc32 | not grep or
%struct.foo = type { i32, i32, [0 x i8] } %struct.foo = type { i32, i32, [0 x i8] }

6
test/CodeGen/PowerPC/rotl-2.ll
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@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -march=ppc32 -unwind-tables-optional | grep rlwinm | count 4 ; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | count 4
; RUN: llvm-as < %s | llc -march=ppc32 -unwind-tables-optional | grep rlwnm | count 2 ; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | count 2
; RUN: llvm-as < %s | llc -march=ppc32 -unwind-tables-optional | not grep or ; RUN: llvm-as < %s | llc -march=ppc32 | not grep or
define i32 @rotl32(i32 %A, i8 %Amt) nounwind { define i32 @rotl32(i32 %A, i8 %Amt) nounwind {
%shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1] %shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1]

2
test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86 -unwind-tables-optional -stats |& \ ; RUN: llvm-as < %s | llc -march=x86 -stats |& \
; RUN: grep asm-printer | grep 7 ; RUN: grep asm-printer | grep 7
define i32 @g(i32 %a, i32 %b) nounwind { define i32 @g(i32 %a, i32 %b) nounwind {

2
test/CodeGen/X86/2006-05-02-InstrSched1.ll
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@ -1,5 +1,5 @@
; RUN: llvm-as < %s | \ ; RUN: llvm-as < %s | \
; RUN: llc -march=x86 -relocation-model=static -unwind-tables-optional -stats |& \ ; RUN: llc -march=x86 -relocation-model=static -stats |& \
; RUN: grep asm-printer | grep 14 ; RUN: grep asm-printer | grep 14
; ;
@size20 = external global i32 ; <i32*> [#uses=1] @size20 = external global i32 ; <i32*> [#uses=1]

2
test/CodeGen/X86/2006-05-02-InstrSched2.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86 -stats -unwind-tables-optional |& \ ; RUN: llvm-as < %s | llc -march=x86 -stats |& \
; RUN: grep asm-printer | grep 13 ; RUN: grep asm-printer | grep 13
define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind { define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind {

2
test/CodeGen/X86/2006-05-11-InstrSched.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -unwind-tables-optional |&\ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |&\
; RUN: grep {asm-printer} | grep 32 ; RUN: grep {asm-printer} | grep 32
target datalayout = "e-p:32:32" target datalayout = "e-p:32:32"

2
test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin -enable-eh -unwind-tables-optional | grep {isNullOrNil].eh"} | count 2 ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin -enable-eh | grep {isNullOrNil].eh"} | count 2
%struct.NSString = type { } %struct.NSString = type { }
%struct._objc__method_prototype_list = type opaque %struct._objc__method_prototype_list = type opaque

4
test/CodeGen/X86/constant-pool-remat-0.ll
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@ -1,7 +1,7 @@
; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3 ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3
; RUN: llvm-as < %s | llc -march=x86-64 -stats -unwind-tables-optional -info-output-file - | grep asm-printer | grep 6 ; RUN: llvm-as < %s | llc -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 6
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -unwind-tables-optional -info-output-file - | grep asm-printer | grep 8 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 8
declare fastcc float @qux(float %y) declare fastcc float @qux(float %y)

2
test/CodeGen/X86/dagcombine-cse.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -unwind-tables-optional -stats |& grep asm-printer | grep 14 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& grep asm-printer | grep 14
define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) nounwind { define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) nounwind {
entry: entry:

2
test/CodeGen/X86/iabs.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86-64 -stats -unwind-tables-optional |& \ ; RUN: llvm-as < %s | llc -march=x86-64 -stats |& \
; RUN: grep {6 .*Number of machine instrs printed} ; RUN: grep {6 .*Number of machine instrs printed}
;; Integer absolute value, should produce something at least as good as: ;; Integer absolute value, should produce something at least as good as:

2
test/CodeGen/X86/or-branch.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86 -unwind-tables-optional | not grep set ; RUN: llvm-as < %s | llc -march=x86 | not grep set
define void @foo(i32 %X, i32 %Y, i32 %Z) nounwind { define void @foo(i32 %X, i32 %Y, i32 %Z) nounwind {
entry: entry:

6
test/CodeGen/X86/select.ll
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@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium -unwind-tables-optional ; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium
; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -unwind-tables-optional ; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah
; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -unwind-tables-optional | not grep set ; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep set
define i1 @boolSel(i1 %A, i1 %B, i1 %C) nounwind { define i1 @boolSel(i1 %A, i1 %B, i1 %C) nounwind {
%X = select i1 %A, i1 %B, i1 %C ; <i1> [#uses=1] %X = select i1 %A, i1 %B, i1 %C ; <i1> [#uses=1]

2
test/CodeGen/X86/setuge.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86 -unwind-tables-optional | not grep set ; RUN: llvm-as < %s | llc -march=x86 | not grep set
declare i1 @llvm.isunordered.f32(float, float) declare i1 @llvm.isunordered.f32(float, float)

2
test/CodeGen/X86/zero-remat.ll
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@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -march=x86-64 | grep xor | count 4 ; RUN: llvm-as < %s | llc -march=x86-64 | grep xor | count 4
; RUN: llvm-as < %s | llc -march=x86-64 -stats -unwind-tables-optional -info-output-file - | grep asm-printer | grep 12 ; RUN: llvm-as < %s | llc -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 12
; RUN: llvm-as < %s | llc -march=x86 | grep fldz ; RUN: llvm-as < %s | llc -march=x86 | grep fldz
; RUN: llvm-as < %s | llc -march=x86 | not grep fldl ; RUN: llvm-as < %s | llc -march=x86 | not grep fldl