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[X86] Minor formatting fixes. NFC.
llvm-svn: 251686
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@ -10732,16 +10732,15 @@ static SDValue lower256BitVectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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/// \brief Try to lower a vector shuffle as a 128-bit shuffles.
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/// \brief Try to lower a vector shuffle as a 128-bit shuffles.
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static SDValue lowerV4X128VectorShuffle(SDLoc DL, MVT VT,
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static SDValue lowerV4X128VectorShuffle(SDLoc DL, MVT VT,
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ArrayRef<int> Mask,
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ArrayRef<int> Mask,
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SDValue V1, SDValue V2,
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SDValue V1, SDValue V2,
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SelectionDAG &DAG) {
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SelectionDAG &DAG) {
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assert(VT.getScalarSizeInBits() == 64 &&
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assert(VT.getScalarSizeInBits() == 64 &&
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"Unexpected element type size for 128bit shuffle.");
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"Unexpected element type size for 128bit shuffle.");
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// To handle 256 bit vector requires VLX and most probably
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// To handle 256 bit vector requires VLX and most probably
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// function lowerV2X128VectorShuffle() is better solution.
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// function lowerV2X128VectorShuffle() is better solution.
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assert(VT.getSizeInBits() == 512 &&
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assert(VT.is512BitVector() && "Unexpected vector size for 128bit shuffle.");
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"Unexpected vector size for 128bit shuffle.");
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SmallVector<int, 4> WidenedMask;
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SmallVector<int, 4> WidenedMask;
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if (!canWidenShuffleElements(Mask, WidenedMask))
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if (!canWidenShuffleElements(Mask, WidenedMask))
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@ -10806,8 +10805,8 @@ static SDValue lowerV8F64VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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/// \brief Handle lowering of 16-lane 32-bit floating point shuffles.
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/// \brief Handle lowering of 16-lane 32-bit floating point shuffles.
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static SDValue lowerV16F32VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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static SDValue lowerV16F32VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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const X86Subtarget *Subtarget,
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const X86Subtarget *Subtarget,
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SelectionDAG &DAG) {
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SelectionDAG &DAG) {
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SDLoc DL(Op);
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SDLoc DL(Op);
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assert(V1.getSimpleValueType() == MVT::v16f32 && "Bad operand type!");
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assert(V1.getSimpleValueType() == MVT::v16f32 && "Bad operand type!");
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assert(V2.getSimpleValueType() == MVT::v16f32 && "Bad operand type!");
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assert(V2.getSimpleValueType() == MVT::v16f32 && "Bad operand type!");
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@ -10846,8 +10845,8 @@ static SDValue lowerV8I64VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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/// \brief Handle lowering of 16-lane 32-bit integer shuffles.
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/// \brief Handle lowering of 16-lane 32-bit integer shuffles.
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static SDValue lowerV16I32VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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static SDValue lowerV16I32VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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const X86Subtarget *Subtarget,
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const X86Subtarget *Subtarget,
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SelectionDAG &DAG) {
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SelectionDAG &DAG) {
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SDLoc DL(Op);
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SDLoc DL(Op);
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assert(V1.getSimpleValueType() == MVT::v16i32 && "Bad operand type!");
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assert(V1.getSimpleValueType() == MVT::v16i32 && "Bad operand type!");
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assert(V2.getSimpleValueType() == MVT::v16i32 && "Bad operand type!");
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assert(V2.getSimpleValueType() == MVT::v16i32 && "Bad operand type!");
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