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https://github.com/RPCS3/llvm-mirror.git
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AMDGPU: Remove dead check in AMDGPUPromoteAlloca
This is currently only called with GEP users. A direct alloca would only happen with current typed pointers for arrays which are a perverse case. Also fix crashes on 0 x and 1 x arrays. llvm-svn: 275869
This commit is contained in:
Matt Arsenault
parent
e38c89d8d7
commit
dafaf8406a
@ -348,9 +348,6 @@ static VectorType *arrayTypeToVecType(Type *ArrayTy) {
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static Value *
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calculateVectorIndex(Value *Ptr,
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const std::map<GetElementPtrInst *, Value *> &GEPIdx) {
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if (isa<AllocaInst>(Ptr))
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return Constant::getNullValue(Type::getInt32Ty(Ptr->getContext()));
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GetElementPtrInst *GEP = cast<GetElementPtrInst>(Ptr);
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auto I = GEPIdx.find(GEP);
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@ -360,11 +357,11 @@ calculateVectorIndex(Value *Ptr,
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static Value* GEPToVectorIndex(GetElementPtrInst *GEP) {
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// FIXME we only support simple cases
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if (GEP->getNumOperands() != 3)
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return NULL;
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return nullptr;
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ConstantInt *I0 = dyn_cast<ConstantInt>(GEP->getOperand(1));
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if (!I0 || !I0->isZero())
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return NULL;
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return nullptr;
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return GEP->getOperand(2);
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}
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@ -398,7 +395,8 @@ static bool tryPromoteAllocaToVector(AllocaInst *Alloca) {
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// are just being conservative for now.
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if (!AllocaTy ||
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AllocaTy->getElementType()->isVectorTy() ||
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AllocaTy->getNumElements() > 4) {
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AllocaTy->getNumElements() > 4 ||
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AllocaTy->getNumElements() < 2) {
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DEBUG(dbgs() << " Cannot convert type to vector\n");
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return false;
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}
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@ -443,9 +441,11 @@ static bool tryPromoteAllocaToVector(AllocaInst *Alloca) {
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IRBuilder<> Builder(Inst);
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switch (Inst->getOpcode()) {
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case Instruction::Load: {
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Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS);
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Value *Ptr = Inst->getOperand(0);
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Value *Index = calculateVectorIndex(Ptr, GEPVectorIdx);
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Value *BitCast = Builder.CreateBitCast(Alloca, VectorTy->getPointerTo(0));
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Value *BitCast = Builder.CreateBitCast(Alloca, VecPtrTy);
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Value *VecValue = Builder.CreateLoad(BitCast);
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Value *ExtractElement = Builder.CreateExtractElement(VecValue, Index);
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Inst->replaceAllUsesWith(ExtractElement);
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@ -453,9 +453,11 @@ static bool tryPromoteAllocaToVector(AllocaInst *Alloca) {
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break;
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}
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case Instruction::Store: {
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Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS);
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Value *Ptr = Inst->getOperand(1);
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Value *Index = calculateVectorIndex(Ptr, GEPVectorIdx);
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Value *BitCast = Builder.CreateBitCast(Alloca, VectorTy->getPointerTo(0));
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Value *BitCast = Builder.CreateBitCast(Alloca, VecPtrTy);
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Value *VecValue = Builder.CreateLoad(BitCast);
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Value *NewVecValue = Builder.CreateInsertElement(VecValue,
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Inst->getOperand(0),
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@ -469,7 +471,6 @@ static bool tryPromoteAllocaToVector(AllocaInst *Alloca) {
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break;
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default:
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Inst->dump();
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llvm_unreachable("Inconsistency in instructions promotable to vector");
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}
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}
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@ -417,12 +417,6 @@ entry:
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ret void
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}
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; HSAOPT: !0 = !{}
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; HSAOPT: !1 = !{i32 0, i32 2048}
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; NOHSAOPT: !0 = !{i32 0, i32 2048}
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; FUNC-LABEL: v16i32_stack:
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; R600: MOVA_INT
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@ -527,4 +521,33 @@ define void @v2float_stack(<2 x float> addrspace(1)* %out, i32 %a) {
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ret void
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}
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; OPT-LABEL: @direct_alloca_read_0xi32(
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; OPT: store [0 x i32] undef, [0 x i32] addrspace(3)*
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; OPT: load [0 x i32], [0 x i32] addrspace(3)*
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define void @direct_alloca_read_0xi32([0 x i32] addrspace(1)* %out, i32 %index) {
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entry:
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%tmp = alloca [0 x i32]
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store [0 x i32] [], [0 x i32]* %tmp
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%load = load [0 x i32], [0 x i32]* %tmp
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store [0 x i32] %load, [0 x i32] addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @direct_alloca_read_1xi32(
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; OPT: store [1 x i32] zeroinitializer, [1 x i32] addrspace(3)*
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; OPT: load [1 x i32], [1 x i32] addrspace(3)*
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define void @direct_alloca_read_1xi32([1 x i32] addrspace(1)* %out, i32 %index) {
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entry:
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%tmp = alloca [1 x i32]
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store [1 x i32] [i32 0], [1 x i32]* %tmp
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%load = load [1 x i32], [1 x i32]* %tmp
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store [1 x i32] %load, [1 x i32] addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind "amdgpu-max-waves-per-eu"="2" }
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; HSAOPT: !0 = !{}
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; HSAOPT: !1 = !{i32 0, i32 2048}
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; NOHSAOPT: !0 = !{i32 0, i32 2048}
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@ -3,6 +3,11 @@
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG -check-prefix=FUNC %s
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; RUN: opt -S -mtriple=amdgcn-- -amdgpu-promote-alloca -sroa -instcombine < %s | FileCheck -check-prefix=OPT %s
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; OPT-LABEL: @vector_read(
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; OPT: %0 = extractelement <4 x i32> <i32 0, i32 1, i32 2, i32 3>, i32 %index
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; OPT: store i32 %0, i32 addrspace(1)* %out, align 4
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; FUNC-LABEL: {{^}}vector_read:
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; EG: MOV
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@ -12,21 +17,26 @@
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; EG: MOVA_INT
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define void @vector_read(i32 addrspace(1)* %out, i32 %index) {
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entry:
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%0 = alloca [4 x i32]
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%x = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 0
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%y = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 1
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%z = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 2
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%w = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 3
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%tmp = alloca [4 x i32]
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%x = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 0
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%y = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
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%z = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 2
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%w = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 3
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store i32 0, i32* %x
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store i32 1, i32* %y
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store i32 2, i32* %z
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store i32 3, i32* %w
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%1 = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 %index
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%2 = load i32, i32* %1
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store i32 %2, i32 addrspace(1)* %out
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%tmp1 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 %index
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%tmp2 = load i32, i32* %tmp1
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store i32 %tmp2, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @vector_write(
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; OPT: %0 = insertelement <4 x i32> zeroinitializer, i32 1, i32 %w_index
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; OPT: %1 = extractelement <4 x i32> %0, i32 %r_index
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; OPT: store i32 %1, i32 addrspace(1)* %out, align 4
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; FUNC-LABEL: {{^}}vector_write:
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; EG: MOV
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; EG: MOV
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@ -36,42 +46,95 @@ entry:
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; EG: MOVA_INT
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define void @vector_write(i32 addrspace(1)* %out, i32 %w_index, i32 %r_index) {
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entry:
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%0 = alloca [4 x i32]
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%x = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 0
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%y = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 1
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%z = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 2
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%w = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 3
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%tmp = alloca [4 x i32]
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%x = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 0
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%y = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
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%z = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 2
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%w = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 3
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store i32 0, i32* %x
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store i32 0, i32* %y
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store i32 0, i32* %z
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store i32 0, i32* %w
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%1 = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 %w_index
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store i32 1, i32* %1
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%2 = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 %r_index
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%3 = load i32, i32* %2
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store i32 %3, i32 addrspace(1)* %out
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%tmp1 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 %w_index
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store i32 1, i32* %tmp1
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%tmp2 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 %r_index
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%tmp3 = load i32, i32* %tmp2
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store i32 %tmp3, i32 addrspace(1)* %out
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ret void
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}
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; This test should be optimize to:
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; store i32 0, i32 addrspace(1)* %out
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; OPT-LABEL: @bitcast_gep(
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; OPT-LABEL: store i32 0, i32 addrspace(1)* %out, align 4
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; FUNC-LABEL: {{^}}bitcast_gep:
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; EG: STORE_RAW
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define void @bitcast_gep(i32 addrspace(1)* %out, i32 %w_index, i32 %r_index) {
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entry:
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%0 = alloca [4 x i32]
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%x = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 0
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%y = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 1
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%z = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 2
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%w = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 3
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%tmp = alloca [4 x i32]
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%x = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 0
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%y = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
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%z = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 2
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%w = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 3
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store i32 0, i32* %x
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store i32 0, i32* %y
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store i32 0, i32* %z
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store i32 0, i32* %w
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%1 = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 1
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%2 = bitcast i32* %1 to [4 x i32]*
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%3 = getelementptr [4 x i32], [4 x i32]* %2, i32 0, i32 0
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%4 = load i32, i32* %3
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store i32 %4, i32 addrspace(1)* %out
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%tmp1 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
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%tmp2 = bitcast i32* %tmp1 to [4 x i32]*
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%tmp3 = getelementptr [4 x i32], [4 x i32]* %tmp2, i32 0, i32 0
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%tmp4 = load i32, i32* %tmp3
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store i32 %tmp4, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @vector_read_bitcast_gep(
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; OPT: %0 = extractelement <4 x i32> <i32 1065353216, i32 1, i32 2, i32 3>, i32 %index
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; OPT: store i32 %0, i32 addrspace(1)* %out, align 4
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define void @vector_read_bitcast_gep(i32 addrspace(1)* %out, i32 %index) {
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entry:
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%tmp = alloca [4 x i32]
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%x = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 0
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%y = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
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%z = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 2
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%w = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 3
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%bc = bitcast i32* %x to float*
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store float 1.0, float* %bc
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store i32 1, i32* %y
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store i32 2, i32* %z
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store i32 3, i32* %w
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%tmp1 = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 %index
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%tmp2 = load i32, i32* %tmp1
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store i32 %tmp2, i32 addrspace(1)* %out
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ret void
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}
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; FIXME: Should be able to promote this. Instcombine should fold the
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; cast in the hasOneUse case so it might not matter in practice
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; OPT-LABEL: @vector_read_bitcast_alloca(
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; OPT: alloca [4 x float]
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; OPT: store float
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; OPT: store float
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; OPT: store float
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; OPT: store float
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; OPT: load float
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define void @vector_read_bitcast_alloca(float addrspace(1)* %out, i32 %index) {
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entry:
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%tmp = alloca [4 x i32]
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%tmp.bc = bitcast [4 x i32]* %tmp to [4 x float]*
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%x = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 0
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%y = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 1
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%z = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 2
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%w = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 3
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store float 0.0, float* %x
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store float 1.0, float* %y
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store float 2.0, float* %z
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store float 4.0, float* %w
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%tmp1 = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 %index
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%tmp2 = load float, float* %tmp1
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store float %tmp2, float addrspace(1)* %out
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ret void
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}
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