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[AMDGPU][MC] Corrected handling of negative expressions
See bug 35716: https://bugs.llvm.org/show_bug.cgi?id=35716 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D41488 llvm-svn: 321372
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@ -1760,6 +1760,11 @@ AMDGPUAsmParser::parseImm(OperandVector &Operands, bool AbsMod) {
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// TODO: add syntactic sugar for 1/(2*PI)
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bool Minus = false;
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if (getLexer().getKind() == AsmToken::Minus) {
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const AsmToken NextToken = getLexer().peekTok();
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if (!NextToken.is(AsmToken::Integer) &&
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!NextToken.is(AsmToken::Real)) {
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return MatchOperand_NoMatch;
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}
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Minus = true;
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Parser.Lex();
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}
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@ -1789,7 +1794,7 @@ AMDGPUAsmParser::parseImm(OperandVector &Operands, bool AbsMod) {
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return MatchOperand_Success;
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}
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default:
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return Minus ? MatchOperand_ParseFail : MatchOperand_NoMatch;
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return MatchOperand_NoMatch;
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}
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}
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@ -46,3 +46,11 @@ BB2:
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s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1
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// VI: s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1 ; encoding: [0x6a,0xff,0xea,0x80,A,A,A,A]
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// VI-NEXT: ; fixup A - offset: 4, value: (BB2+4)-BB1, kind: FK_Data_4
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t=1
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s_sub_u32 s0, s0, -t
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// VI: s_sub_u32 s0, s0, -1 ; encoding: [0x00,0xc1,0x80,0x80]
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t=-1
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s_sub_u32 s0, s0, -t
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// VI: s_sub_u32 s0, s0, 1 ; encoding: [0x00,0x81,0x80,0x80]
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@ -59,16 +59,16 @@ v_pk_add_f16 v1, v2, |v3|
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// GFX9: :22: error: invalid operand for instruction
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v_pk_add_f16 v1, v2, abs(v3)
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// GFX9: :19: error: invalid operand for instruction
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// GFX9: :18: error: invalid operand for instruction
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v_pk_add_f16 v1, -v2, v3
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// GFX9: :23: error: invalid operand for instruction
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// GFX9: :22: error: invalid operand for instruction
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v_pk_add_f16 v1, v2, -v3
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// GFX9: :18: error: invalid operand for instruction
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v_pk_add_u16 v1, abs(v2), v3
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// GFX9: :19: error: invalid operand for instruction
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// GFX9: :18: error: invalid operand for instruction
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v_pk_add_u16 v1, -v2, v3
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//
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