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[AArch64] AArch64CondBrTuningPass generates wrong branch instructions

Some conditional branch instructions generated by this pass are checking
the wrong condition code. The instructions TBZ and TBNZ are transformed
into B.GE and B.LT instead of B.PL and B.MI respectively. They should
only be checking the Negative bit.

Differential Revision: https://reviews.llvm.org/D34743

llvm-svn: 306550
This commit is contained in:
Alexandros Lamprineas 2017-06-28 15:09:11 +00:00
parent b169e694a8
commit db0ecdf907
2 changed files with 7 additions and 7 deletions

View File

@ -22,7 +22,7 @@
/// cbz w8, .LBB1_2 -> b.eq .LBB1_2
///
/// 3) sub w8, w0, w1 -> subs w8, w0, w1 ; w8 has multiple uses.
/// tbz w8, #31, .LBB6_2 -> b.ge .LBB6_2
/// tbz w8, #31, .LBB6_2 -> b.pl .LBB6_2
///
//===----------------------------------------------------------------------===//
@ -129,11 +129,11 @@ MachineInstr *AArch64CondBrTuning::convertToCondBr(MachineInstr &MI) {
break;
case AArch64::TBZW:
case AArch64::TBZX:
CC = AArch64CC::GE;
CC = AArch64CC::PL;
break;
case AArch64::TBNZW:
case AArch64::TBNZX:
CC = AArch64CC::LT;
CC = AArch64CC::MI;
break;
}
return BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(AArch64::Bcc))

View File

@ -83,7 +83,7 @@ L2:
; CHECK-LABEL: test_add_tbz:
; CHECK: adds
; CHECK: b.ge
; CHECK: b.pl
; CHECK: ret
define void @test_add_tbz(i32 %a, i32 %b, i32* %ptr) {
entry:
@ -99,7 +99,7 @@ L2:
; CHECK-LABEL: test_subs_tbz:
; CHECK: subs
; CHECK: b.ge
; CHECK: b.pl
; CHECK: ret
define void @test_subs_tbz(i32 %a, i32 %b, i32* %ptr) {
entry:
@ -115,7 +115,7 @@ L2:
; CHECK-LABEL: test_add_tbnz
; CHECK: adds
; CHECK: b.lt
; CHECK: b.mi
; CHECK: ret
define void @test_add_tbnz(i32 %a, i32 %b, i32* %ptr) {
entry:
@ -131,7 +131,7 @@ L2:
; CHECK-LABEL: test_subs_tbnz
; CHECK: subs
; CHECK: b.lt
; CHECK: b.mi
; CHECK: ret
define void @test_subs_tbnz(i32 %a, i32 %b, i32* %ptr) {
entry: