RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
Code Issues Projects Releases Wiki Activity

[Hexagon] Adding NOP encoding bits.

Browse Source 
llvm-svn: 222791
This commit is contained in:
Colin LeMahieu 2014-11-25 21:23:07 +00:00
parent d28ac9a35d
commit dbc4cca085
2 changed files with 6 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
lib/Target/Hexagon/HexagonInstrInfo.td
View File

@ -409,10 +409,11 @@ def AND_ri : ALU32_ri<(outs IntRegs:$dst),
s10ExtPred:$src2))]>, ImmRegRel;
// Nop.
let neverHasSideEffects = 1, isCodeGenOnly = 0 in
def NOP : ALU32_rr<(outs), (ins),
"nop",
[]>;
let hasSideEffects = 0 in
def A2_nop: ALU32Inst <(outs), (ins), "nop" > {
let IClass = 0b0111;
let Inst{27-24} = 0b1111;
}
// Rd32=sub(#s10,Rs32)
let isExtendable = 1, opExtendable = 1, isExtentSigned = 1, opExtentBits = 10,

2
lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
View File

@ -97,7 +97,7 @@ void HexagonInstPrinter::printInst(const HexagonMCInst *MI, raw_ostream &O,
HexagonMCInst Nop;
StringRef NoAnnot;
Nop.setOpcode (Hexagon::NOP);
Nop.setOpcode (Hexagon::A2_nop);
Nop.setPacketStart (MI->isPacketStart());
printInst (&Nop, O, NoAnnot);
}