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Coalesce stack slot accesses that arise when spilling both sides of a COPY.
This helps avoid silly code: %R0<def = LOAD <fi#5> STORE <fi#5>, %R0<kill> llvm-svn: 110266
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@ -85,6 +85,7 @@ private:
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bool reMaterializeFor(MachineBasicBlock::iterator MI);
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void reMaterializeAll();
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bool coalesceStackAccess(MachineInstr *MI);
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bool foldMemoryOperand(MachineBasicBlock::iterator MI,
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const SmallVectorImpl<unsigned> &Ops);
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void insertReload(LiveInterval &NewLI, MachineBasicBlock::iterator MI);
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@ -291,6 +292,24 @@ void InlineSpiller::reMaterializeAll() {
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}
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}
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/// If MI is a load or store of stackSlot_, it can be removed.
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bool InlineSpiller::coalesceStackAccess(MachineInstr *MI) {
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int FI = 0;
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unsigned reg;
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if (!(reg = tii_.isLoadFromStackSlot(MI, FI)) &&
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!(reg = tii_.isStoreToStackSlot(MI, FI)))
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return false;
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// We have a stack access. Is it the right register and slot?
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if (reg != li_->reg || FI != stackSlot_)
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return false;
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DEBUG(dbgs() << "Coalescing stack access: " << *MI);
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lis_.RemoveMachineInstrFromMaps(MI);
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MI->eraseFromParent();
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return true;
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}
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/// foldMemoryOperand - Try folding stack slot references in Ops into MI.
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/// Return true on success, and MI will be erased.
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bool InlineSpiller::foldMemoryOperand(MachineBasicBlock::iterator MI,
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@ -399,6 +418,10 @@ void InlineSpiller::spill(LiveInterval *li,
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continue;
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}
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// Stack slot accesses may coalesce away.
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if (coalesceStackAccess(MI))
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continue;
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// Analyze instruction.
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bool Reads, Writes;
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SmallVector<unsigned, 8> Ops;
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