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https://github.com/RPCS3/llvm-mirror.git
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[AMDGPU] Optimize S_CBRANCH_VCC[N]Z -> S_CBRANCH_EXEC[N]Z
Sometimes after basic block placement we end up with a code like: sreg = s_mov_b64 -1 vcc = s_and_b64 exec, sreg s_cbranch_vccz This happens as a join of a block assigning -1 to a saved mask and another block which consumes that saved mask with s_and_b64 and a branch. This is essentially a single s_cbranch_execz instruction when moved into a single new basic block. Differential Revision: https://reviews.llvm.org/D54164 llvm-svn: 346690
This commit is contained in:
Stanislav Mekhanoshin
parent
6999228790
commit
dc754bb13d
@ -66,6 +66,8 @@ private:
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bool skipMaskBranch(MachineInstr &MI, MachineBasicBlock &MBB);
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bool optimizeVccBranch(MachineInstr &MI) const;
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public:
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static char ID;
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@ -320,6 +322,96 @@ bool SIInsertSkips::skipMaskBranch(MachineInstr &MI,
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return true;
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}
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bool SIInsertSkips::optimizeVccBranch(MachineInstr &MI) const {
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// Match:
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// sreg = -1
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// vcc = S_AND_B64 exec, sreg
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// S_CBRANCH_VCC[N]Z
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// =>
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// S_CBRANCH_EXEC[N]Z
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bool Changed = false;
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MachineBasicBlock &MBB = *MI.getParent();
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const unsigned CondReg = AMDGPU::VCC;
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const unsigned ExecReg = AMDGPU::EXEC;
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const unsigned And = AMDGPU::S_AND_B64;
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MachineBasicBlock::reverse_iterator A = MI.getReverseIterator(),
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E = MBB.rend();
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bool ReadsCond = false;
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unsigned Threshold = 5;
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for (++A ; A != E ; ++A) {
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if (!--Threshold)
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return false;
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if (A->modifiesRegister(ExecReg, TRI))
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return false;
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if (A->modifiesRegister(CondReg, TRI)) {
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if (!A->definesRegister(CondReg, TRI) || A->getOpcode() != And)
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return false;
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break;
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}
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ReadsCond |= A->readsRegister(CondReg, TRI);
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}
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if (A == E)
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return false;
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MachineOperand &Op1 = A->getOperand(1);
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MachineOperand &Op2 = A->getOperand(2);
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if (Op1.getReg() != ExecReg && Op2.isReg() && Op2.getReg() == ExecReg) {
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TII->commuteInstruction(*A);
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Changed = true;
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}
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if (Op1.getReg() != ExecReg)
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return Changed;
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if (Op2.isImm() && Op2.getImm() != -1)
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return Changed;
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unsigned SReg = AMDGPU::NoRegister;
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if (Op2.isReg()) {
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SReg = Op2.getReg();
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auto M = std::next(A);
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bool ReadsSreg = false;
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for ( ; M != E ; ++M) {
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if (M->definesRegister(SReg, TRI))
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break;
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if (M->modifiesRegister(SReg, TRI))
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return Changed;
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ReadsSreg |= M->readsRegister(SReg, TRI);
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}
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if (M == E ||
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!M->isMoveImmediate() ||
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!M->getOperand(1).isImm() ||
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M->getOperand(1).getImm() != -1)
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return Changed;
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// First if sreg is only used in and instruction fold the immediate
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// into that and.
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if (!ReadsSreg && Op2.isKill()) {
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A->getOperand(2).ChangeToImmediate(-1);
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M->eraseFromParent();
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}
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}
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if (!ReadsCond && A->registerDefIsDead(AMDGPU::SCC) &&
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MI.killsRegister(CondReg, TRI))
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A->eraseFromParent();
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bool IsVCCZ = MI.getOpcode() == AMDGPU::S_CBRANCH_VCCZ;
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if (SReg == ExecReg) {
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if (IsVCCZ) {
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MI.eraseFromParent();
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return true;
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}
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MI.setDesc(TII->get(AMDGPU::S_BRANCH));
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} else {
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MI.setDesc(TII->get(IsVCCZ ? AMDGPU::S_CBRANCH_EXECZ
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: AMDGPU::S_CBRANCH_EXECNZ));
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}
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MI.RemoveOperand(MI.findRegisterUseOperandIdx(CondReg, false /*Kill*/, TRI));
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MI.addImplicitDefUseOperands(*MBB.getParent());
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return true;
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}
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bool SIInsertSkips::runOnMachineFunction(MachineFunction &MF) {
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const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
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TII = ST.getInstrInfo();
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@ -417,6 +509,11 @@ bool SIInsertSkips::runOnMachineFunction(MachineFunction &MF) {
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}
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break;
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case AMDGPU::S_CBRANCH_VCCZ:
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case AMDGPU::S_CBRANCH_VCCNZ:
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MadeChange |= optimizeVccBranch(MI);
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break;
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default:
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break;
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}
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@ -453,7 +453,7 @@ endif:
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; GCN: v_nop_e64
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; GCN: v_nop_e64
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; GCN: ;;#ASMEND
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; GCN: s_cbranch_vccz [[RET]]
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; GCN: s_cbranch_execz [[RET]]
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; GCN-NEXT: [[LONGBB:BB[0-9]+_[0-9]+]]: ; %loop
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; GCN-NEXT: ; in Loop: Header=[[LOOP_BODY]] Depth=1
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@ -36,7 +36,7 @@ loop:
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; SI: s_and_b64 vcc, exec, -1
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; SI: s_waitcnt lgkmcnt(0)
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; SI: buffer_store_dword [[REG]]
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; SI: s_cbranch_vccnz [[LOOP]]
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; SI: s_cbranch_execnz [[LOOP]]
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; SI: [[RET]]: ; %UnifiedReturnBlock
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; SI: s_endpgm
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320
test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
Normal file
320
test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
Normal file
@ -0,0 +1,320 @@
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass si-insert-skips -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
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---
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# GCN-LABEL: name: and_execz_mov_vccz
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# GCN-NOT: S_MOV_
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# GCN-NOT: S_AND_
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_imm_vccz
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# GCN-NOT: S_AND_
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_imm_vccz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$vcc = S_AND_B64 $exec, -1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execnz_imm_vccnz
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# GCN-NOT: S_AND_
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# GCN: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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name: and_execnz_imm_vccnz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$vcc = S_AND_B64 $exec, -1, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_imm_vccz_live_scc
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# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def $scc
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_imm_vccz_live_scc
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$vcc = S_AND_B64 $exec, -1, implicit-def $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_live_scc
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# GCN-NOT: S_MOV_
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# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def $scc
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_live_scc
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_live_sreg
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_live_sreg
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_live_sreg_commute
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_live_sreg_commute
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $sgpr0_sgpr1, $exec, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_live_scc_commute
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# GCN-NOT: S_MOV_
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# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def $scc
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_live_scc_commute
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 killed $sgpr0_sgpr1, $exec, implicit-def $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_commute
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# GCN-NOT: S_MOV_
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# GCN-NOT: S_AND_
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# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_commute
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 killed $sgpr0_sgpr1, $exec, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_exec_vccz
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# GCN: $exec = S_MOV_B64 -1
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# GCN-NEXT: S_ENDPGM
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name: and_execz_mov_exec_vccz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$exec = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, $exec, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_exec_vccnz
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# GCN: $exec = S_MOV_B64 -1
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# GCN-NEXT: S_BRANCH %bb.1{{$}}
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name: and_execz_mov_exec_vccnz
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$exec = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, $exec, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_reads_sreg_early
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: $sgpr2 = S_MOV_B32 $sgpr1
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_reads_sreg_early
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$sgpr2 = S_MOV_B32 $sgpr1
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_reads_sreg_late
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: $sgpr2 = S_MOV_B32 $sgpr1
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_reads_sreg_late
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, $sgpr0_sgpr1, implicit-def dead $scc
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$sgpr2 = S_MOV_B32 $sgpr1
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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# GCN-LABEL: name: and_execz_mov_vccz_reads_writes_sreg_early
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: $sgpr1 = S_MOV_B32 $sgpr0
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# GCN-NEXT: $vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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# GCN-NEXT: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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name: and_execz_mov_vccz_reads_writes_sreg_early
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$sgpr1 = S_MOV_B32 $sgpr0
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_reads_cond
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# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def dead $scc
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# GCN-NEXT: $sgpr2 = S_MOV_B32 $vcc_lo
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# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
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name: and_execz_mov_vccz_reads_cond
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body: |
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bb.0:
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S_NOP 0
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bb.1:
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S_NOP 0
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bb.2:
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$sgpr0_sgpr1 = S_MOV_B64 -1
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$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
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$sgpr2 = S_MOV_B32 $vcc_lo
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_ENDPGM
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...
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---
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# GCN-LABEL: name: and_execz_mov_vccz_modifies_sreg
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 -1
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# GCN-NEXT: $sgpr0 = S_MOV_B32 0
|
||||
# GCN-NEXT: $vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
|
||||
# GCN-NEXT: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
||||
name: and_execz_mov_vccz_modifies_sreg
|
||||
body: |
|
||||
bb.0:
|
||||
S_NOP 0
|
||||
|
||||
bb.1:
|
||||
S_NOP 0
|
||||
|
||||
bb.2:
|
||||
$sgpr0_sgpr1 = S_MOV_B64 -1
|
||||
$sgpr0 = S_MOV_B32 0
|
||||
$vcc = S_AND_B64 $exec, killed $sgpr0_sgpr1, implicit-def dead $scc
|
||||
S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
||||
S_ENDPGM
|
||||
...
|
||||
---
|
||||
# GCN-LABEL: name: and_execz_imm_vccz_liveout_scc
|
||||
# GCN: $vcc = S_AND_B64 $exec, -1, implicit-def $scc
|
||||
# GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
|
||||
# GCN-NEXT S_ENDPGM implicit $scc
|
||||
name: and_execz_imm_vccz_liveout_scc
|
||||
body: |
|
||||
bb.0:
|
||||
S_NOP 0
|
||||
|
||||
bb.1:
|
||||
S_NOP 0
|
||||
|
||||
bb.2:
|
||||
$vcc = S_AND_B64 $exec, -1, implicit-def $scc
|
||||
S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
|
||||
S_ENDPGM implicit $scc
|
||||
...
|
||||
Loading…
Reference in New Issue
Block a user